Index: include/llvm/CodeGen/FastISel.h
===================================================================
--- include/llvm/CodeGen/FastISel.h
+++ include/llvm/CodeGen/FastISel.h
@@ -197,7 +197,6 @@
   MachineConstantPool &MCP;
   DebugLoc DbgLoc;
   const TargetMachine &TM;
-  const DataLayout &DL;
   const TargetInstrInfo &TII;
   const TargetLowering &TLI;
   const TargetRegisterInfo &TRI;
Index: lib/CodeGen/SelectionDAG/FastISel.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/FastISel.cpp
+++ lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -140,7 +140,8 @@
 
   // No-op casts are trivially coalesced by fast-isel.
   if (const auto *Cast = dyn_cast<CastInst>(I))
-    if (Cast->isNoopCast(DL.getIntPtrType(Cast->getContext())) &&
+    if (Cast->isNoopCast(
+            MF->getDataLayout().getIntPtrType(Cast->getContext())) &&
         !hasTrivialKill(Cast->getOperand(0)))
       return false;
 
@@ -216,8 +217,8 @@
   else if (isa<ConstantPointerNull>(V))
     // Translate this as an integer zero so that it can be
     // local-CSE'd with actual integer zeros.
-    Reg = getRegForValue(
-        Constant::getNullValue(DL.getIntPtrType(V->getContext())));
+    Reg = getRegForValue(Constant::getNullValue(
+        MF->getDataLayout().getIntPtrType(V->getContext())));
   else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
     if (CF->isNullValue())
       Reg = fastMaterializeFloatZero(CF);
@@ -502,7 +503,8 @@
       uint64_t Field = cast<ConstantInt>(Idx)->getZExtValue();
       if (Field) {
         // N = N + Offset
-        TotalOffs += DL.getStructLayout(StTy)->getElementOffset(Field);
+        TotalOffs +=
+            MF->getDataLayout().getStructLayout(StTy)->getElementOffset(Field);
         if (TotalOffs >= MaxOffs) {
           N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
           if (!N) // Unhandled operand. Halt "fast" selection and bail.
@@ -521,7 +523,7 @@
           continue;
         // N = N + Offset
         uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue();
-        TotalOffs += DL.getTypeAllocSize(Ty) * IdxN;
+        TotalOffs += MF->getDataLayout().getTypeAllocSize(Ty) * IdxN;
         if (TotalOffs >= MaxOffs) {
           N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
           if (!N) // Unhandled operand. Halt "fast" selection and bail.
@@ -540,7 +542,7 @@
       }
 
       // N = N + Idx * ElementSize;
-      uint64_t ElementSize = DL.getTypeAllocSize(Ty);
+      uint64_t ElementSize = MF->getDataLayout().getTypeAllocSize(Ty);
       std::pair<unsigned, bool> Pair = getRegForGEPIndex(Idx);
       unsigned IdxN = Pair.first;
       bool IdxNIsKill = Pair.second;
@@ -868,7 +870,7 @@
                            unsigned NumArgs) {
   MCContext &Ctx = MF->getContext();
   SmallString<32> MangledName;
-  Mangler::getNameWithPrefix(MangledName, SymName, DL);
+  Mangler::getNameWithPrefix(MangledName, SymName, MF->getDataLayout());
   MCSymbol *Sym = Ctx.getOrCreateSymbol(MangledName);
   return lowerCallTo(CI, Sym, NumArgs);
 }
@@ -971,6 +973,7 @@
     if (Arg.IsByVal || Arg.IsInAlloca) {
       PointerType *Ty = cast<PointerType>(Arg.Ty);
       Type *ElementTy = Ty->getElementType();
+      auto &DL = MF->getDataLayout();
       unsigned FrameSize = DL.getTypeAllocSize(ElementTy);
       // For ByVal, alignment should come from FE. BE will guess if this info is
       // not there, but there are cases it cannot get right.
@@ -984,7 +987,8 @@
       Flags.setNest();
     if (NeedsRegBlock)
       Flags.setInConsecutiveRegs();
-    unsigned OriginalAlignment = DL.getABITypeAlignment(Arg.Ty);
+    unsigned OriginalAlignment =
+        MF->getDataLayout().getABITypeAlignment(Arg.Ty);
     Flags.setOrigAlign(OriginalAlignment);
 
     CLI.OutVals.push_back(Arg.Val);
@@ -1612,8 +1616,7 @@
                    bool SkipTargetIndependentISel)
     : FuncInfo(FuncInfo), MF(FuncInfo.MF), MRI(FuncInfo.MF->getRegInfo()),
       MFI(*FuncInfo.MF->getFrameInfo()), MCP(*FuncInfo.MF->getConstantPool()),
-      TM(FuncInfo.MF->getTarget()), DL(*TM.getDataLayout()),
-      TII(*MF->getSubtarget().getInstrInfo()),
+      TM(FuncInfo.MF->getTarget()), TII(*MF->getSubtarget().getInstrInfo()),
       TLI(*MF->getSubtarget().getTargetLowering()),
       TRI(*MF->getSubtarget().getRegisterInfo()), LibInfo(LibInfo),
       SkipTargetIndependentISel(SkipTargetIndependentISel) {}
@@ -2128,8 +2131,8 @@
   if (!isa<AddOperator>(Add))
     return false;
   // Type size needs to match.
-  if (DL.getTypeSizeInBits(GEP->getType()) !=
-      DL.getTypeSizeInBits(Add->getType()))
+  if (MF->getDataLayout().getTypeSizeInBits(GEP->getType()) !=
+      MF->getDataLayout().getTypeSizeInBits(Add->getType()))
     return false;
   // Must be in the same basic block.
   if (isa<Instruction>(Add) &&
@@ -2170,9 +2173,9 @@
   I->getAAMetadata(AAInfo);
 
   if (Alignment == 0) // Ensure that codegen never sees alignment 0.
-    Alignment = DL.getABITypeAlignment(ValTy);
+    Alignment = MF->getDataLayout().getABITypeAlignment(ValTy);
 
-  unsigned Size = DL.getTypeStoreSize(ValTy);
+  unsigned Size = MF->getDataLayout().getTypeStoreSize(ValTy);
 
   if (IsVolatile)
     Flags |= MachineMemOperand::MOVolatile;
Index: lib/Target/AArch64/AArch64FastISel.cpp
===================================================================
--- lib/Target/AArch64/AArch64FastISel.cpp
+++ lib/Target/AArch64/AArch64FastISel.cpp
@@ -310,7 +310,8 @@
 }
 
 unsigned AArch64FastISel::fastMaterializeAlloca(const AllocaInst *AI) {
-  assert(TLI.getValueType(AI->getType(), true) == MVT::i64 &&
+  auto &DL = MF->getDataLayout();
+  assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i64 &&
          "Alloca should always return a pointer.");
 
   // Don't handle dynamic allocas.
@@ -391,9 +392,9 @@
 
   // Materialize via constant pool.  MachineConstantPool wants an explicit
   // alignment.
-  unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
+  unsigned Align = MF->getDataLayout().getPrefTypeAlignment(CFP->getType());
   if (Align == 0)
-    Align = DL.getTypeAllocSize(CFP->getType());
+    Align = MF->getDataLayout().getTypeAllocSize(CFP->getType());
 
   unsigned CPI = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
   unsigned ADRPReg = createResultReg(&AArch64::GPR64commonRegClass);
@@ -420,7 +421,7 @@
 
   unsigned char OpFlags = Subtarget->ClassifyGlobalReference(GV, TM);
 
-  EVT DestEVT = TLI.getValueType(GV->getType(), true);
+  EVT DestEVT = TLI.getValueType(MF->getDataLayout(), GV->getType(), true);
   if (!DestEVT.isSimple())
     return 0;
 
@@ -459,7 +460,7 @@
 }
 
 unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
-  EVT CEVT = TLI.getValueType(C->getType(), true);
+  EVT CEVT = TLI.getValueType(MF->getDataLayout(), C->getType(), true);
 
   // Only handle simple types.
   if (!CEVT.isSimple())
@@ -538,13 +539,16 @@
   }
   case Instruction::IntToPtr: {
     // Look past no-op inttoptrs.
-    if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+    auto &DL = MF->getDataLayout();
+    if (TLI.getValueType(DL, U->getOperand(0)->getType()) ==
+        TLI.getPointerTy(DL))
       return computeAddress(U->getOperand(0), Addr, Ty);
     break;
   }
   case Instruction::PtrToInt: {
     // Look past no-op ptrtoints.
-    if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
+    auto &DL = MF->getDataLayout();
+    if (TLI.getValueType(DL, U->getType()) == TLI.getPointerTy(DL))
       return computeAddress(U->getOperand(0), Addr, Ty);
     break;
   }
@@ -558,6 +562,7 @@
     for (User::const_op_iterator i = U->op_begin() + 1, e = U->op_end(); i != e;
          ++i, ++GTI) {
       const Value *Op = *i;
+      auto &DL = MF->getDataLayout();
       if (StructType *STy = dyn_cast<StructType>(*GTI)) {
         const StructLayout *SL = DL.getStructLayout(STy);
         unsigned Idx = cast<ConstantInt>(Op)->getZExtValue();
@@ -652,7 +657,7 @@
 
     uint64_t NumBytes = 0;
     if (Ty && Ty->isSized()) {
-      uint64_t NumBits = DL.getTypeSizeInBits(Ty);
+      uint64_t NumBits = MF->getDataLayout().getTypeSizeInBits(Ty);
       NumBytes = NumBits / 8;
       if (!isPowerOf2_64(NumBits))
         NumBytes = 0;
@@ -736,7 +741,7 @@
 
     uint64_t NumBytes = 0;
     if (Ty && Ty->isSized()) {
-      uint64_t NumBits = DL.getTypeSizeInBits(Ty);
+      uint64_t NumBits = MF->getDataLayout().getTypeSizeInBits(Ty);
       NumBytes = NumBits / 8;
       if (!isPowerOf2_64(NumBits))
         NumBytes = 0;
@@ -778,7 +783,7 @@
     if (Addr.getOffsetReg())
       break;
 
-    if (!Ty || DL.getTypeSizeInBits(Ty) != 8)
+    if (!Ty || MF->getDataLayout().getTypeSizeInBits(Ty) != 8)
       break;
 
     const Value *LHS = U->getOperand(0);
@@ -859,6 +864,7 @@
   const User *U = nullptr;
   unsigned Opcode = Instruction::UserOp1;
   bool InMBB = true;
+  auto &DL = MF->getDataLayout();
 
   if (const auto *I = dyn_cast<Instruction>(V)) {
     Opcode = I->getOpcode();
@@ -879,13 +885,13 @@
   case Instruction::IntToPtr:
     // Look past no-op inttoptrs if its operand is in the same BB.
     if (InMBB &&
-        TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+        TLI.getValueType(DL, U->getOperand(0)->getType()) ==
+            TLI.getPointerTy(DL))
       return computeCallAddress(U->getOperand(0), Addr);
     break;
   case Instruction::PtrToInt:
     // Look past no-op ptrtoints if its operand is in the same BB.
-    if (InMBB &&
-        TLI.getValueType(U->getType()) == TLI.getPointerTy())
+    if (InMBB && TLI.getValueType(DL, U->getType()) == TLI.getPointerTy(DL))
       return computeCallAddress(U->getOperand(0), Addr);
     break;
   }
@@ -906,7 +912,7 @@
 
 
 bool AArch64FastISel::isTypeLegal(Type *Ty, MVT &VT) {
-  EVT evt = TLI.getValueType(Ty, true);
+  EVT evt = TLI.getValueType(MF->getDataLayout(), Ty, true);
 
   // Only handle simple types.
   if (evt == MVT::Other || !evt.isSimple())
@@ -1390,7 +1396,7 @@
 
 bool AArch64FastISel::emitCmp(const Value *LHS, const Value *RHS, bool IsZExt) {
   Type *Ty = LHS->getType();
-  EVT EVT = TLI.getValueType(Ty, true);
+  EVT EVT = TLI.getValueType(MF->getDataLayout(), Ty, true);
   if (!EVT.isSimple())
     return false;
   MVT VT = EVT.getSimpleVT();
@@ -2761,7 +2767,8 @@
   if (SrcReg == 0)
     return false;
 
-  EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType(), true);
+  EVT SrcVT =
+      TLI.getValueType(MF->getDataLayout(), I->getOperand(0)->getType(), true);
   if (SrcVT == MVT::f128)
     return false;
 
@@ -2797,7 +2804,8 @@
     return false;
   bool SrcIsKill = hasTrivialKill(I->getOperand(0));
 
-  EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType(), true);
+  EVT SrcVT =
+      TLI.getValueType(MF->getDataLayout(), I->getOperand(0)->getType(), true);
 
   // Handle sign-extension.
   if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) {
@@ -2856,7 +2864,7 @@
     if (ArgTy->isStructTy() || ArgTy->isArrayTy())
       return false;
 
-    EVT ArgVT = TLI.getValueType(ArgTy);
+    EVT ArgVT = TLI.getValueType(MF->getDataLayout(), ArgTy);
     if (!ArgVT.isSimple())
       return false;
 
@@ -2898,7 +2906,7 @@
   unsigned GPRIdx = 0;
   unsigned FPRIdx = 0;
   for (auto const &Arg : F->args()) {
-    MVT VT = TLI.getSimpleValueType(Arg.getType());
+    MVT VT = TLI.getSimpleValueType(MF->getDataLayout(), Arg.getType());
     unsigned SrcReg;
     const TargetRegisterClass *RC;
     if (VT >= MVT::i1 && VT <= MVT::i32) {
@@ -3015,7 +3023,8 @@
       Addr.setReg(AArch64::SP);
       Addr.setOffset(VA.getLocMemOffset() + BEAlign);
 
-      unsigned Alignment = DL.getABITypeAlignment(ArgVal->getType());
+      unsigned Alignment =
+          MF->getDataLayout().getABITypeAlignment(ArgVal->getType());
       MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
         MachinePointerInfo::getStack(Addr.getOffset()),
         MachineMemOperand::MOStore, ArgVT.getStoreSize(), Alignment);
@@ -3462,8 +3471,8 @@
 
     CallLoweringInfo CLI;
     MCContext &Ctx = MF->getContext();
-    CLI.setCallee(DL, Ctx, TLI.getLibcallCallingConv(LC), II->getType(),
-                  TLI.getLibcallName(LC), std::move(Args));
+    CLI.setCallee(MF->getDataLayout(), Ctx, TLI.getLibcallCallingConv(LC),
+                  II->getType(), TLI.getLibcallName(LC), std::move(Args));
     if (!lowerCallTo(CLI))
       return false;
     updateValueMap(II, CLI.ResultReg);
@@ -3689,7 +3698,8 @@
   if (Ret->getNumOperands() > 0) {
     CallingConv::ID CC = F.getCallingConv();
     SmallVector<ISD::OutputArg, 4> Outs;
-    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI);
+    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI,
+                  MF->getDataLayout());
 
     // Analyze operands of the call, assigning locations to each operand.
     SmallVector<CCValAssign, 16> ValLocs;
@@ -3724,7 +3734,7 @@
     if (!MRI.getRegClass(SrcReg)->contains(DestReg))
       return false;
 
-    EVT RVEVT = TLI.getValueType(RV->getType());
+    EVT RVEVT = TLI.getValueType(MF->getDataLayout(), RV->getType());
     if (!RVEVT.isSimple())
       return false;
 
@@ -3772,8 +3782,9 @@
   Value *Op = I->getOperand(0);
   Type *SrcTy = Op->getType();
 
-  EVT SrcEVT = TLI.getValueType(SrcTy, true);
-  EVT DestEVT = TLI.getValueType(DestTy, true);
+  auto &DL = MF->getDataLayout();
+  EVT SrcEVT = TLI.getValueType(DL, SrcTy, true);
+  EVT DestEVT = TLI.getValueType(DL, DestTy, true);
   if (!SrcEVT.isSimple())
     return false;
   if (!DestEVT.isSimple())
@@ -4459,7 +4470,7 @@
 }
 
 bool AArch64FastISel::selectRem(const Instruction *I, unsigned ISDOpcode) {
-  EVT DestEVT = TLI.getValueType(I->getType(), true);
+  EVT DestEVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
   if (!DestEVT.isSimple())
     return false;
 
@@ -4737,8 +4748,8 @@
 
   CallLoweringInfo CLI;
   MCContext &Ctx = MF->getContext();
-  CLI.setCallee(DL, Ctx, TLI.getLibcallCallingConv(LC), I->getType(),
-                TLI.getLibcallName(LC), std::move(Args));
+  CLI.setCallee(MF->getDataLayout(), Ctx, TLI.getLibcallCallingConv(LC),
+                I->getType(), TLI.getLibcallName(LC), std::move(Args));
   if (!lowerCallTo(CLI))
     return false;
   updateValueMap(I, CLI.ResultReg);
@@ -4825,7 +4836,7 @@
   bool IdxNIsKill = hasTrivialKill(Idx);
 
   // If the index is smaller or larger than intptr_t, truncate or extend it.
-  MVT PtrVT = TLI.getPointerTy();
+  MVT PtrVT = TLI.getPointerTy(MF->getDataLayout());
   EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false);
   if (IdxVT.bitsLT(PtrVT)) {
     IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false);
@@ -4849,14 +4860,15 @@
   // into a single N = N + TotalOffset.
   uint64_t TotalOffs = 0;
   Type *Ty = I->getOperand(0)->getType();
-  MVT VT = TLI.getPointerTy();
+  MVT VT = TLI.getPointerTy(MF->getDataLayout());
   for (auto OI = std::next(I->op_begin()), E = I->op_end(); OI != E; ++OI) {
     const Value *Idx = *OI;
     if (auto *StTy = dyn_cast<StructType>(Ty)) {
       unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
       // N = N + Offset
       if (Field)
-        TotalOffs += DL.getStructLayout(StTy)->getElementOffset(Field);
+        TotalOffs +=
+            MF->getDataLayout().getStructLayout(StTy)->getElementOffset(Field);
       Ty = StTy->getElementType(Field);
     } else {
       Ty = cast<SequentialType>(Ty)->getElementType();
@@ -4865,8 +4877,8 @@
         if (CI->isZero())
           continue;
         // N = N + Offset
-        TotalOffs +=
-            DL.getTypeAllocSize(Ty) * cast<ConstantInt>(CI)->getSExtValue();
+        TotalOffs += MF->getDataLayout().getTypeAllocSize(Ty) *
+                     cast<ConstantInt>(CI)->getSExtValue();
         continue;
       }
       if (TotalOffs) {
@@ -4878,7 +4890,7 @@
       }
 
       // N = N + Idx * ElementSize;
-      uint64_t ElementSize = DL.getTypeAllocSize(Ty);
+      uint64_t ElementSize = MF->getDataLayout().getTypeAllocSize(Ty);
       std::pair<unsigned, bool> Pair = getRegForGEPIndex(Idx);
       unsigned IdxN = Pair.first;
       bool IdxNIsKill = Pair.second;
Index: lib/Target/ARM/ARMFastISel.cpp
===================================================================
--- lib/Target/ARM/ARMFastISel.cpp
+++ lib/Target/ARM/ARMFastISel.cpp
@@ -490,6 +490,7 @@
   // Require VFP2 for loading fp constants.
   if (!Subtarget->hasVFP2()) return false;
 
+  auto &DL = MF->getDataLayout();
   // MachineConstantPool wants an explicit alignment.
   unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
   if (Align == 0) {
@@ -555,6 +556,7 @@
   if (VT != MVT::i32)
     return 0;
 
+  auto &DL = MF->getDataLayout();
   // MachineConstantPool wants an explicit alignment.
   unsigned Align = DL.getPrefTypeAlignment(C->getType());
   if (Align == 0) {
@@ -613,6 +615,7 @@
     AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                             TII.get(Opc), DestReg).addGlobalAddress(GV, 0, TF));
   } else {
+    auto &DL = MF->getDataLayout();
     // MachineConstantPool wants an explicit alignment.
     unsigned Align = DL.getPrefTypeAlignment(GV->getType());
     if (Align == 0) {
@@ -685,7 +688,7 @@
 }
 
 unsigned ARMFastISel::fastMaterializeConstant(const Constant *C) {
-  EVT CEVT = TLI.getValueType(C->getType(), true);
+  EVT CEVT = TLI.getValueType(MF->getDataLayout(), C->getType(), true);
 
   // Only handle simple types.
   if (!CEVT.isSimple()) return 0;
@@ -732,7 +735,7 @@
 }
 
 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) {
-  EVT evt = TLI.getValueType(Ty, true);
+  EVT evt = TLI.getValueType(MF->getDataLayout(), Ty, true);
 
   // Only handle simple types.
   if (evt == MVT::Other || !evt.isSimple()) return false;
@@ -786,12 +789,14 @@
       return ARMComputeAddress(U->getOperand(0), Addr);
     case Instruction::IntToPtr:
       // Look past no-op inttoptrs.
-      if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+      if (TLI.getValueType(MF->getDataLayout(), U->getOperand(0)->getType()) ==
+          TLI.getPointerTy(MF->getDataLayout()))
         return ARMComputeAddress(U->getOperand(0), Addr);
       break;
     case Instruction::PtrToInt:
       // Look past no-op ptrtoints.
-      if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
+      if (TLI.getValueType(MF->getDataLayout(), U->getType()) ==
+          TLI.getPointerTy(MF->getDataLayout()))
         return ARMComputeAddress(U->getOperand(0), Addr);
       break;
     case Instruction::GetElementPtr: {
@@ -801,6 +806,7 @@
       // Iterate through the GEP folding the constants into offsets where
       // we can.
       gep_type_iterator GTI = gep_type_begin(U);
+      auto &DL = MF->getDataLayout();
       for (User::const_op_iterator i = U->op_begin() + 1, e = U->op_end();
            i != e; ++i, ++GTI) {
         const Value *Op = *i;
@@ -1365,7 +1371,7 @@
 bool ARMFastISel::ARMEmitCmp(const Value *Src1Value, const Value *Src2Value,
                              bool isZExt) {
   Type *Ty = Src1Value->getType();
-  EVT SrcEVT = TLI.getValueType(Ty, true);
+  EVT SrcEVT = TLI.getValueType(MF->getDataLayout(), Ty, true);
   if (!SrcEVT.isSimple()) return false;
   MVT SrcVT = SrcEVT.getSimpleVT();
 
@@ -1557,7 +1563,7 @@
     return false;
 
   Value *Src = I->getOperand(0);
-  EVT SrcEVT = TLI.getValueType(Src->getType(), true);
+  EVT SrcEVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
   if (!SrcEVT.isSimple())
     return false;
   MVT SrcVT = SrcEVT.getSimpleVT();
@@ -1750,7 +1756,7 @@
 }
 
 bool ARMFastISel::SelectBinaryIntOp(const Instruction *I, unsigned ISDOpcode) {
-  EVT DestVT  = TLI.getValueType(I->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   // We can get here in the case when we have a binary operation on a non-legal
   // type and the target independent selector doesn't know how to handle it.
@@ -1790,7 +1796,7 @@
 }
 
 bool ARMFastISel::SelectBinaryFPOp(const Instruction *I, unsigned ISDOpcode) {
-  EVT FPVT = TLI.getValueType(I->getType(), true);
+  EVT FPVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
   if (!FPVT.isSimple()) return false;
   MVT VT = FPVT.getSimpleVT();
 
@@ -2095,7 +2101,8 @@
   CallingConv::ID CC = F.getCallingConv();
   if (Ret->getNumOperands() > 0) {
     SmallVector<ISD::OutputArg, 4> Outs;
-    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI);
+    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI,
+                  MF->getDataLayout());
 
     // Analyze operands of the call, assigning locations to each operand.
     SmallVector<CCValAssign, 16> ValLocs;
@@ -2122,7 +2129,7 @@
       return false;
 
     unsigned SrcReg = Reg + VA.getValNo();
-    EVT RVEVT = TLI.getValueType(RV->getType());
+    EVT RVEVT = TLI.getValueType(MF->getDataLayout(), RV->getType());
     if (!RVEVT.isSimple()) return false;
     MVT RVVT = RVEVT.getSimpleVT();
     MVT DestVT = VA.getValVT();
@@ -2173,7 +2180,7 @@
 unsigned ARMFastISel::getLibcallReg(const Twine &Name) {
   // Manually compute the global's type to avoid building it when unnecessary.
   Type *GVTy = Type::getInt32PtrTy(*Context, /*AS=*/0);
-  EVT LCREVT = TLI.getValueType(GVTy);
+  EVT LCREVT = TLI.getValueType(MF->getDataLayout(), GVTy);
   if (!LCREVT.isSimple()) return 0;
 
   GlobalValue *GV = new GlobalVariable(M, Type::getInt32Ty(*Context), false,
@@ -2210,6 +2217,7 @@
       return false;
   }
 
+  auto &DL = MF->getDataLayout();
   // Set up the argument vectors.
   SmallVector<Value*, 8> Args;
   SmallVector<unsigned, 8> ArgRegs;
@@ -2321,6 +2329,7 @@
       return false;
   }
 
+  auto &DL = MF->getDataLayout();
   // Set up the argument vectors.
   SmallVector<Value*, 8> Args;
   SmallVector<unsigned, 8> ArgRegs;
@@ -2576,8 +2585,8 @@
   Value *Op = I->getOperand(0);
 
   EVT SrcVT, DestVT;
-  SrcVT = TLI.getValueType(Op->getType(), true);
-  DestVT = TLI.getValueType(I->getType(), true);
+  SrcVT = TLI.getValueType(MF->getDataLayout(), Op->getType(), true);
+  DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
     return false;
@@ -2742,8 +2751,8 @@
   if (!SrcReg) return false;
 
   EVT SrcEVT, DestEVT;
-  SrcEVT = TLI.getValueType(SrcTy, true);
-  DestEVT = TLI.getValueType(DestTy, true);
+  SrcEVT = TLI.getValueType(MF->getDataLayout(), SrcTy, true);
+  DestEVT = TLI.getValueType(MF->getDataLayout(), DestTy, true);
   if (!SrcEVT.isSimple()) return false;
   if (!DestEVT.isSimple()) return false;
 
@@ -2763,7 +2772,7 @@
     return false;
 
   // Only handle i32 now.
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
   if (DestVT != MVT::i32)
     return false;
 
@@ -3026,7 +3035,7 @@
     if (ArgTy->isStructTy() || ArgTy->isArrayTy() || ArgTy->isVectorTy())
       return false;
 
-    EVT ArgVT = TLI.getValueType(ArgTy);
+    EVT ArgVT = TLI.getValueType(MF->getDataLayout(), ArgTy);
     if (!ArgVT.isSimple()) return false;
     switch (ArgVT.getSimpleVT().SimpleTy) {
     case MVT::i8:
Index: lib/Target/Mips/MipsFastISel.cpp
===================================================================
--- lib/Target/Mips/MipsFastISel.cpp
+++ lib/Target/Mips/MipsFastISel.cpp
@@ -267,7 +267,8 @@
 }
 
 unsigned MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
-  assert(TLI.getValueType(AI->getType(), true) == MVT::i32 &&
+  assert(TLI.getValueType(MF->getDataLayout(), AI->getType(), true) ==
+             MVT::i32 &&
          "Alloca should always return a pointer.");
 
   DenseMap<const AllocaInst *, int>::iterator SI =
@@ -382,7 +383,7 @@
 // Materialize a constant into a register, and return the register
 // number (or zero if we failed to handle it).
 unsigned MipsFastISel::fastMaterializeConstant(const Constant *C) {
-  EVT CEVT = TLI.getValueType(C->getType(), true);
+  EVT CEVT = TLI.getValueType(MF->getDataLayout(), C->getType(), true);
 
   // Only handle simple types.
   if (!CEVT.isSimple())
@@ -425,6 +426,7 @@
   case Instruction::GetElementPtr: {
     Address SavedAddr = Addr;
     uint64_t TmpOffset = Addr.getOffset();
+    auto &DL = MF->getDataLayout();
     // Iterate through the GEP folding the constants into offsets where
     // we can.
     gep_type_iterator GTI = gep_type_begin(U);
@@ -507,12 +509,14 @@
     break;
   case Instruction::IntToPtr:
     // Look past no-op inttoptrs if its operand is in the same BB.
-    if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+    if (TLI.getValueType(MF->getDataLayout(), U->getOperand(0)->getType()) ==
+        TLI.getPointerTy(MF->getDataLayout()))
       return computeCallAddress(U->getOperand(0), Addr);
     break;
   case Instruction::PtrToInt:
     // Look past no-op ptrtoints if its operand is in the same BB.
-    if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
+    if (TLI.getValueType(MF->getDataLayout(), U->getType()) ==
+        TLI.getPointerTy(MF->getDataLayout()))
       return computeCallAddress(U->getOperand(0), Addr);
     break;
   }
@@ -532,7 +536,7 @@
 }
 
 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) {
-  EVT evt = TLI.getValueType(Ty, true);
+  EVT evt = TLI.getValueType(MF->getDataLayout(), Ty, true);
   // Only handle simple types.
   if (evt == MVT::Other || !evt.isSimple())
     return false;
@@ -931,8 +935,8 @@
   if (UnsupportedFPMode)
     return false;
   Value *Src = I->getOperand(0);
-  EVT SrcVT = TLI.getValueType(Src->getType(), true);
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT SrcVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::f32 || DestVT != MVT::f64)
     return false;
@@ -998,8 +1002,8 @@
   if (UnsupportedFPMode)
     return false;
   Value *Src = I->getOperand(0);
-  EVT SrcVT = TLI.getValueType(Src->getType(), true);
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT SrcVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::f64 || DestVT != MVT::f32)
     return false;
@@ -1184,7 +1188,7 @@
       Addr.setKind(Address::RegBase);
       Addr.setReg(Mips::SP);
       Addr.setOffset(VA.getLocMemOffset() + BEAlign);
-
+      auto &DL = MF->getDataLayout();
       unsigned Alignment = DL.getABITypeAlignment(ArgVal->getType());
       MachineMemOperand *MMO = FuncInfo.MF->getMachineMemOperand(
           MachinePointerInfo::getStack(Addr.getOffset()),
@@ -1415,7 +1419,8 @@
   if (Ret->getNumOperands() > 0) {
     CallingConv::ID CC = F.getCallingConv();
     SmallVector<ISD::OutputArg, 4> Outs;
-    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI);
+    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI,
+                  MF->getDataLayout());
     // Analyze operands of the call, assigning locations to each operand.
     SmallVector<CCValAssign, 16> ValLocs;
     MipsCCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs,
@@ -1449,7 +1454,7 @@
     if (!MRI.getRegClass(SrcReg)->contains(DestReg))
       return false;
 
-    EVT RVEVT = TLI.getValueType(RV->getType());
+    EVT RVEVT = TLI.getValueType(MF->getDataLayout(), RV->getType());
     if (!RVEVT.isSimple())
       return false;
 
@@ -1493,8 +1498,8 @@
   Value *Op = I->getOperand(0);
 
   EVT SrcVT, DestVT;
-  SrcVT = TLI.getValueType(Op->getType(), true);
-  DestVT = TLI.getValueType(I->getType(), true);
+  SrcVT = TLI.getValueType(MF->getDataLayout(), Op->getType(), true);
+  DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
     return false;
@@ -1521,8 +1526,8 @@
     return false;
 
   EVT SrcEVT, DestEVT;
-  SrcEVT = TLI.getValueType(SrcTy, true);
-  DestEVT = TLI.getValueType(DestTy, true);
+  SrcEVT = TLI.getValueType(MF->getDataLayout(), SrcTy, true);
+  DestEVT = TLI.getValueType(MF->getDataLayout(), DestTy, true);
   if (!SrcEVT.isSimple())
     return false;
   if (!DestEVT.isSimple())
@@ -1620,7 +1625,7 @@
 }
 
 bool MipsFastISel::selectDivRem(const Instruction *I, unsigned ISDOpcode) {
-  EVT DestEVT = TLI.getValueType(I->getType(), true);
+  EVT DestEVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
   if (!DestEVT.isSimple())
     return false;
 
@@ -1685,7 +1690,8 @@
     if (!TempReg)
       return false;
 
-    MVT Op0MVT = TLI.getValueType(Op0->getType(), true).getSimpleVT();
+    MVT Op0MVT = TLI.getValueType(MF->getDataLayout(), Op0->getType(), true)
+                     .getSimpleVT();
     bool IsZExt = Opcode == Instruction::LShr;
     if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt))
       return false;
@@ -1803,7 +1809,8 @@
   unsigned VReg = getRegForValue(V);
   if (VReg == 0)
     return 0;
-  MVT VMVT = TLI.getValueType(V->getType(), true).getSimpleVT();
+  MVT VMVT =
+      TLI.getValueType(MF->getDataLayout(), V->getType(), true).getSimpleVT();
   if ((VMVT == MVT::i8) || (VMVT == MVT::i16)) {
     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);
     if (!emitIntExt(VMVT, VReg, MVT::i32, TempReg, IsUnsigned))
Index: lib/Target/PowerPC/PPCFastISel.cpp
===================================================================
--- lib/Target/PowerPC/PPCFastISel.cpp
+++ lib/Target/PowerPC/PPCFastISel.cpp
@@ -262,7 +262,7 @@
 // fast-isel, and return its equivalent machine type in VT.
 // FIXME: Copied directly from ARM -- factor into base class?
 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) {
-  EVT Evt = TLI.getValueType(Ty, true);
+  EVT Evt = TLI.getValueType(MF->getDataLayout(), Ty, true);
 
   // Only handle simple types.
   if (Evt == MVT::Other || !Evt.isSimple()) return false;
@@ -324,17 +324,20 @@
       return PPCComputeAddress(U->getOperand(0), Addr);
     case Instruction::IntToPtr:
       // Look past no-op inttoptrs.
-      if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+      if (TLI.getValueType(MF->getDataLayout(), U->getOperand(0)->getType()) ==
+          TLI.getPointerTy(MF->getDataLayout()))
         return PPCComputeAddress(U->getOperand(0), Addr);
       break;
     case Instruction::PtrToInt:
       // Look past no-op ptrtoints.
-      if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
+      if (TLI.getValueType(MF->getDataLayout(), U->getType()) ==
+          TLI.getPointerTy(MF->getDataLayout()))
         return PPCComputeAddress(U->getOperand(0), Addr);
       break;
     case Instruction::GetElementPtr: {
       Address SavedAddr = Addr;
       long TmpOffset = Addr.Offset;
+      auto &DL = MF->getDataLayout();
 
       // Iterate through the GEP folding the constants into offsets where
       // we can.
@@ -799,7 +802,7 @@
 bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
                              bool IsZExt, unsigned DestReg) {
   Type *Ty = SrcValue1->getType();
-  EVT SrcEVT = TLI.getValueType(Ty, true);
+  EVT SrcEVT = TLI.getValueType(MF->getDataLayout(), Ty, true);
   if (!SrcEVT.isSimple())
     return false;
   MVT SrcVT = SrcEVT.getSimpleVT();
@@ -893,8 +896,8 @@
 // Attempt to fast-select a floating-point extend instruction.
 bool PPCFastISel::SelectFPExt(const Instruction *I) {
   Value *Src  = I->getOperand(0);
-  EVT SrcVT  = TLI.getValueType(Src->getType(), true);
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT SrcVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::f32 || DestVT != MVT::f64)
     return false;
@@ -911,8 +914,8 @@
 // Attempt to fast-select a floating-point truncate instruction.
 bool PPCFastISel::SelectFPTrunc(const Instruction *I) {
   Value *Src  = I->getOperand(0);
-  EVT SrcVT  = TLI.getValueType(Src->getType(), true);
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT SrcVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::f64 || DestVT != MVT::f32)
     return false;
@@ -992,7 +995,7 @@
     return false;
 
   Value *Src = I->getOperand(0);
-  EVT SrcEVT = TLI.getValueType(Src->getType(), true);
+  EVT SrcEVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
   if (!SrcEVT.isSimple())
     return false;
 
@@ -1157,7 +1160,7 @@
 // Attempt to fast-select a binary integer operation that isn't already
 // handled automatically.
 bool PPCFastISel::SelectBinaryIntOp(const Instruction *I, unsigned ISDOpcode) {
-  EVT DestVT  = TLI.getValueType(I->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   // We can get here in the case when we have a binary operation on a non-legal
   // type and the target independent selector doesn't know how to handle it.
@@ -1594,7 +1597,8 @@
 
   if (Ret->getNumOperands() > 0) {
     SmallVector<ISD::OutputArg, 4> Outs;
-    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI);
+    GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI,
+                  MF->getDataLayout());
 
     // Analyze operands of the call, assigning locations to each operand.
     SmallVector<CCValAssign, 16> ValLocs;
@@ -1641,7 +1645,7 @@
         RetRegs.push_back(VA.getLocReg());
         unsigned SrcReg = Reg + VA.getValNo();
 
-        EVT RVEVT = TLI.getValueType(RV->getType());
+        EVT RVEVT = TLI.getValueType(MF->getDataLayout(), RV->getType());
         if (!RVEVT.isSimple())
           return false;
         MVT RVVT = RVEVT.getSimpleVT();
@@ -1769,8 +1773,8 @@
 // Attempt to fast-select an integer truncate instruction.
 bool PPCFastISel::SelectTrunc(const Instruction *I) {
   Value *Src  = I->getOperand(0);
-  EVT SrcVT  = TLI.getValueType(Src->getType(), true);
-  EVT DestVT = TLI.getValueType(I->getType(), true);
+  EVT SrcVT = TLI.getValueType(MF->getDataLayout(), Src->getType(), true);
+  EVT DestVT = TLI.getValueType(MF->getDataLayout(), I->getType(), true);
 
   if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16)
     return false;
@@ -1806,8 +1810,8 @@
   if (!SrcReg) return false;
 
   EVT SrcEVT, DestEVT;
-  SrcEVT = TLI.getValueType(SrcTy, true);
-  DestEVT = TLI.getValueType(DestTy, true);
+  SrcEVT = TLI.getValueType(MF->getDataLayout(), SrcTy, true);
+  DestEVT = TLI.getValueType(MF->getDataLayout(), DestTy, true);
   if (!SrcEVT.isSimple())
     return false;
   if (!DestEVT.isSimple())
@@ -1891,7 +1895,7 @@
     return 0;
 
   // All FP constants are loaded from the constant pool.
-  unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
+  unsigned Align = MF->getDataLayout().getPrefTypeAlignment(CFP->getType());
   assert(Align > 0 && "Unexpectedly missing alignment information!");
   unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
@@ -2127,7 +2131,7 @@
 // Materialize a constant into a register, and return the register
 // number (or zero if we failed to handle it).
 unsigned PPCFastISel::fastMaterializeConstant(const Constant *C) {
-  EVT CEVT = TLI.getValueType(C->getType(), true);
+  EVT CEVT = TLI.getValueType(MF->getDataLayout(), C->getType(), true);
 
   // Only handle simple types.
   if (!CEVT.isSimple()) return 0;
Index: lib/Target/X86/X86FastISel.cpp
===================================================================
--- lib/Target/X86/X86FastISel.cpp
+++ lib/Target/X86/X86FastISel.cpp
@@ -494,6 +494,7 @@
 bool X86FastISel::X86FastEmitStore(EVT VT, const Value *Val,
                                    X86AddressMode &AM,
                                    MachineMemOperand *MMO, bool Aligned) {
+  auto &DL = MF->getDataLayout();
   // Handle 'null' like i32/i64 0.
   if (isa<ConstantPointerNull>(Val))
     Val = Constant::getNullValue(DL.getIntPtrType(Val->getContext()));
@@ -728,6 +729,7 @@
 
   case Instruction::GetElementPtr: {
     X86AddressMode SavedAM = AM;
+    auto &DL = MF->getDataLayout();
 
     // Pattern-match simple GEPs.
     uint64_t Disp = (int32_t)AM.Disp;
@@ -949,6 +951,7 @@
   if (!isTypeLegal(Val->getType(), VT, /*AllowI1=*/true))
     return false;
 
+  auto &DL = MF->getDataLayout();
   unsigned Alignment = S->getAlignment();
   unsigned ABIAlignment = DL.getABITypeAlignment(Val->getType());
   if (Alignment == 0) // Ensure that codegen never sees alignment 0
@@ -1111,6 +1114,7 @@
   if (!X86SelectAddress(Ptr, AM))
     return false;
 
+  auto &DL = MF->getDataLayout();
   unsigned Alignment = LI->getAlignment();
   unsigned ABIAlignment = DL.getABITypeAlignment(LI->getType());
   if (Alignment == 0) // Ensure that codegen never sees alignment 0
@@ -1177,6 +1181,7 @@
   unsigned Op0Reg = getRegForValue(Op0);
   if (Op0Reg == 0) return false;
 
+  auto &DL = MF->getDataLayout();
   // Handle 'null' like i32/i64 0.
   if (isa<ConstantPointerNull>(Op1))
     Op1 = Constant::getNullValue(DL.getIntPtrType(Op0->getContext()));
@@ -3012,6 +3017,7 @@
       if (isa<UndefValue>(ArgVal))
         continue;
 
+      auto &DL = MF->getDataLayout();
       unsigned LocMemOffset = VA.getLocMemOffset();
       X86AddressMode AM;
       AM.Base.Reg = RegInfo->getStackRegister();
@@ -3349,6 +3355,7 @@
     return 0;
   }
 
+  auto &DL = MF->getDataLayout();
   // MachineConstantPool wants an explicit alignment.
   unsigned Align = DL.getPrefTypeAlignment(CFP->getType());
   if (Align == 0) {
@@ -3522,6 +3529,7 @@
 
   const X86InstrInfo &XII = (const X86InstrInfo &)TII;
 
+  auto &DL = MF->getDataLayout();
   unsigned Size = DL.getTypeAllocSize(LI->getType());
   unsigned Alignment = LI->getAlignment();