diff --git a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td --- a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td +++ b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td @@ -1232,7 +1232,7 @@ // has 2 operands, neg the second one multiclass F_ATOMIC_2_NEG_imp Pred> { + list Pred> { def reg : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, regclass:$b), !strconcat( "{{ \n\t", @@ -1244,12 +1244,11 @@ Requires; } multiclass F_ATOMIC_2_NEG Pred = []> { + string TypeStr, string OpcStr, PatFrag IntOp, list Pred = []> { defm p32: F_ATOMIC_2_NEG_imp ; + IntOp, Pred> ; defm p64: F_ATOMIC_2_NEG_imp ; + IntOp, Pred> ; } // has 3 operands @@ -1357,21 +1356,21 @@ (atomic_load_sub_64 node:$a, node:$b)>; defm INT_PTX_ATOM_SUB_G_32 : F_ATOMIC_2_NEG; + atomic_load_sub_32_g>; defm INT_PTX_ATOM_SUB_G_64 : F_ATOMIC_2_NEG; + atomic_load_sub_64_g>; defm INT_PTX_ATOM_SUB_GEN_32 : F_ATOMIC_2_NEG; + atomic_load_sub_32_gen>; defm INT_PTX_ATOM_SUB_GEN_32_USE_G : F_ATOMIC_2_NEG; + ".add", atomic_load_sub_32_gen>; defm INT_PTX_ATOM_SUB_S_32 : F_ATOMIC_2_NEG; + atomic_load_sub_32_s>; defm INT_PTX_ATOM_SUB_S_64 : F_ATOMIC_2_NEG; + atomic_load_sub_64_s>; defm INT_PTX_ATOM_SUB_GEN_64 : F_ATOMIC_2_NEG; + atomic_load_sub_64_gen>; defm INT_PTX_ATOM_SUB_GEN_64_USE_G : F_ATOMIC_2_NEG; + ".add", atomic_load_sub_64_gen>; // atom_swap