diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -12680,7 +12680,8 @@ int ArgNum, unsigned ExpectedFieldNum, bool AllowName); bool SemaBuiltinARMMemoryTaggingCall(unsigned BuiltinID, CallExpr *TheCall); - bool SemaBuiltinPPCMMACall(CallExpr *TheCall, const char *TypeDesc); + bool SemaBuiltinPPCMMACall(CallExpr *TheCall, unsigned BuiltinID, + const char *TypeDesc); bool CheckPPCMMAType(QualType Type, SourceLocation TypeLoc); diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp --- a/clang/lib/AST/ASTContext.cpp +++ b/clang/lib/AST/ASTContext.cpp @@ -1444,13 +1444,10 @@ #include "clang/Basic/AArch64SVEACLETypes.def" } - if (Target.getTriple().isPPC64() && - Target.hasFeature("paired-vector-memops")) { - if (Target.hasFeature("mma")) { + if (Target.getTriple().isPPC64()) { #define PPC_VECTOR_MMA_TYPE(Name, Id, Size) \ InitBuiltinType(Id##Ty, BuiltinType::Id); #include "clang/Basic/PPCTypes.def" - } #define PPC_VECTOR_VSX_TYPE(Name, Id, Size) \ InitBuiltinType(Id##Ty, BuiltinType::Id); #include "clang/Basic/PPCTypes.def" diff --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp --- a/clang/lib/Sema/Sema.cpp +++ b/clang/lib/Sema/Sema.cpp @@ -403,13 +403,10 @@ #include "clang/Basic/AArch64SVEACLETypes.def" } - if (Context.getTargetInfo().getTriple().isPPC64() && - Context.getTargetInfo().hasFeature("paired-vector-memops")) { - if (Context.getTargetInfo().hasFeature("mma")) { + if (Context.getTargetInfo().getTriple().isPPC64()) { #define PPC_VECTOR_MMA_TYPE(Name, Id, Size) \ addImplicitTypedef(#Name, Context.Id##Ty); #include "clang/Basic/PPCTypes.def" - } #define PPC_VECTOR_VSX_TYPE(Name, Id, Size) \ addImplicitTypedef(#Name, Context.Id##Ty); #include "clang/Basic/PPCTypes.def" diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -3516,9 +3516,9 @@ case PPC::BI__builtin_ppc_store8r: return SemaFeatureCheck(*this, TheCall, "isa-v206-instructions", diag::err_ppc_builtin_only_on_arch, "7"); -#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ - case PPC::BI__builtin_##Name: \ - return SemaBuiltinPPCMMACall(TheCall, Types); +#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ + case PPC::BI__builtin_##Name: \ + return SemaBuiltinPPCMMACall(TheCall, BuiltinID, Types); #include "clang/Basic/BuiltinsPPC.def" } return SemaBuiltinConstantArgRange(TheCall, i, l, u); @@ -7476,11 +7476,35 @@ /// Emit an error and return true on failure; return false on success. /// TypeStr is a string containing the type descriptor of the value returned by /// the builtin and the descriptors of the expected type of the arguments. -bool Sema::SemaBuiltinPPCMMACall(CallExpr *TheCall, const char *TypeStr) { +bool Sema::SemaBuiltinPPCMMACall(CallExpr *TheCall, unsigned BuiltinID, + const char *TypeStr) { assert((TypeStr[0] != '\0') && "Invalid types in PPC MMA builtin declaration"); + switch (BuiltinID) { + default: + // This function is called in CheckPPCBuiltinFunctionCall where the + // BuiltinID is guaranteed to be an MMA or pair vector memop builtin, here + // we are isolating the pair vector memop builtins that can be used with mma + // off so the default case is every builtin that requires mma and paired + // vector memops. + if (SemaFeatureCheck(*this, TheCall, "paired-vector-memops", + diag::err_ppc_builtin_only_on_arch, "10") || + SemaFeatureCheck(*this, TheCall, "mma", + diag::err_ppc_builtin_only_on_arch, "10")) + return true; + break; + case PPC::BI__builtin_vsx_lxvp: + case PPC::BI__builtin_vsx_stxvp: + case PPC::BI__builtin_vsx_assemble_pair: + case PPC::BI__builtin_vsx_disassemble_pair: + if (SemaFeatureCheck(*this, TheCall, "paired-vector-memops", + diag::err_ppc_builtin_only_on_arch, "10")) + return true; + break; + } + unsigned Mask = 0; unsigned ArgNum = 0; diff --git a/clang/test/AST/ast-dump-ppc-types.c b/clang/test/AST/ast-dump-ppc-types.c --- a/clang/test/AST/ast-dump-ppc-types.c +++ b/clang/test/AST/ast-dump-ppc-types.c @@ -1,13 +1,9 @@ -// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu future \ +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr10 \ // RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s -// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu future \ -// RUN: -target-feature -mma -ast-dump %s | FileCheck %s \ -// RUN: --check-prefix=CHECK-NO-MMA -// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu future \ -// RUN: -target-feature -paired-vector-memops -ast-dump %s | FileCheck %s \ -// RUN: --check-prefix=CHECK-NO-PAIRED // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr9 \ -// RUN: -ast-dump %s | FileCheck %s --check-prefix=CHECK-PWR9 +// RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \ +// RUN: -ast-dump -ast-dump-filter __vector %s | FileCheck %s // RUN: %clang_cc1 -triple x86_64-unknown-unknown -ast-dump %s | FileCheck %s \ // RUN: --check-prefix=CHECK-X86_64 // RUN: %clang_cc1 -triple arm-unknown-unknown -ast-dump %s | FileCheck %s \ @@ -24,15 +20,6 @@ // CHECK: TypedefDecl {{.*}} implicit __vector_pair '__vector_pair' // CHECK-NEXT: -BuiltinType {{.*}} '__vector_pair' -// CHECK-NO-MMA-NOT: __vector_quad -// CHECK-NO-MMA: __vector_pair - -// CHECK-NO-PAIRED-NOT: __vector_quad -// CHECK-NO-PAIRED-NOT: __vector_pair - -// CHECK-PWR9-NOT: __vector_quad -// CHECK-PWR9-NOT: __vector_pair - // CHECK-X86_64-NOT: __vector_quad // CHECK-X86_64-NOT: __vector_pair diff --git a/clang/test/CodeGen/ppc-mma-types.c b/clang/test/CodeGen/ppc-mma-types.c --- a/clang/test/CodeGen/ppc-mma-types.c +++ b/clang/test/CodeGen/ppc-mma-types.c @@ -1,5 +1,9 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu future \ +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr10 \ +// RUN: -emit-llvm -O3 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr9 \ +// RUN: -emit-llvm -O3 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr8 \ // RUN: -emit-llvm -O3 -o - %s | FileCheck %s // CHECK-LABEL: @test1( diff --git a/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp b/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp --- a/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp +++ b/clang/test/CodeGenCXX/ppc-mangle-mma-types.cpp @@ -1,4 +1,8 @@ -// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu future %s \ +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr10 %s \ +// RUN: -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr9 %s \ +// RUN: -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu pwr8 %s \ // RUN: -emit-llvm -o - | FileCheck %s // CHECK: _Z2f1Pu13__vector_quad diff --git a/clang/test/Sema/ppc-mma-builtins.c b/clang/test/Sema/ppc-mma-builtins.c new file mode 100644 --- /dev/null +++ b/clang/test/Sema/ppc-mma-builtins.c @@ -0,0 +1,33 @@ +// REQUIRES: powerpc-registered-target +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr10 \ +// RUN: -target-feature -mma -fsyntax-only %s -verify + +void test1(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __vector_pair res; + __builtin_vsx_assemble_pair(&res, vc, vc); +} + +void test2(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __builtin_vsx_disassemble_pair(resp, (__vector_pair*)vpp); +} + +void test3(const __vector_pair *vpp, signed long offset, const __vector_pair *vp2) { + __vector_pair vp = __builtin_vsx_lxvp(offset, vpp); + __builtin_vsx_stxvp(vp, offset, vp2); +} + +void test4(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __vector_quad vq = *((__vector_quad *)vqp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_xxmtacc(&vq); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} + *((__vector_quad *)resp) = vq; +} + +void test5(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __vector_quad vq = *((__vector_quad *)vqp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_pmxvf64ger(&vq, vp, vc, 0, 0); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} + *((__vector_quad *)resp) = vq; +} + + diff --git a/clang/test/Sema/ppc-paired-vector-builtins.c b/clang/test/Sema/ppc-paired-vector-builtins.c new file mode 100644 --- /dev/null +++ b/clang/test/Sema/ppc-paired-vector-builtins.c @@ -0,0 +1,28 @@ +// REQUIRES: powerpc-registered-target +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr10 \ +// RUN: -target-feature -paired-vector-memops -fsyntax-only %s -verify +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr9 \ +// RUN: -fsyntax-only %s -verify + +void test1(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __vector_pair res; + __builtin_vsx_assemble_pair(&res, vc, vc); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} +} + +void test2(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __builtin_vsx_disassemble_pair(resp, (__vector_pair*)vpp); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} +} + +void test3(const __vector_pair *vpp, signed long long offset, const __vector_pair *vp2) { + __vector_pair vp = __builtin_vsx_lxvp(offset, vpp); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} + __builtin_vsx_stxvp(vp, offset, vp2); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} +} + +void test4(unsigned char *vqp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { + __vector_quad vq = *((__vector_quad *)vqp); + __vector_pair vp = *((__vector_pair *)vpp); + __builtin_mma_xxmtacc(&vq); // expected-error {{this builtin is only valid on POWER10 or later CPUs}} + *((__vector_quad *)resp) = vq; +} + +