diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -616,6 +616,7 @@
                                    FeatureRCPC,
                                    FeaturePerfMon,
                                    FeaturePostRAScheduler,
+                                   FeatureFuseAddress,
                                    ]>;
 
 def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
diff --git a/llvm/test/CodeGen/AArch64/a55-fuse-address.mir b/llvm/test/CodeGen/AArch64/a55-fuse-address.mir
--- a/llvm/test/CodeGen/AArch64/a55-fuse-address.mir
+++ b/llvm/test/CodeGen/AArch64/a55-fuse-address.mir
@@ -11,8 +11,8 @@
   ; CHECK-LABEL: fuseaddress:
   ; CHECK:       // %bb.0: // %entry
   ; CHECK-NEXT:    adrp x8, a
-  ; CHECK-NEXT:    adrp x9, b
   ; CHECK-NEXT:    ldr w8, [x8, :lo12:a]
+  ; CHECK-NEXT:    adrp x9, b
   ; CHECK-NEXT:    ldr w9, [x9, :lo12:b]
   ; CHECK-NEXT:    mul w8, w8, w0
   ; CHECK-NEXT:    mul w0, w8, w9