Index: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -856,7 +856,7 @@
 
   Instruction::BinaryOps Opcode = I.getOpcode();
   SimplifyQuery Q = SQ.getWithInstruction(&I);
-
+  SelectInst *InnerSI = nullptr;
   Value *Cond, *True = nullptr, *False = nullptr;
   if (LHSIsSelect && RHSIsSelect && A == D) {
     // (A ? B : C) op (A ? E : F) -> A ? (B op E) : (C op F)
@@ -873,20 +873,38 @@
   } else if (LHSIsSelect && LHS->hasOneUse()) {
     // (A ? B : C) op Y -> A ? (B op Y) : (C op Y)
     Cond = A;
+    if (I.getOpcode() == BinaryOperator::Xor) return nullptr;
     True = SimplifyBinOp(Opcode, B, RHS, FMF, Q);
     False = SimplifyBinOp(Opcode, C, RHS, FMF, Q);
+
+    if (isa_and_nonnull<Constant>(False) && !True)
+      True = Builder.CreateBinOp(Opcode, B, RHS);
+    else if (isa_and_nonnull<Constant>(True) && !False)
+      False = Builder.CreateBinOp(Opcode, C, RHS);
+
+    InnerSI = cast<SelectInst>(LHS);
   } else if (RHSIsSelect && RHS->hasOneUse()) {
     // X op (D ? E : F) -> D ? (X op E) : (X op F)
     Cond = D;
     True = SimplifyBinOp(Opcode, LHS, E, FMF, Q);
     False = SimplifyBinOp(Opcode, LHS, F, FMF, Q);
+
+    if (isa_and_nonnull<Constant>(False) && !True)
+      True = Builder.CreateBinOp(Opcode, LHS, E);
+    else if (isa_and_nonnull<Constant>(True) && !False)
+      False = Builder.CreateBinOp(Opcode, LHS, F);
+
+    InnerSI = cast<SelectInst>(RHS);
   }
 
   if (!True || !False)
     return nullptr;
 
-  Value *SI = Builder.CreateSelect(Cond, True, False);
+  SelectInst *SI = cast<SelectInst>(Builder.CreateSelect(Cond, True, False));
   SI->takeName(&I);
+  if (InnerSI)
+    SI->copyMetadata(*InnerSI);
+
   return SI;
 }
 
Index: llvm/test/Transforms/InstCombine/and2.ll
===================================================================
--- llvm/test/Transforms/InstCombine/and2.ll
+++ llvm/test/Transforms/InstCombine/and2.ll
@@ -48,8 +48,8 @@
 ; CHECK-LABEL: @test7_logical(
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 [[I:%.*]], 1
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[I]], -1
-; CHECK-NEXT:    [[AND1:%.*]] = select i1 [[CMP1]], i1 [[B:%.*]], i1 false
-; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[AND1]], [[CMP2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = and i1 [[CMP2]], [[B:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = select i1 [[CMP1]], i1 [[TMP1]], i1 false
 ; CHECK-NEXT:    ret i1 [[AND2]]
 ;
   %cmp1 = icmp slt i32 %i, 1
Index: llvm/test/Transforms/InstCombine/binop-select.ll
===================================================================
--- llvm/test/Transforms/InstCombine/binop-select.ll
+++ llvm/test/Transforms/InstCombine/binop-select.ll
@@ -6,9 +6,8 @@
 define i32 @test1(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 [[Y:%.*]]
-; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[COND]], [[X]]
+; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:    [[ADD:%.*]] = select i1 [[C:%.*]], i32 0, i32 [[TMP0]]
 ; CHECK-NEXT:    ret i32 [[ADD]]
 ;
 entry:
@@ -21,9 +20,8 @@
 define i32 @test2(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[SUB:%.*]] = sub i32 0, [[X:%.*]]
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 [[X]]
-; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[COND]], [[X]]
+; CHECK-NEXT:    [[TMP0:%.*]] = shl i32 [[X:%.*]], 1
+; CHECK-NEXT:    [[ADD:%.*]] = select i1 [[C:%.*]], i32 0, i32 [[TMP0]]
 ; CHECK-NEXT:    ret i32 [[ADD]]
 ;
 entry:
@@ -89,6 +87,7 @@
   ret i32 %and
 }
 
+; FIXME: We should push div into select.
 define i32 @test7(i1 %c, i32 %x) {
 ; CHECK-LABEL: @test7(
 ; CHECK-NEXT:  entry:
@@ -104,7 +103,7 @@
   ret i32 %div
 }
 
-
+; FIXME: We should push div into select.
 define i32 @test8(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test8(
 ; CHECK-NEXT:  entry:
@@ -118,6 +117,7 @@
   ret i32 %div
 }
 
+; FIXME: We should push sub into select.
 define i32 @test9(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test9(
 ; CHECK-NEXT:  entry:
@@ -131,6 +131,7 @@
   ret i32 %sub
 }
 
+; FIXME: We should push div into select.
 define i32 @test10(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test10(
 ; CHECK-NEXT:  entry:
@@ -144,6 +145,7 @@
   ret i32 %div
 }
 
+; FIXME: We should push rem op into select.
 define i32 @test11(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test11(
 ; CHECK-NEXT:  entry:
@@ -157,6 +159,7 @@
   ret i32 %div
 }
 
+; FIXME: We should push rem op into select.
 define i32 @test12(i1 %c, i32 %x, i32 %y) {
 ; CHECK-LABEL: @test12(
 ; CHECK-NEXT:  entry:
Index: llvm/test/Transforms/InstCombine/icmp-add.ll
===================================================================
--- llvm/test/Transforms/InstCombine/icmp-add.ll
+++ llvm/test/Transforms/InstCombine/icmp-add.ll
@@ -979,9 +979,9 @@
 
 define i32 @increment_max(i32 %x) {
 ; CHECK-LABEL: @increment_max(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -1
-; CHECK-NEXT:    [[S:%.*]] = add nsw i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[X:%.*]], 1
+; CHECK-NEXT:    [[DOTINV:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[DOTINV]], i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[S]]
 ;
   %a = add nsw i32 %x, 1
@@ -993,8 +993,8 @@
 define i32 @decrement_max(i32 %x) {
 ; CHECK-LABEL: @decrement_max(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 1
-; CHECK-NEXT:    [[S:%.*]] = add nsw i32 [[TMP2]], -1
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], -1
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 0
 ; CHECK-NEXT:    ret i32 [[S]]
 ;
   %a = add nsw i32 %x, -1
@@ -1006,8 +1006,8 @@
 define i32 @increment_min(i32 %x) {
 ; CHECK-LABEL: @increment_min(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -1
-; CHECK-NEXT:    [[S:%.*]] = add nsw i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], 1
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 0
 ; CHECK-NEXT:    ret i32 [[S]]
 ;
   %a = add nsw i32 %x, 1
@@ -1018,9 +1018,9 @@
 
 define i32 @decrement_min(i32 %x) {
 ; CHECK-LABEL: @decrement_min(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 1
-; CHECK-NEXT:    [[S:%.*]] = add nsw i32 [[TMP2]], -1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[X:%.*]], -1
+; CHECK-NEXT:    [[DOTINV:%.*]] = icmp sgt i32 [[X]], 0
+; CHECK-NEXT:    [[S:%.*]] = select i1 [[DOTINV]], i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[S]]
 ;
   %a = add nsw i32 %x, -1
Index: llvm/test/Transforms/InstCombine/max_known_bits.ll
===================================================================
--- llvm/test/Transforms/InstCombine/max_known_bits.ll
+++ llvm/test/Transforms/InstCombine/max_known_bits.ll
@@ -22,8 +22,8 @@
 ; CHECK-NEXT:    [[A:%.*]] = icmp sgt i16 [[X:%.*]], -2048
 ; CHECK-NEXT:    [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 -2048
 ; CHECK-NEXT:    [[C:%.*]] = icmp slt i16 [[B]], 2047
-; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 2047
-; CHECK-NEXT:    [[E:%.*]] = add nsw i16 [[D]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[B]], 1
+; CHECK-NEXT:    [[E:%.*]] = select i1 [[C]], i16 [[TMP1]], i16 2048
 ; CHECK-NEXT:    ret i16 [[E]]
 ;
   %a = icmp sgt i16 %x, -2048
@@ -39,9 +39,9 @@
 ; CHECK-LABEL: @min_max_clamp_2(
 ; CHECK-NEXT:    [[A:%.*]] = icmp slt i16 [[X:%.*]], 2047
 ; CHECK-NEXT:    [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 2047
-; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[B]], -2048
-; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 -2048
-; CHECK-NEXT:    [[E:%.*]] = add nsw i16 [[D]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add nsw i16 [[B]], 1
+; CHECK-NEXT:    [[C_INV:%.*]] = icmp slt i16 [[B]], -2047
+; CHECK-NEXT:    [[E:%.*]] = select i1 [[C_INV]], i16 -2047, i16 [[TMP1]]
 ; CHECK-NEXT:    ret i16 [[E]]
 ;
   %a = icmp slt i16 %x, 2047
@@ -60,8 +60,10 @@
 ; CHECK-NEXT:    [[A:%.*]] = icmp sgt i16 [[X:%.*]], -2048
 ; CHECK-NEXT:    [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 -2048
 ; CHECK-NEXT:    [[C:%.*]] = icmp slt i16 [[B]], 2047
-; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 2047
-; CHECK-NEXT:    [[G:%.*]] = sext i16 [[D]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[B]], 1
+; CHECK-NEXT:    [[E:%.*]] = select i1 [[C]], i16 [[TMP1]], i16 2048
+; CHECK-NEXT:    [[F:%.*]] = sext i16 [[E]] to i32
+; CHECK-NEXT:    [[G:%.*]] = add nsw i32 [[F]], -1
 ; CHECK-NEXT:    ret i32 [[G]]
 ;
   %a = icmp sgt i16 %x, -2048
@@ -79,9 +81,11 @@
 ; CHECK-LABEL: @min_max_clamp_4(
 ; CHECK-NEXT:    [[A:%.*]] = icmp slt i16 [[X:%.*]], 2047
 ; CHECK-NEXT:    [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 2047
-; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[B]], -2048
-; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 -2048
-; CHECK-NEXT:    [[G:%.*]] = sext i16 [[D]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = add nsw i16 [[B]], 1
+; CHECK-NEXT:    [[C_INV:%.*]] = icmp slt i16 [[B]], -2047
+; CHECK-NEXT:    [[E:%.*]] = select i1 [[C_INV]], i16 -2047, i16 [[TMP1]]
+; CHECK-NEXT:    [[F:%.*]] = sext i16 [[E]] to i32
+; CHECK-NEXT:    [[G:%.*]] = add nsw i32 [[F]], -1
 ; CHECK-NEXT:    ret i32 [[G]]
 ;
   %a = icmp slt i16 %x, 2047
Index: llvm/test/Transforms/InstCombine/minmax-demandbits.ll
===================================================================
--- llvm/test/Transforms/InstCombine/minmax-demandbits.ll
+++ llvm/test/Transforms/InstCombine/minmax-demandbits.ll
@@ -27,8 +27,8 @@
 define i32 @and_umax_more(i32 %A) {
 ; CHECK-LABEL: @and_umax_more(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 32
-; CHECK-NEXT:    [[L1:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 32
-; CHECK-NEXT:    [[X:%.*]] = and i32 [[L1]], -32
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[A]], -32
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 32
 ; CHECK-NEXT:    ret i32 [[X]]
 ;
   %l0 = icmp ugt i32 32, %A
@@ -119,8 +119,8 @@
 define i8 @f_1_1(i8 %A) {
 ; CHECK-LABEL: @f_1_1(
 ; CHECK-NEXT:    [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 1
-; CHECK-NEXT:    [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 1
-; CHECK-NEXT:    [[X:%.*]] = and i8 [[L1]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[A]], 1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[L2]], i8 [[TMP1]], i8 1
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %l2 = icmp ugt i8 %A, 1
@@ -132,8 +132,8 @@
 define i8 @f_32_32(i8 %A) {
 ; CHECK-LABEL: @f_32_32(
 ; CHECK-NEXT:    [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 32
-; CHECK-NEXT:    [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 32
-; CHECK-NEXT:    [[X:%.*]] = and i8 [[L1]], -32
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[A]], -32
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[L2]], i8 [[TMP1]], i8 32
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %l2 = icmp ugt i8 %A, 32
@@ -145,8 +145,8 @@
 define i8 @f_191_192(i8 %A) {
 ; CHECK-LABEL: @f_191_192(
 ; CHECK-NEXT:    [[L2:%.*]] = icmp ugt i8 [[A:%.*]], -65
-; CHECK-NEXT:    [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 -65
-; CHECK-NEXT:    [[X:%.*]] = and i8 [[L1]], -64
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[A]], -64
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[L2]], i8 [[TMP1]], i8 -128
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %l2 = icmp ugt i8 %A, 191
@@ -158,8 +158,8 @@
 define i8 @f_10_1(i8 %A) {
 ; CHECK-LABEL: @f_10_1(
 ; CHECK-NEXT:    [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 10
-; CHECK-NEXT:    [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 10
-; CHECK-NEXT:    [[X:%.*]] = and i8 [[L1]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[A]], 1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[L2]], i8 [[TMP1]], i8 0
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %l2 = icmp ugt i8 %A, 10
@@ -170,7 +170,10 @@
 
 define i32 @and_umin(i32 %A) {
 ; CHECK-LABEL: @and_umin(
-; CHECK-NEXT:    ret i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 15
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[A]], -32
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 0
+; CHECK-NEXT:    ret i32 [[X]]
 ;
   %l0 = icmp ult i32 15, %A
   %l1 = select i1 %l0, i32 15, i32 %A
@@ -180,7 +183,10 @@
 
 define i32 @or_umin(i32 %A) {
 ; CHECK-LABEL: @or_umin(
-; CHECK-NEXT:    ret i32 31
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 15
+; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[A]], 31
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 31
+; CHECK-NEXT:    ret i32 [[X]]
 ;
   %l0 = icmp ult i32 15, %A
   %l1 = select i1 %l0, i32 15, i32 %A
@@ -224,8 +230,8 @@
 define i8 @and_min_7_9(i8 %A) {
 ; CHECK-LABEL: @and_min_7_9(
 ; CHECK-NEXT:    [[L2:%.*]] = icmp ult i8 [[A:%.*]], -9
-; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[L2]], i8 [[A]], i8 -9
-; CHECK-NEXT:    [[R:%.*]] = and i8 [[MIN]], -8
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[A]], -8
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[L2]], i8 [[TMP1]], i8 -16
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %l2 = icmp ult i8 %A, -9
Index: llvm/test/Transforms/InstCombine/minmax-fold.ll
===================================================================
--- llvm/test/Transforms/InstCombine/minmax-fold.ll
+++ llvm/test/Transforms/InstCombine/minmax-fold.ll
@@ -941,8 +941,8 @@
 define i32 @add_umin(i32 %x) {
 ; CHECK-LABEL: @add_umin(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 27
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 27
-; CHECK-NEXT:    [[R:%.*]] = add nuw nsw i32 [[TMP2]], 15
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], 15
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 42
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %a = add nuw i32 %x, 15
@@ -1039,8 +1039,8 @@
 define <2 x i16> @add_umin_vec(<2 x i16> %x) {
 ; CHECK-LABEL: @add_umin_vec(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult <2 x i16> [[X:%.*]], <i16 225, i16 225>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[X]], <2 x i16> <i16 225, i16 225>
-; CHECK-NEXT:    [[R:%.*]] = add nuw nsw <2 x i16> [[TMP2]], <i16 15, i16 15>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i16> [[X]], <i16 15, i16 15>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[TMP2]], <2 x i16> <i16 240, i16 240>
 ; CHECK-NEXT:    ret <2 x i16> [[R]]
 ;
   %a = add nuw <2 x i16> %x, <i16 15, i16 15>
@@ -1052,8 +1052,8 @@
 define i37 @add_umax(i37 %x) {
 ; CHECK-LABEL: @add_umax(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i37 [[X:%.*]], 37
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 37
-; CHECK-NEXT:    [[R:%.*]] = add nuw i37 [[TMP2]], 5
+; CHECK-NEXT:    [[TMP2:%.*]] = add i37 [[X]], 5
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i37 [[TMP2]], i37 42
 ; CHECK-NEXT:    ret i37 [[R]]
 ;
   %a = add nuw i37 %x, 5
@@ -1065,8 +1065,8 @@
 define i37 @add_umax_constant_limit(i37 %x) {
 ; CHECK-LABEL: @add_umax_constant_limit(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i37 [[X:%.*]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 1
-; CHECK-NEXT:    [[R:%.*]] = add nuw i37 [[TMP2]], 81
+; CHECK-NEXT:    [[TMP2:%.*]] = add i37 [[X]], 81
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i37 [[TMP2]], i37 82
 ; CHECK-NEXT:    ret i37 [[R]]
 ;
   %a = add nuw i37 %x, 81
@@ -1080,8 +1080,8 @@
 
 define i37 @add_umax_simplify(i37 %x) {
 ; CHECK-LABEL: @add_umax_simplify(
-; CHECK-NEXT:    [[A:%.*]] = add nuw i37 [[X:%.*]], 42
-; CHECK-NEXT:    ret i37 [[A]]
+; CHECK-NEXT:    [[R:%.*]] = add nuw i37 [[X:%.*]], 42
+; CHECK-NEXT:    ret i37 [[R]]
 ;
   %a = add nuw i37 %x, 42
   %c = icmp ugt i37 %a, 42
@@ -1153,8 +1153,8 @@
 define <2 x i33> @add_umax_vec(<2 x i33> %x) {
 ; CHECK-LABEL: @add_umax_vec(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt <2 x i33> [[X:%.*]], <i33 235, i33 235>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[X]], <2 x i33> <i33 235, i33 235>
-; CHECK-NEXT:    [[R:%.*]] = add nuw <2 x i33> [[TMP2]], <i33 5, i33 5>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i33> [[X]], <i33 5, i33 5>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[TMP2]], <2 x i33> <i33 240, i33 240>
 ; CHECK-NEXT:    ret <2 x i33> [[R]]
 ;
   %a = add nuw <2 x i33> %x, <i33 5, i33 5>
@@ -1179,9 +1179,9 @@
 define i8 @PR14613_umax(i8 %x) {
 ; CHECK-LABEL: @PR14613_umax(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], -16
-; CHECK-NEXT:    [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT:    [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 -1
-; CHECK-NEXT:    ret i8 [[U7]]
+; CHECK-NEXT:    [[TMP2:%.*]] = add i8 [[X]], 15
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 -1
+; CHECK-NEXT:    ret i8 [[R]]
 ;
   %u4 = zext i8 %x to i32
   %u5 = add nuw nsw i32 %u4, 15
@@ -1194,8 +1194,8 @@
 define i32 @add_smin(i32 %x) {
 ; CHECK-LABEL: @add_smin(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 27
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 27
-; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[TMP2]], 15
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], 15
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 42
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %a = add nsw i32 %x, 15
@@ -1207,8 +1207,8 @@
 define i32 @add_smin_constant_limit(i32 %x) {
 ; CHECK-LABEL: @add_smin_constant_limit(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 2147483646
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483646
-; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[TMP2]], -3
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], -3
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 2147483643
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %a = add nsw i32 %x, -3
@@ -1295,8 +1295,8 @@
 define <2 x i16> @add_smin_vec(<2 x i16> %x) {
 ; CHECK-LABEL: @add_smin_vec(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i16> [[X:%.*]], <i16 225, i16 225>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[X]], <2 x i16> <i16 225, i16 225>
-; CHECK-NEXT:    [[R:%.*]] = add nsw <2 x i16> [[TMP2]], <i16 15, i16 15>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i16> [[X]], <i16 15, i16 15>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[TMP2]], <2 x i16> <i16 240, i16 240>
 ; CHECK-NEXT:    ret <2 x i16> [[R]]
 ;
   %a = add nsw <2 x i16> %x, <i16 15, i16 15>
@@ -1308,8 +1308,8 @@
 define i37 @add_smax(i37 %x) {
 ; CHECK-LABEL: @add_smax(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i37 [[X:%.*]], 37
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 37
-; CHECK-NEXT:    [[R:%.*]] = add nuw nsw i37 [[TMP2]], 5
+; CHECK-NEXT:    [[TMP2:%.*]] = add i37 [[X]], 5
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i37 [[TMP2]], i37 42
 ; CHECK-NEXT:    ret i37 [[R]]
 ;
   %a = add nsw i37 %x, 5
@@ -1321,8 +1321,8 @@
 define i8 @add_smax_constant_limit(i8 %x) {
 ; CHECK-LABEL: @add_smax_constant_limit(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], -127
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 -127
-; CHECK-NEXT:    [[R:%.*]] = add nsw i8 [[TMP2]], 125
+; CHECK-NEXT:    [[TMP2:%.*]] = add i8 [[X]], 125
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 -2
 ; CHECK-NEXT:    ret i8 [[R]]
 ;
   %a = add nsw i8 %x, 125
@@ -1409,8 +1409,8 @@
 define <2 x i33> @add_smax_vec(<2 x i33> %x) {
 ; CHECK-LABEL: @add_smax_vec(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <2 x i33> [[X:%.*]], <i33 235, i33 235>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[X]], <2 x i33> <i33 235, i33 235>
-; CHECK-NEXT:    [[R:%.*]] = add nuw nsw <2 x i33> [[TMP2]], <i33 5, i33 5>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i33> [[X]], <i33 5, i33 5>
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[TMP2]], <2 x i33> <i33 240, i33 240>
 ; CHECK-NEXT:    ret <2 x i33> [[R]]
 ;
   %a = add nsw <2 x i33> %x, <i33 5, i33 5>
@@ -1422,9 +1422,9 @@
 define i8 @PR14613_smin(i8 %x) {
 ; CHECK-LABEL: @PR14613_smin(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 40
-; CHECK-NEXT:    [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT:    [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
-; CHECK-NEXT:    ret i8 [[U7]]
+; CHECK-NEXT:    [[TMP2:%.*]] = add i8 [[X]], 15
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 55
+; CHECK-NEXT:    ret i8 [[R]]
 ;
   %u4 = sext i8 %x to i32
   %u5 = add nuw nsw i32 %u4, 15
@@ -1437,9 +1437,9 @@
 define i8 @PR14613_smax(i8 %x) {
 ; CHECK-LABEL: @PR14613_smax(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], 40
-; CHECK-NEXT:    [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT:    [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
-; CHECK-NEXT:    ret i8 [[U7]]
+; CHECK-NEXT:    [[TMP2:%.*]] = add i8 [[X]], 15
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 55
+; CHECK-NEXT:    ret i8 [[R]]
 ;
   %u4 = sext i8 %x to i32
   %u5 = add nuw nsw i32 %u4, 15
Index: llvm/test/Transforms/InstCombine/rem.ll
===================================================================
--- llvm/test/Transforms/InstCombine/rem.ll
+++ llvm/test/Transforms/InstCombine/rem.ll
@@ -222,8 +222,8 @@
 
 define i32 @test4(i32 %X, i1 %C) {
 ; CHECK-LABEL: @test4(
-; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[C:%.*]], i32 0, i32 7
-; CHECK-NEXT:    [[R:%.*]] = and i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i32 0, i32 [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %V = select i1 %C, i32 1, i32 8
Index: llvm/test/Transforms/InstCombine/saturating-add-sub.ll
===================================================================
--- llvm/test/Transforms/InstCombine/saturating-add-sub.ll
+++ llvm/test/Transforms/InstCombine/saturating-add-sub.ll
@@ -1713,8 +1713,8 @@
 define i32 @unsigned_sat_variable_using_min_add(i32 %x) {
 ; CHECK-LABEL: @unsigned_sat_variable_using_min_add(
 ; CHECK-NEXT:    [[Y:%.*]] = call i32 @get_i32()
-; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[X:%.*]], i32 [[Y]])
-; CHECK-NEXT:    ret i32 [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[Y]], i32 [[X:%.*]])
+; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %y = call i32 @get_i32() ; thwart complexity-based canonicalization
   %noty = xor i32 %y, -1
@@ -1727,8 +1727,8 @@
 define i32 @unsigned_sat_variable_using_min_commute_add(i32 %x) {
 ; CHECK-LABEL: @unsigned_sat_variable_using_min_commute_add(
 ; CHECK-NEXT:    [[Y:%.*]] = call i32 @get_i32()
-; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[X:%.*]], i32 [[Y]])
-; CHECK-NEXT:    ret i32 [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[Y]], i32 [[X:%.*]])
+; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %y = call i32 @get_i32() ; thwart complexity-based canonicalization
   %noty = xor i32 %y, -1
@@ -1741,8 +1741,8 @@
 define <2 x i8> @unsigned_sat_variable_using_min_commute_select(<2 x i8> %x) {
 ; CHECK-LABEL: @unsigned_sat_variable_using_min_commute_select(
 ; CHECK-NEXT:    [[Y:%.*]] = call <2 x i8> @get_v2i8()
-; CHECK-NEXT:    [[R:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[X:%.*]], <2 x i8> [[Y]])
-; CHECK-NEXT:    ret <2 x i8> [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[Y]], <2 x i8> [[X:%.*]])
+; CHECK-NEXT:    ret <2 x i8> [[TMP1]]
 ;
   %y = call <2 x i8> @get_v2i8() ; thwart complexity-based canonicalization
   %noty = xor <2 x i8> %y, <i8 -1, i8 -1>
@@ -1755,8 +1755,8 @@
 define <2 x i8> @unsigned_sat_variable_using_min_commute_add_select(<2 x i8> %x) {
 ; CHECK-LABEL: @unsigned_sat_variable_using_min_commute_add_select(
 ; CHECK-NEXT:    [[Y:%.*]] = call <2 x i8> @get_v2i8()
-; CHECK-NEXT:    [[R:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[X:%.*]], <2 x i8> [[Y]])
-; CHECK-NEXT:    ret <2 x i8> [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[Y]], <2 x i8> [[X:%.*]])
+; CHECK-NEXT:    ret <2 x i8> [[TMP1]]
 ;
   %y = call <2 x i8> @get_v2i8() ; thwart complexity-based canonicalization
   %noty = xor <2 x i8> %y, <i8 -1, i8 -1>
@@ -1773,8 +1773,8 @@
 ; CHECK-NEXT:    [[Y:%.*]] = call i32 @get_i32()
 ; CHECK-NEXT:    [[NOTY:%.*]] = xor i32 [[Y]], -1
 ; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[NOTY]], [[X:%.*]]
-; CHECK-NEXT:    [[S:%.*]] = select i1 [[C]], i32 [[X]], i32 [[NOTY]]
-; CHECK-NEXT:    [[R:%.*]] = add i32 [[Y]], [[S]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[Y]], [[X]]
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[C]], i32 [[TMP1]], i32 -1
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
   %y = call i32 @get_i32() ; thwart complexity-based canonicalization
@@ -1808,8 +1808,8 @@
 
 define i32 @unsigned_sat_constant_using_min(i32 %x) {
 ; CHECK-LABEL: @unsigned_sat_constant_using_min(
-; CHECK-NEXT:    [[R:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[X:%.*]], i32 -43)
-; CHECK-NEXT:    ret i32 [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[X:%.*]], i32 -43)
+; CHECK-NEXT:    ret i32 [[TMP1]]
 ;
   %c = icmp ult i32 %x, 42
   %s = select i1 %c, i32 %x, i32 42
@@ -1819,8 +1819,8 @@
 
 define <2 x i32> @unsigned_sat_constant_using_min_splat(<2 x i32> %x) {
 ; CHECK-LABEL: @unsigned_sat_constant_using_min_splat(
-; CHECK-NEXT:    [[R:%.*]] = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 -15, i32 -15>)
-; CHECK-NEXT:    ret <2 x i32> [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 -15, i32 -15>)
+; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
 ;
   %c = icmp ult <2 x i32> %x, <i32 14, i32 14>
   %s = select <2 x i1> %c, <2 x i32> %x, <2 x i32> <i32 14, i32 14>
@@ -1832,10 +1832,9 @@
 
 define i32 @unsigned_sat_constant_using_min_wrong_constant(i32 %x) {
 ; CHECK-LABEL: @unsigned_sat_constant_using_min_wrong_constant(
-; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[X:%.*]], 42
-; CHECK-NEXT:    [[S:%.*]] = select i1 [[C]], i32 [[X]], i32 42
-; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[S]], -42
-; CHECK-NEXT:    ret i32 [[R]]
+; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 42, i32 [[X:%.*]])
+; CHECK-NEXT:    [[TMP2:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
   %c = icmp ult i32 %x, 42
   %s = select i1 %c, i32 %x, i32 42
Index: llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
===================================================================
--- llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
+++ llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
@@ -13,8 +13,8 @@
 define i32 @clamp255_i32(i32 %x) {
 ; CHECK-LABEL: @clamp255_i32(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT:    [[OR:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT:    [[AND:%.*]] = and i32 [[OR]], 255
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[X]], 255
+; CHECK-NEXT:    [[AND:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 255
 ; CHECK-NEXT:    ret i32 [[AND]]
 ;
   %sub = sub nsw i32 255, %x
Index: llvm/test/Transforms/InstCombine/sub.ll
===================================================================
--- llvm/test/Transforms/InstCombine/sub.ll
+++ llvm/test/Transforms/InstCombine/sub.ll
@@ -1227,8 +1227,8 @@
 define i32 @test64(i32 %x) {
 ; CHECK-LABEL: @test64(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add nsw i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], 1
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 256
 ; CHECK-NEXT:    ret i32 [[DOTNEG]]
 ;
   %1 = xor i32 %x, -1
@@ -1240,9 +1240,9 @@
 
 define i32 @test65(i32 %x) {
 ; CHECK-LABEL: @test65(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -256
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -256
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[X:%.*]], 1
+; CHECK-NEXT:    [[DOTINV:%.*]] = icmp slt i32 [[X]], -255
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[DOTINV]], i32 -255, i32 [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[DOTNEG]]
 ;
   %1 = xor i32 %x, -1
@@ -1255,8 +1255,8 @@
 define i32 @test66(i32 %x) {
 ; CHECK-LABEL: @test66(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -101
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -101
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add nuw i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[X]], 1
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP1]], i32 [[TMP2]], i32 -100
 ; CHECK-NEXT:    ret i32 [[DOTNEG]]
 ;
   %1 = xor i32 %x, -1
@@ -1268,9 +1268,9 @@
 
 define i32 @test67(i32 %x) {
 ; CHECK-LABEL: @test67(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 100
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 100
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add i32 [[TMP2]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[X:%.*]], 1
+; CHECK-NEXT:    [[DOTINV:%.*]] = icmp ult i32 [[X]], 101
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[DOTINV]], i32 101, i32 [[TMP1]]
 ; CHECK-NEXT:    ret i32 [[DOTNEG]]
 ;
   %1 = xor i32 %x, -1
@@ -1284,8 +1284,8 @@
 define <2 x i32> @test68(<2 x i32> %x) {
 ; CHECK-LABEL: @test68(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 255, i32 255>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 255, i32 255>
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add nsw <2 x i32> [[TMP2]], <i32 1, i32 1>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i32> [[X]], <i32 1, i32 1>
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP2]], <2 x i32> <i32 256, i32 256>
 ; CHECK-NEXT:    ret <2 x i32> [[DOTNEG]]
 ;
   %1 = xor <2 x i32> %x, <i32 -1, i32 -1>
@@ -1299,8 +1299,8 @@
 define <2 x i32> @test69(<2 x i32> %x) {
 ; CHECK-LABEL: @test69(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 255, i32 127>
-; CHECK-NEXT:    [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 255, i32 127>
-; CHECK-NEXT:    [[DOTNEG:%.*]] = add <2 x i32> [[TMP2]], <i32 1, i32 1>
+; CHECK-NEXT:    [[TMP2:%.*]] = add <2 x i32> [[X]], <i32 1, i32 1>
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[TMP2]], <2 x i32> <i32 256, i32 128>
 ; CHECK-NEXT:    ret <2 x i32> [[DOTNEG]]
 ;
   %1 = xor <2 x i32> %x, <i32 -1, i32 -1>
Index: llvm/test/Transforms/InstCombine/with_overflow.ll
===================================================================
--- llvm/test/Transforms/InstCombine/with_overflow.ll
+++ llvm/test/Transforms/InstCombine/with_overflow.ll
@@ -571,10 +571,10 @@
 define { i8, i1 } @sadd_always_overflow(i8 %x) nounwind {
 ; CHECK-LABEL: @sadd_always_overflow(
 ; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 100
-; CHECK-NEXT:    [[Y:%.*]] = select i1 [[C]], i8 [[X]], i8 100
-; CHECK-NEXT:    [[A:%.*]] = add nuw i8 [[Y]], 28
-; CHECK-NEXT:    [[TMP1:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
-; CHECK-NEXT:    ret { i8, i1 } [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[X]], 28
+; CHECK-NEXT:    [[A:%.*]] = select i1 [[C]], i8 [[TMP1]], i8 -128
+; CHECK-NEXT:    [[TMP2:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
+; CHECK-NEXT:    ret { i8, i1 } [[TMP2]]
 ;
   %c = icmp sgt i8 %x, 100
   %y = select i1 %c, i8 %x, i8 100
@@ -585,10 +585,10 @@
 define { i8, i1 } @ssub_always_overflow(i8 %x) nounwind {
 ; CHECK-LABEL: @ssub_always_overflow(
 ; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 29
-; CHECK-NEXT:    [[Y:%.*]] = select i1 [[C]], i8 [[X]], i8 29
-; CHECK-NEXT:    [[A:%.*]] = sub nuw i8 -100, [[Y]]
-; CHECK-NEXT:    [[TMP1:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
-; CHECK-NEXT:    ret { i8, i1 } [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sub i8 -100, [[X]]
+; CHECK-NEXT:    [[A:%.*]] = select i1 [[C]], i8 [[TMP1]], i8 127
+; CHECK-NEXT:    [[TMP2:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
+; CHECK-NEXT:    ret { i8, i1 } [[TMP2]]
 ;
   %c = icmp sgt i8 %x, 29
   %y = select i1 %c, i8 %x, i8 29
Index: llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
+++ llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
@@ -36,15 +36,15 @@
 ; CHECK-NEXT:    [[WIDE_LOAD6:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
 ; CHECK-NEXT:    [[TMP2:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD]], zeroinitializer
 ; CHECK-NEXT:    [[TMP3:%.*]] = fcmp fast oeq <4 x float> [[WIDE_LOAD6]], zeroinitializer
-; CHECK-NEXT:    [[TMP4:%.*]] = select <4 x i1> [[TMP2]], <4 x i1> [[TMP3]], <4 x i1> zeroinitializer
-; CHECK-NEXT:    [[TMP5:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD]])
-; CHECK-NEXT:    [[TMP6:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD6]])
-; CHECK-NEXT:    [[TMP7:%.*]] = fadd fast <4 x float> [[TMP6]], [[TMP5]]
-; CHECK-NEXT:    [[TMP8:%.*]] = fsub fast <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD6]]
-; CHECK-NEXT:    [[TMP9:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP8]])
-; CHECK-NEXT:    [[TMP10:%.*]] = fdiv fast <4 x float> [[TMP9]], [[TMP7]]
-; CHECK-NEXT:    [[TMP11:%.*]] = fadd fast <4 x float> [[TMP10]], [[VEC_PHI]]
-; CHECK-NEXT:    [[PREDPHI]] = select <4 x i1> [[TMP4]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP11]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD]])
+; CHECK-NEXT:    [[TMP5:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[WIDE_LOAD6]])
+; CHECK-NEXT:    [[TMP6:%.*]] = fadd fast <4 x float> [[TMP5]], [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = fsub fast <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD6]]
+; CHECK-NEXT:    [[TMP8:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP7]])
+; CHECK-NEXT:    [[TMP9:%.*]] = fdiv fast <4 x float> [[TMP8]], [[TMP6]]
+; CHECK-NEXT:    [[TMP10:%.*]] = fadd fast <4 x float> [[TMP9]], [[VEC_PHI]]
+; CHECK-NEXT:    [[TMP11:%.*]] = select <4 x i1> [[TMP2]], <4 x i1> [[TMP3]], <4 x i1> zeroinitializer
+; CHECK-NEXT:    [[PREDPHI]] = select <4 x i1> [[TMP11]], <4 x float> [[VEC_PHI]], <4 x float> [[TMP10]]
 ; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
 ; CHECK-NEXT:    [[TMP12:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]