Index: llvm/lib/CodeGen/RegAllocFast.cpp
===================================================================
--- llvm/lib/CodeGen/RegAllocFast.cpp
+++ llvm/lib/CodeGen/RegAllocFast.cpp
@@ -156,7 +156,6 @@
     /// cannot be allocated.
     RegUnitSet UsedInInstr;
     RegUnitSet PhysRegUses;
-    SmallVector<uint16_t, 8> DefOperandIndexes;
     // Register masks attached to the current instruction.
     SmallVector<const uint32_t *> RegMasks;
 
@@ -1167,7 +1166,7 @@
       //   heuristic to figure out a good operand order before doing
       //   assignments.
       if (NeedToAssignLiveThroughs) {
-        DefOperandIndexes.clear();
+        SmallVector<uint16_t, 8> DefOperandIndexes;
         PhysRegUses.clear();
 
         // Track number of defs which may consume a register from the class.
@@ -1312,7 +1311,7 @@
       if (MRI->isReserved(Reg))
         continue;
       bool displacedAny = usePhysReg(MI, Reg);
-      if (!displacedAny && !MRI->isReserved(Reg))
+      if (!displacedAny)
         MO.setIsKill(true);
     }
   }
@@ -1365,12 +1364,7 @@
       MachineOperand &MO = MI.getOperand(I);
       if (!MO.isReg() || !MO.isDef() || !MO.isEarlyClobber())
         continue;
-      // subreg defs don't free the full register. We left the subreg number
-      // around as a marker in setPhysReg() to recognize this case here.
-      if (MO.getSubReg() != 0) {
-        MO.setSubReg(0);
-        continue;
-      }
+      assert(!MO.getSubReg() && "should be already handled in def processing");
 
       Register Reg = MO.getReg();
       if (!Reg)