Index: llvm/test/CodeGen/ARM/addimm-mulimm.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/ARM/addimm-mulimm.ll
@@ -0,0 +1,248 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=armv6-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-ARM,CHECK-ARMV6
+; RUN: llc -mtriple=armv7a-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-ARM,CHECK-ARMV7
+; RUN: llc -mtriple=thumb-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-THUNB
+
+define i32 @fold_add19_mul11(i32 %a) {
+; CHECK-ARM-LABEL: fold_add19_mul11:
+; CHECK-ARM:       @ %bb.0:
+; CHECK-ARM-NEXT:    mov r1, #11
+; CHECK-ARM-NEXT:    mul r0, r0, r1
+; CHECK-ARM-NEXT:    add r0, r0, #209
+; CHECK-ARM-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_add19_mul11:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #11
+; CHECK-THUNB-NEXT:    muls r0, r1, r0
+; CHECK-THUNB-NEXT:    adds r0, #209
+; CHECK-THUNB-NEXT:    bx lr
+  %b = add i32 %a, 19
+  %c = mul i32 %b, 11
+  ret i32 %c
+}
+
+define i32 @fold_sub19_mul11(i32 %a) {
+; CHECK-ARM-LABEL: fold_sub19_mul11:
+; CHECK-ARM:       @ %bb.0:
+; CHECK-ARM-NEXT:    mov r1, #11
+; CHECK-ARM-NEXT:    mul r0, r0, r1
+; CHECK-ARM-NEXT:    sub r0, r0, #209
+; CHECK-ARM-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_sub19_mul11:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #11
+; CHECK-THUNB-NEXT:    muls r0, r1, r0
+; CHECK-THUNB-NEXT:    subs r0, #209
+; CHECK-THUNB-NEXT:    bx lr
+  %b = add i32 %a, -19
+  %c = mul i32 %b, 11
+  ret i32 %c
+}
+
+define i32 @fold_add301_mul19(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_add301_mul19:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mov r1, #87
+; CHECK-ARMV6-NEXT:    mov r2, #19
+; CHECK-ARMV6-NEXT:    orr r1, r1, #5632
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+;
+; CHECK-ARMV7-LABEL: fold_add301_mul19:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    movw r1, #5719
+; CHECK-ARMV7-NEXT:    mov r2, #19
+; CHECK-ARMV7-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_add301_mul19:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #19
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI2_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI2_0:
+; CHECK-THUNB-NEXT:    .long 5719 @ 0x1657
+  %b = add i32 %a, 301
+  %c = mul i32 %b, 19
+  ret i32 %c
+}
+
+define i32 @fold_sub301_mul19(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_sub301_mul19:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mvn r1, #86
+; CHECK-ARMV6-NEXT:    mov r2, #19
+; CHECK-ARMV6-NEXT:    sub r1, r1, #5632
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+;
+; CHECK-ARMV7-LABEL: fold_sub301_mul19:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    mov r1, #19
+; CHECK-ARMV7-NEXT:    mul r0, r0, r1
+; CHECK-ARMV7-NEXT:    movw r1, #5719
+; CHECK-ARMV7-NEXT:    sub r0, r0, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_sub301_mul19:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #19
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI3_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI3_0:
+; CHECK-THUNB-NEXT:    .long 4294961577 @ 0xffffe9a9
+  %b = add i32 %a, -301
+  %c = mul i32 %b, 19
+  ret i32 %c
+}
+
+define i32 @fold_add251_mul253(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_add251_mul253:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mov r1, #15
+; CHECK-ARMV6-NEXT:    mov r2, #253
+; CHECK-ARMV6-NEXT:    orr r1, r1, #63488
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+;
+; CHECK-ARMV7-LABEL: fold_add251_mul253:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    movw r1, #63503
+; CHECK-ARMV7-NEXT:    mov r2, #253
+; CHECK-ARMV7-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_add251_mul253:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #253
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI4_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI4_0:
+; CHECK-THUNB-NEXT:    .long 63503 @ 0xf80f
+  %b = add i32 %a, 251
+  %c = mul i32 %b, 253
+  ret i32 %c
+}
+
+define i32 @fold_sub251_mul253(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_sub251_mul253:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mvn r1, #14
+; CHECK-ARMV6-NEXT:    mov r2, #253
+; CHECK-ARMV6-NEXT:    sub r1, r1, #63488
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+;
+; CHECK-ARMV7-LABEL: fold_sub251_mul253:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    mov r1, #253
+; CHECK-ARMV7-NEXT:    mul r0, r0, r1
+; CHECK-ARMV7-NEXT:    movw r1, #63503
+; CHECK-ARMV7-NEXT:    sub r0, r0, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_sub251_mul253:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #253
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI5_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI5_0:
+; CHECK-THUNB-NEXT:    .long 4294903793 @ 0xffff07f1
+  %b = add i32 %a, -251
+  %c = mul i32 %b, 253
+  ret i32 %c
+}
+
+define i32 @fold_add251_mul353(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_add251_mul353:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mov r2, #97
+; CHECK-ARMV6-NEXT:    ldr r1, .LCPI6_0
+; CHECK-ARMV6-NEXT:    orr r2, r2, #256
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+; CHECK-ARMV6-NEXT:    .p2align 2
+; CHECK-ARMV6-NEXT:  @ %bb.1:
+; CHECK-ARMV6-NEXT:  .LCPI6_0:
+; CHECK-ARMV6-NEXT:    .long 88603 @ 0x15a1b
+;
+; CHECK-ARMV7-LABEL: fold_add251_mul353:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    movw r1, #23067
+; CHECK-ARMV7-NEXT:    movw r2, #353
+; CHECK-ARMV7-NEXT:    movt r1, #1
+; CHECK-ARMV7-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_add251_mul353:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #255
+; CHECK-THUNB-NEXT:    adds r1, #98
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI6_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI6_0:
+; CHECK-THUNB-NEXT:    .long 88603 @ 0x15a1b
+  %b = add i32 %a, 251
+  %c = mul i32 %b, 353
+  ret i32 %c
+}
+
+define i32 @fold_sub251_mul353(i32 %a) {
+; CHECK-ARMV6-LABEL: fold_sub251_mul353:
+; CHECK-ARMV6:       @ %bb.0:
+; CHECK-ARMV6-NEXT:    mov r2, #97
+; CHECK-ARMV6-NEXT:    ldr r1, .LCPI7_0
+; CHECK-ARMV6-NEXT:    orr r2, r2, #256
+; CHECK-ARMV6-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV6-NEXT:    bx lr
+; CHECK-ARMV6-NEXT:    .p2align 2
+; CHECK-ARMV6-NEXT:  @ %bb.1:
+; CHECK-ARMV6-NEXT:  .LCPI7_0:
+; CHECK-ARMV6-NEXT:    .long 4294878693 @ 0xfffea5e5
+;
+; CHECK-ARMV7-LABEL: fold_sub251_mul353:
+; CHECK-ARMV7:       @ %bb.0:
+; CHECK-ARMV7-NEXT:    movw r1, #42469
+; CHECK-ARMV7-NEXT:    movw r2, #353
+; CHECK-ARMV7-NEXT:    movt r1, #65534
+; CHECK-ARMV7-NEXT:    mla r0, r0, r2, r1
+; CHECK-ARMV7-NEXT:    bx lr
+;
+; CHECK-THUNB-LABEL: fold_sub251_mul353:
+; CHECK-THUNB:       @ %bb.0:
+; CHECK-THUNB-NEXT:    movs r1, #255
+; CHECK-THUNB-NEXT:    adds r1, #98
+; CHECK-THUNB-NEXT:    muls r1, r0, r1
+; CHECK-THUNB-NEXT:    ldr r0, .LCPI7_0
+; CHECK-THUNB-NEXT:    adds r0, r1, r0
+; CHECK-THUNB-NEXT:    bx lr
+; CHECK-THUNB-NEXT:    .p2align 2
+; CHECK-THUNB-NEXT:  @ %bb.1:
+; CHECK-THUNB-NEXT:  .LCPI7_0:
+; CHECK-THUNB-NEXT:    .long 4294878693 @ 0xfffea5e5
+  %b = add i32 %a, -251
+  %c = mul i32 %b, 353
+  ret i32 %c
+}