diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp @@ -3021,7 +3021,7 @@ if (Opcode == TargetOpcode::G_PTRTOINT) { assert(DstTy.isVector() && "Expected an FPR ptrtoint to be a vector"); I.setDesc(TII.get(TargetOpcode::COPY)); - return true; + return selectCopy(I, TII, MRI, TRI, RBI); } } diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp --- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp @@ -487,6 +487,7 @@ getActionDefinitionsBuilder(G_PTRTOINT) .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0}) + .legalFor({{v2s64, v2p0}}) .maxScalar(0, s64) .widenScalarToNextPow2(0, /*Min*/ 8); diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir @@ -0,0 +1,22 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s + +... +--- +name: v2s64_v2p0_legal +tracksRegLiveness: true +body: | + bb.0: + liveins: $q0 + + ; CHECK-LABEL: name: v2s64_v2p0_legal + ; CHECK: liveins: $q0 + ; CHECK: %ptr:_(<2 x p0>) = COPY $q0 + ; CHECK: %int:_(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>) + ; CHECK: $q0 = COPY %int(<2 x s64>) + ; CHECK: RET_ReallyLR implicit $q0 + %ptr:_(<2 x p0>) = COPY $q0 + %int:_(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>) + $q0 = COPY %int(<2 x s64>) + RET_ReallyLR implicit $q0 +... diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir @@ -11,6 +11,7 @@ define void @ptrtoint_s8_p0() { ret void } define void @ptrtoint_s1_p0() { ret void } define void @inttoptr_v2p0_v2s64() { ret void } + define void @ptrtoint_v2s64_v2p0() { ret void } ... --- @@ -158,3 +159,22 @@ $x0 = COPY %3(p0) RET_ReallyLR implicit $x0 ... +... +--- +name: ptrtoint_v2s64_v2p0 +legalized: true +regBankSelected: true +tracksRegLiveness: true +body: | + bb.0: + liveins: $q0 + ; CHECK-LABEL: name: ptrtoint_v2s64_v2p0 + ; CHECK: liveins: $q0 + ; CHECK: %ptr:fpr128 = COPY $q0 + ; CHECK: $q0 = COPY %ptr + ; CHECK: RET_ReallyLR implicit $q0 + %ptr:fpr(<2 x p0>) = COPY $q0 + %int:fpr(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>) + $q0 = COPY %int(<2 x s64>) + RET_ReallyLR implicit $q0 +...