Index: llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp +++ llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp @@ -531,6 +531,7 @@ case TargetOpcode::G_FPTOSI: case TargetOpcode::G_FPTOUI: case TargetOpcode::G_FCMP: + case TargetOpcode::G_LROUND: return true; default: break; @@ -959,6 +960,11 @@ } break; } + case TargetOpcode::G_LROUND: { + // Source is always floating point and destination is always integer. + OpRegBankIdx = {PMI_FirstGPR, PMI_FirstFPR}; + break; + } } // Finally construct the computed mapping. Index: llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir @@ -0,0 +1,65 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s + +... +--- +name: no_cross_bank_copies_needed +legalized: true +regBankSelected: false +tracksRegLiveness: true +body: | + bb.0: + liveins: $d0 + ; CHECK-LABEL: name: no_cross_bank_copies_needed + ; CHECK: liveins: $d0 + ; CHECK: %fpr:fpr(s64) = COPY $d0 + ; CHECK: %lround:gpr(s32) = G_LROUND %fpr(s64) + ; CHECK: $s0 = COPY %lround(s32) + ; CHECK: RET_ReallyLR implicit $s0 + %fpr:_(s64) = COPY $d0 + %lround:_(s32) = G_LROUND %fpr + $s0 = COPY %lround:_(s32) + RET_ReallyLR implicit $s0 +... +--- +name: source_needs_copy +legalized: true +regBankSelected: false +tracksRegLiveness: true +body: | + bb.0: + liveins: $x0 + ; CHECK-LABEL: name: source_needs_copy + ; CHECK: liveins: $x0 + ; CHECK: %gpr:gpr(s64) = COPY $x0 + ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY %gpr(s64) + ; CHECK: %lround:gpr(s32) = G_LROUND [[COPY]](s64) + ; CHECK: $s0 = COPY %lround(s32) + ; CHECK: RET_ReallyLR implicit $s0 + %gpr:_(s64) = COPY $x0 + %lround:_(s32) = G_LROUND %gpr + $s0 = COPY %lround:_(s32) + RET_ReallyLR implicit $s0 +... +--- +name: load_gets_fpr +legalized: true +regBankSelected: false +tracksRegLiveness: true +body: | + bb.0: + liveins: $x0 + ; CHECK-LABEL: name: load_gets_fpr + ; CHECK: liveins: $x0 + ; CHECK: %ptr:gpr(p0) = COPY $x0 + ; CHECK: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32)) + ; CHECK: %lround:gpr(s32) = G_LROUND %load(s32) + ; CHECK: $s0 = COPY %lround(s32) + ; CHECK: RET_ReallyLR implicit $s0 + %ptr:_(p0) = COPY $x0 + %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32)) + %lround:_(s32) = G_LROUND %load + $s0 = COPY %lround:_(s32) + RET_ReallyLR implicit $s0 + +...