Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1763,6 +1763,8 @@ return TargetOpcode::G_VECREDUCE_UMAX; case Intrinsic::vector_reduce_umin: return TargetOpcode::G_VECREDUCE_UMIN; + case Intrinsic::lround: + return TargetOpcode::G_LROUND; } return Intrinsic::not_intrinsic; } Index: llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll =================================================================== --- llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -2457,3 +2457,16 @@ } !0 = !{ i64 0, i64 2 } + +declare i64 @llvm.lround.i64.f32(float) nounwind readnone +define i64 @lround(float %x) { + ; CHECK-LABEL: name: lround + ; CHECK: bb.1 (%ir-block.0): + ; CHECK: liveins: $s0 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK: [[LROUND:%[0-9]+]]:_(s64) = G_LROUND [[COPY]](s32) + ; CHECK: $x0 = COPY [[LROUND]](s64) + ; CHECK: RET_ReallyLR implicit $x0 + %lround = tail call i64 @llvm.lround.i64.f32(float %x) + ret i64 %lround +}