diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -143,6 +143,7 @@
 BUILTIN(__builtin_ppc_mtmsr, "vUi", "")
 BUILTIN(__builtin_ppc_mtspr, "vIiULi", "")
 BUILTIN(__builtin_ppc_stfiw, "viC*d", "")
+BUILTIN(__builtin_ppc_cmplxl, "XLdLdLd", "")
 
 BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
 
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -235,6 +235,8 @@
   Builder.defineMacro("__frsqrtes", "__builtin_ppc_frsqrtes");
   Builder.defineMacro("__fsqrt", "__builtin_ppc_fsqrt");
   Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
+  Builder.defineMacro("__builtin_ppc_cmplxl", "__builtin_complex");
+  Builder.defineMacro("__cmplxl", "__builtin_complex");
 }
 
 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-complex.c b/clang/test/CodeGen/builtins-ppc-xlcompat-complex.c
new file mode 100644
--- /dev/null
+++ b/clang/test/CodeGen/builtins-ppc-xlcompat-complex.c
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | \
+// RUN:   FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s \
+// RUN:   --check-prefix=CHECK-AIX
+
+extern long double lda, ldb;
+
+long double _Complex test_cmplxl() {
+  // CHECK-LABEL: test_cmplxl
+  // CHECK: %0 = load ppc_fp128, ppc_fp128* @lda
+  // CHECK-NEXT: %1 = load ppc_fp128, ppc_fp128* @ldb
+  // CHECK-NEXT: %.fca.0.insert = insertvalue { ppc_fp128, ppc_fp128 } undef, ppc_fp128 %0, 0
+  // CHECK-NEXT: %.fca.1.insert = insertvalue { ppc_fp128, ppc_fp128 } %.fca.0.insert, ppc_fp128 %1, 1
+  // CHECK-NEXT: ret { ppc_fp128, ppc_fp128 } %.fca.1.insert
+
+  // CHECK-AIX-LABEL: test_cmplxl
+  // CHECK-AIX: %0 = load double, double* @lda
+  // CHECK-AIX-NEXT: %1 = load double, double* @ldb
+  // CHECK-AIX-NEXT: %.fca.0.insert = insertvalue { double, double } undef, double %0, 0
+  // CHECK-AIX-NEXT: %.fca.1.insert = insertvalue { double, double } %.fca.0.insert, double %1, 1
+  // CHECK-AIX-NEXT: ret { double, double } %.fca.1.insert
+  return __builtin_ppc_cmplxl(lda, ldb);
+}
+
+long double _Complex test_xl_cmplxl() {
+  // CHECK-LABEL: test_xl_cmplxl
+  // CHECK: %0 = load ppc_fp128, ppc_fp128* @lda
+  // CHECK-NEXT: %1 = load ppc_fp128, ppc_fp128* @ldb
+  // CHECK-NEXT: %.fca.0.insert = insertvalue { ppc_fp128, ppc_fp128 } undef, ppc_fp128 %0, 0
+  // CHECK-NEXT: %.fca.1.insert = insertvalue { ppc_fp128, ppc_fp128 } %.fca.0.insert, ppc_fp128 %1, 1
+  // CHECK-NEXT: ret { ppc_fp128, ppc_fp128 } %.fca.1.insert
+
+  // CHECK-AIX-LABEL: test_xl_cmplxl
+  // CHECK-AIX: %0 = load double, double* @lda
+  // CHECK-AIX-NEXT: %1 = load double, double* @ldb
+  // CHECK-AIX-NEXT: %.fca.0.insert = insertvalue { double, double } undef, double %0, 0
+  // CHECK-AIX-NEXT: %.fca.1.insert = insertvalue { double, double } %.fca.0.insert, double %1, 1
+  // CHECK-AIX-NEXT: ret { double, double } %.fca.1.insert
+  return __cmplxl(lda, ldb);
+}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex-32bit-only.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex-32bit-only.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex-32bit-only.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+
+@lda = external local_unnamed_addr global double, align 16
+@ldb = external local_unnamed_addr global double, align 16
+
+define { double, double } @test_long_double_complex() {
+; CHECK-LABEL: test_long_double_complex:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    lwz 3, L..C0(2) # @lda
+; CHECK-NEXT:    lwz 4, L..C1(2) # @ldb
+; CHECK-NEXT:    lfd 1, 0(3)
+; CHECK-NEXT:    lfd 2, 0(4)
+; CHECK-NEXT:    blr
+entry:
+  %0 = load double, double* @lda, align 16
+  %1 = load double, double* @ldb, align 16
+  %.fca.0.insert = insertvalue { double, double } undef, double %0, 0
+  %.fca.1.insert = insertvalue { double, double } %.fca.0.insert, double %1, 1
+  ret { double, double } %.fca.1.insert
+}
diff --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-complex.ll
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN:   -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-AIX64
+
+@lda = external local_unnamed_addr global ppc_fp128, align 16
+@ldb = external local_unnamed_addr global ppc_fp128, align 16
+
+define { ppc_fp128, ppc_fp128 } @test_long_double_complex() {
+; CHECK-LABEL: test_long_double_complex:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    addis 3, 2, .LC0@toc@ha
+; CHECK-NEXT:    addis 4, 2, .LC1@toc@ha
+; CHECK-NEXT:    ld 3, .LC0@toc@l(3)
+; CHECK-NEXT:    ld 4, .LC1@toc@l(4)
+; CHECK-NEXT:    lfd 1, 0(3)
+; CHECK-NEXT:    lfd 2, 8(3)
+; CHECK-NEXT:    lfd 3, 0(4)
+; CHECK-NEXT:    lfd 4, 8(4)
+; CHECK-NEXT:    blr
+;
+; CHECK-AIX64-LABEL: test_long_double_complex:
+; CHECK-AIX64:       # %bb.0: # %entry
+; CHECK-AIX64-NEXT:    ld 3, L..C0(2) # @lda
+; CHECK-AIX64-NEXT:    ld 4, L..C1(2) # @ldb
+; CHECK-AIX64-NEXT:    lfd 1, 0(3)
+; CHECK-AIX64-NEXT:    lfd 2, 8(3)
+; CHECK-AIX64-NEXT:    lfd 3, 0(4)
+; CHECK-AIX64-NEXT:    lfd 4, 8(4)
+; CHECK-AIX64-NEXT:    blr
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @lda, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ldb, align 16
+  %.fca.0.insert = insertvalue { ppc_fp128, ppc_fp128 } undef, ppc_fp128 %0, 0
+  %.fca.1.insert = insertvalue { ppc_fp128, ppc_fp128 } %.fca.0.insert, ppc_fp128 %1, 1
+  ret { ppc_fp128, ppc_fp128 } %.fca.1.insert
+}
+