diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h --- a/clang/lib/Headers/altivec.h +++ b/clang/lib/Headers/altivec.h @@ -3178,64 +3178,69 @@ #ifdef __XL_COMPAT_ALTIVEC__ #define vec_ctf(__a, __b) \ _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), \ + ((__b)&0x1F)), \ vector unsigned int \ : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b)), \ + ((__b)&0x1F)), \ vector unsigned long long \ : (__builtin_vsx_xvcvuxdsp((vector unsigned long long)(__a)) * \ - (vector float)(vector unsigned)((0x7f - (__b)) << 23)), \ + (vector float)(vector unsigned)((0x7f - ((__b)&0x1F)) << 23)), \ vector signed long long \ : (__builtin_vsx_xvcvsxdsp((vector signed long long)(__a)) * \ - (vector float)(vector unsigned)((0x7f - (__b)) << 23))) + (vector float)(vector unsigned)((0x7f - ((__b)&0x1F)) << 23))) #else // __XL_COMPAT_ALTIVEC__ #define vec_ctf(__a, __b) \ - _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ - vector unsigned int \ - : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b)), \ - vector unsigned long long \ - : (__builtin_convertvector((vector unsigned long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52)), \ - vector signed long long \ - : (__builtin_convertvector((vector signed long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52))) + _Generic( \ + (__a), vector int \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), \ + ((__b)&0x1F)), \ + vector unsigned int \ + : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ + ((__b)&0x1F)), \ + vector unsigned long long \ + : (__builtin_convertvector((vector unsigned long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52)), \ + vector signed long long \ + : (__builtin_convertvector((vector signed long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52))) #endif // __XL_COMPAT_ALTIVEC__ #else #define vec_ctf(__a, __b) \ _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), \ + ((__b)&0x1F)), \ vector unsigned int \ : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b))) + ((__b)&0x1F))) #endif /* vec_ctd */ #ifdef __VSX__ #define vec_ctd(__a, __b) \ - _Generic((__a), vector signed int \ - : (vec_doublee((vector signed int)(__a)) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52)), \ - vector unsigned int \ - : (vec_doublee((vector unsigned int)(__a)) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52)), \ - vector unsigned long long \ - : (__builtin_convertvector((vector unsigned long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52)), \ - vector signed long long \ - : (__builtin_convertvector((vector signed long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52))) + _Generic( \ + (__a), vector signed int \ + : (vec_doublee((vector signed int)(__a)) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52)), \ + vector unsigned int \ + : (vec_doublee((vector unsigned int)(__a)) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52)), \ + vector unsigned long long \ + : (__builtin_convertvector((vector unsigned long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52)), \ + vector signed long long \ + : (__builtin_convertvector((vector signed long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - ((__b)&0x1F)) \ + << 52))) #endif // __VSX__ /* vec_vcfsx */ @@ -3251,24 +3256,26 @@ #ifdef __XL_COMPAT_ALTIVEC__ #define vec_cts(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctsxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctsxs((vector float)(__a), ((__b)&0x1F)), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + (__b)) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ << 52); \ __builtin_vsx_xvcvdpsxws(__ret); \ })) #else // __XL_COMPAT_ALTIVEC__ #define vec_cts(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctsxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctsxs((vector float)(__a), ((__b)&0x1F)), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + (__b)) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ << 52); \ __builtin_convertvector(__ret, vector signed long long); \ })) @@ -3287,24 +3294,26 @@ #ifdef __XL_COMPAT_ALTIVEC__ #define vec_ctu(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctuxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctuxs((vector float)(__a), ((__b)&0x1F)), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ << 52); \ __builtin_vsx_xvcvdpuxws(__ret); \ })) #else // __XL_COMPAT_ALTIVEC__ #define vec_ctu(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctuxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctuxs((vector float)(__a), ((__b)&0x1F)), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ << 52); \ __builtin_convertvector(__ret, vector unsigned long long); \ })) @@ -3318,42 +3327,44 @@ #ifdef __VSX__ #define vec_ctsl(__a, __b) \ - _Generic((__a), vector float \ - : __extension__({ \ - vector float __ret = \ - (vector float)(__a) * \ - (vector float)(vector unsigned)((0x7f + (__b)) << 23); \ - __builtin_vsx_xvcvspsxds( \ - __builtin_vsx_xxsldwi(__ret, __ret, 1)); \ - }), \ - vector double \ - : __extension__({ \ - vector double __ret = \ - (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ - << 52); \ - __builtin_convertvector(__ret, vector signed long long); \ - })) + _Generic( \ + (__a), vector float \ + : __extension__({ \ + vector float __ret = \ + (vector float)(__a) * \ + (vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) << 23); \ + __builtin_vsx_xvcvspsxds(__builtin_vsx_xxsldwi(__ret, __ret, 1)); \ + }), \ + vector double \ + : __extension__({ \ + vector double __ret = \ + (vector double)(__a) * \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ + << 52); \ + __builtin_convertvector(__ret, vector signed long long); \ + })) /* vec_ctul */ #define vec_ctul(__a, __b) \ - _Generic((__a), vector float \ - : __extension__({ \ - vector float __ret = \ - (vector float)(__a) * \ - (vector float)(vector unsigned)((0x7f + (__b)) << 23); \ - __builtin_vsx_xvcvspuxds( \ - __builtin_vsx_xxsldwi(__ret, __ret, 1)); \ - }), \ - vector double \ - : __extension__({ \ - vector double __ret = \ - (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ - << 52); \ - __builtin_convertvector(__ret, vector unsigned long long); \ - })) + _Generic( \ + (__a), vector float \ + : __extension__({ \ + vector float __ret = \ + (vector float)(__a) * \ + (vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) << 23); \ + __builtin_vsx_xvcvspuxds(__builtin_vsx_xxsldwi(__ret, __ret, 1)); \ + }), \ + vector double \ + : __extension__({ \ + vector double __ret = \ + (vector double)(__a) * \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ + << 52); \ + __builtin_convertvector(__ret, vector unsigned long long); \ + })) #endif #else // __LITTLE_ENDIAN__ /* vec_ctsl */ @@ -3364,14 +3375,16 @@ : __extension__({ \ vector float __ret = \ (vector float)(__a) * \ - (vector float)(vector unsigned)((0x7f + (__b)) << 23); \ + (vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) \ + << 23); \ __builtin_vsx_xvcvspsxds(__ret); \ }), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b & 0x1F))) \ << 52); \ __builtin_convertvector(__ret, vector signed long long); \ })) @@ -3383,14 +3396,16 @@ : __extension__({ \ vector float __ret = \ (vector float)(__a) * \ - (vector float)(vector unsigned)((0x7f + (__b)) << 23); \ + (vector float)(vector unsigned)((0x7f + ((__b)&0x1F)) \ + << 23); \ __builtin_vsx_xvcvspuxds(__ret); \ }), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ - (vector double)(vector unsigned long long)((0x3ffULL + __b) \ + (vector double)(vector unsigned long long)((0x3ffULL + \ + ((__b)&0x1F)) \ << 52); \ __builtin_convertvector(__ret, vector unsigned long long); \ })) diff --git a/clang/test/CodeGen/ppc-vec_ct-truncate.c b/clang/test/CodeGen/ppc-vec_ct-truncate.c new file mode 100644 --- /dev/null +++ b/clang/test/CodeGen/ppc-vec_ct-truncate.c @@ -0,0 +1,90 @@ +// REQUIRES: powerpc-registered-target +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -triple powerpc64-ibm-aix-xcoff -emit-llvm %s -o - \ +// RUN: -target-cpu pwr8 | FileCheck %s +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -triple powerpc64-unknown-linux-gnu -emit-llvm %s -o - \ +// RUN: -target-cpu pwr8 | FileCheck %s +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -triple powerpc64le-unknown-linux-gnu -emit-llvm %s -o - \ +// RUN: -target-cpu pwr8 | FileCheck %s +#include +vector double a1 = {-1.234e-5, 1.2345}; +vector double a2 = {-1.234e-5, 1.2345}; +vector signed int vd1, vd2; +vector double vd3 = {0.234, 1.234}; +vector float vf1 = {0.234, 1.234, 2.345, 3.456}; +vector float vf2 = {0.234, 1.234, 2.345, 3.456}; +vector float vf3 = {0.234, 1.234, 2.345, 3.456}; +vector float vf4 = {0.234, 1.234, 2.345, 3.456}; +vector float vf5 = {0.234, 1.234, 2.345, 3.456}; +vector signed int vsi1 = {1, 2, 3, 4}; +vector signed int vsi2 = {1, 2, 3, 4}; +vector signed int vsi3 = {1, 2, 3, 4}; +vector signed int vsi4 = {1, 2, 3, 4}; +vector long long int vl1 = {5000000000, 100000000000000000}; +vector long long int vl2 = {5000000000, 100000000000000000}; +vector double vd; +vector float vf; +vector signed long long vsll; +vector unsigned int vsi5; +vector unsigned int vsi6; +vector unsigned long long vull; + +void test() { + // CHECK-LABEL: @test( + // CHECK-NEXT: entry: + // CHECK-LE-LABEL: @test( + // CHECK-LE-NEXT: entry: + + vd1 = vec_cts(a1, 31); + // CHECK: [[TMP0:%.*]] = load <2 x double>, <2 x double>* @a1, align 16 + // CHECK-NEXT: fmul <2 x double> [[TMP0]], + + vd2 = vec_cts(a2, 500); + // CHECK: [[TMP4:%.*]] = load <2 x double>, <2 x double>* @a2, align 16 + // CHECK-NEXT: fmul <2 x double> [[TMP4]], + + vsi3 = vec_ctu(vf1, 31); + // CHECK: [[TMP8:%.*]] = load <4 x float>, <4 x float>* @vf1, align 16 + // CHECK-NEXT: call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> [[TMP8]], i32 31) + + vsi4 = vec_ctu(vf2, 500); + // CHECK: [[TMP10:%.*]] = load <4 x float>, <4 x float>* @vf2, align 16 + // CHECK-NEXT: call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> [[TMP10]], i32 20) + + vull = vec_ctul(vf1, 31); + // CHECK: [[TMP12:%.*]] = load <4 x float>, <4 x float>* @vf1, align 16 + // CHECK-NEXT: fmul <4 x float> [[TMP12]], + + vull = vec_ctul(vf3, 500); + // CHECK: [[TMP21:%.*]] = load <4 x float>, <4 x float>* @vf3, align 16 + // CHECK-NEXT: fmul <4 x float> [[TMP21]], + + vsll = vec_ctsl(vf4, 31); + // CHECK: [[TMP30:%.*]] = load <4 x float>, <4 x float>* @vf4, align 16 + // CHECK-NEXT: fmul <4 x float> [[TMP30]], + + vsll = vec_ctsl(vf5, 500); + // CHECK: [[TMP39:%.*]] = load <4 x float>, <4 x float>* @vf5, align 16 + // CHECK-NEXT: fmul <4 x float> [[TMP39]], + + vf = vec_ctf(vsi1, 31); + // CHECK: [[TMP48:%.*]] = load <4 x i32>, <4 x i32>* @vsi1, align 16 + // CHECK-NEXT: call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[TMP48]], i32 31) + + vf = vec_ctf(vsi2, 500); + // CHECK: [[TMP50:%.*]] = load <4 x i32>, <4 x i32>* @vsi2, align 16 + // CHECK-NEXT: call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> [[TMP50]], i32 20) + + vd = vec_ctd(vsi3, 31); + // CHECK: [[TMP53:%.*]] = load <4 x i32>, <4 x i32>* @vsi3, align 16 + // CHECK: [[TMP83:%.*]] = call <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32> [[TMP82:%.*]]) + // CHECK-NEXT: fmul <2 x double> [[TMP83]], + + vd = vec_ctd(vsi4, 500); + + // CHECK: [[TMP84:%.*]] = load <4 x i32>, <4 x i32>* @vsi4, align 16 + // CHECK: [[TMP115:%.*]] = call <2 x double> @llvm.ppc.vsx.xvcvsxwdp(<4 x i32> [[TMP114:%.*]]) + // CHECK-NEXT: fmul <2 x double> [[TMP115]], +}