diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h --- a/clang/lib/Headers/altivec.h +++ b/clang/lib/Headers/altivec.h @@ -3167,42 +3167,45 @@ // the XL-compatible signatures are used for those functions. #ifdef __XL_COMPAT_ALTIVEC__ #define vec_ctf(__a, __b) \ - _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ - vector unsigned int \ - : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b)), \ - vector unsigned long long \ - : (__builtin_vsx_xvcvuxdsp((vector unsigned long long)(__a)) * \ - (vector float)(vector unsigned)((0x7f - (__b)) << 23)), \ - vector signed long long \ - : (__builtin_vsx_xvcvsxdsp((vector signed long long)(__a)) * \ - (vector float)(vector unsigned)((0x7f - (__b)) << 23))) + _Generic( \ + (__a), vector int \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)&0x1F), \ + vector unsigned int \ + : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ + (__b)&0x1F), \ + vector unsigned long long \ + : (__builtin_vsx_xvcvuxdsp((vector unsigned long long)(__a)) * \ + (vector float)(vector unsigned)((0x7f - (__b)) << 23 & 0x1F)), \ + vector signed long long \ + : (__builtin_vsx_xvcvsxdsp((vector signed long long)(__a)) * \ + (vector float)(vector unsigned)((0x7f - (__b)) << 23 & 0x1F))) #else // __XL_COMPAT_ALTIVEC__ #define vec_ctf(__a, __b) \ - _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ - vector unsigned int \ - : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b)), \ - vector unsigned long long \ - : (__builtin_convertvector((vector unsigned long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52)), \ - vector signed long long \ - : (__builtin_convertvector((vector signed long long)(__a), \ - vector double) * \ - (vector double)(vector unsigned long long)((0x3ffULL - (__b)) \ - << 52))) + _Generic( \ + (__a), vector int \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)&0x1F), \ + vector unsigned int \ + : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ + (__b)&0x1F), \ + vector unsigned long long \ + : (__builtin_convertvector((vector unsigned long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - (__b)) << 52 & \ + 0x1F)), \ + vector signed long long \ + : (__builtin_convertvector((vector signed long long)(__a), \ + vector double) * \ + (vector double)(vector unsigned long long)((0x3ffULL - (__b)) << 52 & \ + 0x1F))) #endif // __XL_COMPAT_ALTIVEC__ #else #define vec_ctf(__a, __b) \ - _Generic((__a), vector int \ - : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)), \ - vector unsigned int \ - : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ - (__b))) + _Generic( \ + (__a), vector int \ + : (vector float)__builtin_altivec_vcfsx((vector int)(__a), (__b)&0x1F), \ + vector unsigned int \ + : (vector float)__builtin_altivec_vcfux((vector unsigned int)(__a), \ + (__b)&0x1F)) #endif /* vec_ctd */ @@ -3241,25 +3244,27 @@ #ifdef __XL_COMPAT_ALTIVEC__ #define vec_cts(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctsxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctsxs((vector float)(__a), (__b)&0x1F), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ (vector double)(vector unsigned long long)((0x3ffULL + (__b)) \ - << 52); \ + << 52 & \ + 0x1F); \ __builtin_vsx_xvcvdpsxws(__ret); \ })) #else // __XL_COMPAT_ALTIVEC__ #define vec_cts(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctsxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctsxs((vector float)(__a), (__b)&0x1F), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ (vector double)(vector unsigned long long)((0x3ffULL + (__b)) \ - << 52); \ + << 52 & \ + 0x1F); \ __builtin_convertvector(__ret, vector signed long long); \ })) #endif // __XL_COMPAT_ALTIVEC__ @@ -3277,25 +3282,27 @@ #ifdef __XL_COMPAT_ALTIVEC__ #define vec_ctu(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctuxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctuxs((vector float)(__a), (__b)&0x1F), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ (vector double)(vector unsigned long long)((0x3ffULL + __b) \ - << 52); \ + << 52 & \ + 0x1F); \ __builtin_vsx_xvcvdpuxws(__ret); \ })) #else // __XL_COMPAT_ALTIVEC__ #define vec_ctu(__a, __b) \ _Generic((__a), vector float \ - : __builtin_altivec_vctuxs((vector float)(__a), (__b)), \ + : __builtin_altivec_vctuxs((vector float)(__a), (__b)&0x1F), \ vector double \ : __extension__({ \ vector double __ret = \ (vector double)(__a) * \ (vector double)(vector unsigned long long)((0x3ffULL + __b) \ - << 52); \ + << 52 & \ + 0x1F); \ __builtin_convertvector(__ret, vector unsigned long long); \ })) #endif // __XL_COMPAT_ALTIVEC__ diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat.c b/clang/test/CodeGen/builtins-ppc-xlcompat.c --- a/clang/test/CodeGen/builtins-ppc-xlcompat.c +++ b/clang/test/CodeGen/builtins-ppc-xlcompat.c @@ -22,20 +22,20 @@ res_vf = vec_ctf(vsll, 4); // CHECK: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* @vsll, align 16 // CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.ppc.vsx.xvcvsxdsp(<2 x i64> [[TMP0]]) -// CHECK-NEXT: fmul <4 x float> [[TMP1]], +// CHECK-NEXT: fmul <4 x float> [[TMP1]], zeroinitializer res_vf = vec_ctf(vull, 4); // CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* @vull, align 16 // CHECK-NEXT: [[TMP3:%.*]] = call <4 x float> @llvm.ppc.vsx.xvcvuxdsp(<2 x i64> [[TMP2]]) -// CHECK-NEXT: fmul <4 x float> [[TMP3]], +// CHECK-NEXT: fmul <4 x float> [[TMP3]], zeroinitializer res_vsi = vec_cts(vd, 4); // CHECK: [[TMP4:%.*]] = load <2 x double>, <2 x double>* @vd, align 16 -// CHECK-NEXT: fmul <2 x double> [[TMP4]], +// CHECK-NEXT: fmul <2 x double> [[TMP4]], zeroinitializer // CHECK: call <4 x i32> @llvm.ppc.vsx.xvcvdpsxws(<2 x double> res_vui = vec_ctu(vd, 4); // CHECK: [[TMP8:%.*]] = load <2 x double>, <2 x double>* @vd, align 16 -// CHECK-NEXT: fmul <2 x double> [[TMP8]], +// CHECK-NEXT: fmul <2 x double> [[TMP8]], zeroinitializer // CHECK: call <4 x i32> @llvm.ppc.vsx.xvcvdpuxws(<2 x double> } diff --git a/clang/test/CodeGen/ppc-emmintrin.c b/clang/test/CodeGen/ppc-emmintrin.c --- a/clang/test/CodeGen/ppc-emmintrin.c +++ b/clang/test/CodeGen/ppc-emmintrin.c @@ -905,7 +905,7 @@ // CHECK-NEXT: store <2 x i64> [[REG583]], <2 x i64>* [[REG584:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG585:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG584]], align 16 // CHECK-NEXT: [[REG586:[0-9a-zA-Z_%.]+]] = sitofp <2 x i64> [[REG585]] to <2 x double> -// CHECK-NEXT: [[REG587:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG586]], +// CHECK-NEXT: [[REG587:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG586]], zeroinitializer // CHECK-NEXT: ret <2 x double> [[REG587]] // CHECK: define available_externally <4 x float> @_mm_cvtepi32_ps(<2 x i64> [[REG588:[0-9a-zA-Z_%.]+]]) @@ -974,7 +974,7 @@ // CHECK-NEXT: store <2 x i64> [[REG640]], <2 x i64>* [[REG641:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG642:[0-9a-zA-Z_%.]+]] = load <2 x i64>, <2 x i64>* [[REG641]], align 16 // CHECK-NEXT: [[REG643:[0-9a-zA-Z_%.]+]] = sitofp <2 x i64> [[REG642]] to <2 x double> -// CHECK-NEXT: [[REG644:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG643]], +// CHECK-NEXT: [[REG644:[0-9a-zA-Z_%.]+]] = fmul <2 x double> [[REG643]], zeroinitializer // CHECK-NEXT: store <2 x double> [[REG644]], <2 x double>* [[REG645:[0-9a-zA-Z_%.]+]], align 16 // CHECK-NEXT: [[REG646:[0-9a-zA-Z_%.]+]] = load <2 x double>, <2 x double>* [[REG645]], align 16 // CHECK-NEXT: ret <2 x double> [[REG646]]