Index: llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td =================================================================== --- llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td +++ llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td @@ -23,3 +23,45 @@ def ADDHA_MPPZ_D : sme_add_vector_to_tile_u64<0b0, "addha">; def ADDVA_MPPZ_D : sme_add_vector_to_tile_u64<0b1, "addva">; } + +let Predicates = [HasSME] in { +//===----------------------------------------------------------------------===// +// Outer products +//===----------------------------------------------------------------------===// + +defm BFMOPA_MPPZZ : sme_bf16_outer_product<0b0, "bfmopa">; +defm BFMOPS_MPPZZ : sme_bf16_outer_product<0b1, "bfmops">; + +def FMOPA_MPPZZ_S : sme_outer_product_fp32<0b0, "fmopa">; +def FMOPS_MPPZZ_S : sme_outer_product_fp32<0b1, "fmops">; +} + +let Predicates = [HasSMEF64] in { +def FMOPA_MPPZZ_D : sme_outer_product_fp64<0b0, "fmopa">; +def FMOPS_MPPZZ_D : sme_outer_product_fp64<0b1, "fmops">; +} + +let Predicates = [HasSME] in { +defm FMOPAL_MPPZZ : sme_f16_outer_product<0b0, "fmopa">; +defm FMOPSL_MPPZZ : sme_f16_outer_product<0b1, "fmops">; + +def SMOPA_MPPZZ_S : sme_int_outer_product_i32<0b000, "smopa">; +def SMOPS_MPPZZ_S : sme_int_outer_product_i32<0b001, "smops">; +def UMOPA_MPPZZ_S : sme_int_outer_product_i32<0b110, "umopa">; +def UMOPS_MPPZZ_S : sme_int_outer_product_i32<0b111, "umops">; +def SUMOPA_MPPZZ_S : sme_int_outer_product_i32<0b010, "sumopa">; +def SUMOPS_MPPZZ_S : sme_int_outer_product_i32<0b011, "sumops">; +def USMOPA_MPPZZ_S : sme_int_outer_product_i32<0b100, "usmopa">; +def USMOPS_MPPZZ_S : sme_int_outer_product_i32<0b101, "usmops">; +} + +let Predicates = [HasSMEI64] in { +def SMOPA_MPPZZ_D : sme_int_outer_product_i64<0b000, "smopa">; +def SMOPS_MPPZZ_D : sme_int_outer_product_i64<0b001, "smops">; +def UMOPA_MPPZZ_D : sme_int_outer_product_i64<0b110, "umopa">; +def UMOPS_MPPZZ_D : sme_int_outer_product_i64<0b111, "umops">; +def SUMOPA_MPPZZ_D : sme_int_outer_product_i64<0b010, "sumopa">; +def SUMOPS_MPPZZ_D : sme_int_outer_product_i64<0b011, "sumops">; +def USMOPA_MPPZZ_D : sme_int_outer_product_i64<0b100, "usmopa">; +def USMOPS_MPPZZ_D : sme_int_outer_product_i64<0b101, "usmops">; +} Index: llvm/lib/Target/AArch64/SMEInstrFormats.td =================================================================== --- llvm/lib/Target/AArch64/SMEInstrFormats.td +++ llvm/lib/Target/AArch64/SMEInstrFormats.td @@ -10,6 +10,115 @@ // //===----------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// +// SME Outer Products +//===----------------------------------------------------------------------===// + +class sme_fp_outer_product_inst + : I<(outs za_ty:$ZAda), + (ins PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), + mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", + "", []>, + Sched<[]> { + bits<5> Zm; + bits<3> Pm; + bits<3> Pn; + bits<5> Zn; + let Inst{31-23} = 0b100000001; + let Inst{22} = sz; + let Inst{21} = 0b0; + let Inst{20-16} = Zm; + let Inst{15-13} = Pm; + let Inst{12-10} = Pn; + let Inst{9-5} = Zn; + let Inst{4} = S; + let Inst{3} = 0b0; +} + +class sme_outer_product_fp32 + : sme_fp_outer_product_inst { + bits<2> ZAda; + let Inst{1-0} = ZAda; + let Inst{2} = 0b0; +} + +class sme_outer_product_fp64 + : sme_fp_outer_product_inst { + bits<3> ZAda; + let Inst{2-0} = ZAda; +} + +class sme_int_outer_product_inst + : I<(outs za_ty:$ZAda), + (ins PPR3bAny:$Pn, PPR3bAny:$Pm, zpr_ty:$Zn, zpr_ty:$Zm), + mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", + "", []>, + Sched<[]> { + bits<5> Zm; + bits<3> Pm; + bits<3> Pn; + bits<5> Zn; + let Inst{31-25} = 0b1010000; + let Inst{24} = u0; + let Inst{23} = 0b1; + let Inst{22} = sz; + let Inst{21} = u1; + let Inst{20-16} = Zm; + let Inst{15-13} = Pm; + let Inst{12-10} = Pn; + let Inst{9-5} = Zn; + let Inst{4} = S; + let Inst{3} = 0b0; +} + +class sme_int_outer_product_i32 opc, string mnemonic> + : sme_int_outer_product_inst { + bits<2> ZAda; + let Inst{1-0} = ZAda; + let Inst{2} = 0b0; +} + +class sme_int_outer_product_i64 opc, string mnemonic> + : sme_int_outer_product_inst { + bits<3> ZAda; + let Inst{2-0} = ZAda; +} + +class sme_outer_product_widening_inst + : I<(outs TileOp32:$ZAda), + (ins PPR3bAny:$Pn, PPR3bAny:$Pm, ZPR16:$Zn, ZPR16:$Zm), + mnemonic, "\t$ZAda, $Pn/m, $Pm/m, $Zn, $Zm", + "", []>, + Sched<[]> { + bits<5> Zm; + bits<3> Pm; + bits<3> Pn; + bits<5> Zn; + bits<2> ZAda; + let Inst{31-22} = 0b1000000110; + let Inst{21} = op; + let Inst{20-16} = Zm; + let Inst{15-13} = Pm; + let Inst{12-10} = Pn; + let Inst{9-5} = Zn; + let Inst{4} = S; + let Inst{3-2} = 0b00; + let Inst{1-0} = ZAda; +} + +multiclass sme_bf16_outer_product { + def : sme_outer_product_widening_inst<0b0, S, mnemonic>; +} + +multiclass sme_f16_outer_product { + def : sme_outer_product_widening_inst<0b1, S, mnemonic>; +} + //===----------------------------------------------------------------------===// // SME Add Vector to Tile //===----------------------------------------------------------------------===// Index: llvm/test/MC/AArch64/SME/bfmopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/bfmopa-diagnostics.s @@ -0,0 +1,22 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile + +bfmopa za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: bfmopa za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate + +bfmopa za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: bfmopa za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +bfmopa za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: bfmopa za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/bfmopa.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/bfmopa.s @@ -0,0 +1,86 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +bfmopa za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: bfmopa za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0x80,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 80 81 + +bfmopa za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: bfmopa za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x41,0x55,0x95,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 95 81 + +bfmopa za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: bfmopa za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa3,0xed,0x88,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed 88 81 + +bfmopa za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: bfmopa za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe3,0xff,0x9f,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff 9f 81 + +bfmopa za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: bfmopa za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x21,0x0e,0x90,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e 90 81 + +bfmopa za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: bfmopa za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0x9e,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 9e 81 + +bfmopa za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: bfmopa za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0x94,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 94 81 + +bfmopa za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: bfmopa za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0x82,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 82 81 + +bfmopa za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: bfmopa za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0x9a,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 9a 81 + +bfmopa za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: bfmopa za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc1,0x0a,0x9e,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a 9e 81 + +bfmopa za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: bfmopa za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0x81,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 81 81 + +bfmopa za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: bfmopa za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x83,0xa9,0x8b,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 8b 81 + Index: llvm/test/MC/AArch64/SME/bfmops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/bfmops-diagnostics.s @@ -0,0 +1,22 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile + +bfmops za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: bfmops za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate + +bfmops za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: bfmops za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +bfmops za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: bfmops za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/bfmops.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/bfmops.s @@ -0,0 +1,86 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +bfmops za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: bfmops za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0x80,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 80 81 + +bfmops za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: bfmops za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x51,0x55,0x95,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 95 81 + +bfmops za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: bfmops za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb3,0xed,0x88,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed 88 81 + +bfmops za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: bfmops za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf3,0xff,0x9f,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff 9f 81 + +bfmops za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: bfmops za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x31,0x0e,0x90,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e 90 81 + +bfmops za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: bfmops za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0x9e,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 9e 81 + +bfmops za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: bfmops za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0x94,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 94 81 + +bfmops za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: bfmops za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0x82,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 82 81 + +bfmops za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: bfmops za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0x9a,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 9a 81 + +bfmops za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: bfmops za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd1,0x0a,0x9e,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a 9e 81 + +bfmops za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: bfmops za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0x81,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 81 81 + +bfmops za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: bfmops za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x93,0xa9,0x8b,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 8b 81 + Index: llvm/test/MC/AArch64/SME/fmopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmopa-diagnostics.s @@ -0,0 +1,60 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-f64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile + +// non-widening + +fmopa za4.s, p0/m, p0/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmopa za4.s, p0/m, p0/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmopa za8.d, p0/m, p0/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmopa za8.d, p0/m, p0/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// widening + +fmopa za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmopa za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate + +// non-widening + +fmopa za0.s, p8/m, p0/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.s, p8/m, p0/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmopa za0.s, p0/m, p8/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.s, p0/m, p8/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmopa za0.d, p8/m, p0/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.d, p8/m, p0/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmopa za0.d, p0/m, p8/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.d, p0/m, p8/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// widening + +fmopa za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmopa za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmopa za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/fmopa-fp64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmopa-fp64.s @@ -0,0 +1,88 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +// --------------------------------------------------------------------------// +// Non-widening (double-precision) + +fmopa za0.d, p0/m, p0/m, z0.d, z0.d +// CHECK-INST: fmopa za0.d, p0/m, p0/m, z0.d, z0.d +// CHECK-ENCODING: [0x00,0x00,0xc0,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 00 00 c0 80 + +fmopa za5.d, p5/m, p2/m, z10.d, z21.d +// CHECK-INST: fmopa za5.d, p5/m, p2/m, z10.d, z21.d +// CHECK-ENCODING: [0x45,0x55,0xd5,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 45 55 d5 80 + +fmopa za7.d, p3/m, p7/m, z13.d, z8.d +// CHECK-INST: fmopa za7.d, p3/m, p7/m, z13.d, z8.d +// CHECK-ENCODING: [0xa7,0xed,0xc8,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: a7 ed c8 80 + +fmopa za7.d, p7/m, p7/m, z31.d, z31.d +// CHECK-INST: fmopa za7.d, p7/m, p7/m, z31.d, z31.d +// CHECK-ENCODING: [0xe7,0xff,0xdf,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: e7 ff df 80 + +fmopa za5.d, p3/m, p0/m, z17.d, z16.d +// CHECK-INST: fmopa za5.d, p3/m, p0/m, z17.d, z16.d +// CHECK-ENCODING: [0x25,0x0e,0xd0,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 25 0e d0 80 + +fmopa za1.d, p1/m, p4/m, z1.d, z30.d +// CHECK-INST: fmopa za1.d, p1/m, p4/m, z1.d, z30.d +// CHECK-ENCODING: [0x21,0x84,0xde,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 21 84 de 80 + +fmopa za0.d, p5/m, p2/m, z19.d, z20.d +// CHECK-INST: fmopa za0.d, p5/m, p2/m, z19.d, z20.d +// CHECK-ENCODING: [0x60,0x56,0xd4,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 60 56 d4 80 + +fmopa za0.d, p6/m, p0/m, z12.d, z2.d +// CHECK-INST: fmopa za0.d, p6/m, p0/m, z12.d, z2.d +// CHECK-ENCODING: [0x80,0x19,0xc2,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 80 19 c2 80 + +fmopa za1.d, p2/m, p6/m, z1.d, z26.d +// CHECK-INST: fmopa za1.d, p2/m, p6/m, z1.d, z26.d +// CHECK-ENCODING: [0x21,0xc8,0xda,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 21 c8 da 80 + +fmopa za5.d, p2/m, p0/m, z22.d, z30.d +// CHECK-INST: fmopa za5.d, p2/m, p0/m, z22.d, z30.d +// CHECK-ENCODING: [0xc5,0x0a,0xde,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: c5 0a de 80 + +fmopa za2.d, p5/m, p7/m, z9.d, z1.d +// CHECK-INST: fmopa za2.d, p5/m, p7/m, z9.d, z1.d +// CHECK-ENCODING: [0x22,0xf5,0xc1,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 22 f5 c1 80 + +fmopa za7.d, p2/m, p5/m, z12.d, z11.d +// CHECK-INST: fmopa za7.d, p2/m, p5/m, z12.d, z11.d +// CHECK-ENCODING: [0x87,0xa9,0xcb,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 87 a9 cb 80 Index: llvm/test/MC/AArch64/SME/fmopa.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmopa.s @@ -0,0 +1,163 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +// --------------------------------------------------------------------------// +// Widening + +fmopa za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: fmopa za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0xa0,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 a0 81 + +fmopa za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: fmopa za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x41,0x55,0xb5,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 b5 81 + +fmopa za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: fmopa za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa3,0xed,0xa8,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed a8 81 + +fmopa za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: fmopa za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe3,0xff,0xbf,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff bf 81 + +fmopa za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: fmopa za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x21,0x0e,0xb0,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e b0 81 + +fmopa za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: fmopa za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0xbe,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 be 81 + +fmopa za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: fmopa za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0xb4,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 b4 81 + +fmopa za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: fmopa za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0xa2,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 a2 81 + +fmopa za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: fmopa za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0xba,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 ba 81 + +fmopa za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: fmopa za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc1,0x0a,0xbe,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a be 81 + +fmopa za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: fmopa za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0xa1,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 a1 81 + +fmopa za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: fmopa za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x83,0xa9,0xab,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 ab 81 + +// --------------------------------------------------------------------------// +// Non-widening (single-precision) + +fmopa za0.s, p0/m, p0/m, z0.s, z0.s +// CHECK-INST: fmopa za0.s, p0/m, p0/m, z0.s, z0.s +// CHECK-ENCODING: [0x00,0x00,0x80,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 80 80 + +fmopa za1.s, p5/m, p2/m, z10.s, z21.s +// CHECK-INST: fmopa za1.s, p5/m, p2/m, z10.s, z21.s +// CHECK-ENCODING: [0x41,0x55,0x95,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 95 80 + +fmopa za3.s, p3/m, p7/m, z13.s, z8.s +// CHECK-INST: fmopa za3.s, p3/m, p7/m, z13.s, z8.s +// CHECK-ENCODING: [0xa3,0xed,0x88,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed 88 80 + +fmopa za3.s, p7/m, p7/m, z31.s, z31.s +// CHECK-INST: fmopa za3.s, p7/m, p7/m, z31.s, z31.s +// CHECK-ENCODING: [0xe3,0xff,0x9f,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff 9f 80 + +fmopa za1.s, p3/m, p0/m, z17.s, z16.s +// CHECK-INST: fmopa za1.s, p3/m, p0/m, z17.s, z16.s +// CHECK-ENCODING: [0x21,0x0e,0x90,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e 90 80 + +fmopa za1.s, p1/m, p4/m, z1.s, z30.s +// CHECK-INST: fmopa za1.s, p1/m, p4/m, z1.s, z30.s +// CHECK-ENCODING: [0x21,0x84,0x9e,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 9e 80 + +fmopa za0.s, p5/m, p2/m, z19.s, z20.s +// CHECK-INST: fmopa za0.s, p5/m, p2/m, z19.s, z20.s +// CHECK-ENCODING: [0x60,0x56,0x94,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 94 80 + +fmopa za0.s, p6/m, p0/m, z12.s, z2.s +// CHECK-INST: fmopa za0.s, p6/m, p0/m, z12.s, z2.s +// CHECK-ENCODING: [0x80,0x19,0x82,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 82 80 + +fmopa za1.s, p2/m, p6/m, z1.s, z26.s +// CHECK-INST: fmopa za1.s, p2/m, p6/m, z1.s, z26.s +// CHECK-ENCODING: [0x21,0xc8,0x9a,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 9a 80 + +fmopa za1.s, p2/m, p0/m, z22.s, z30.s +// CHECK-INST: fmopa za1.s, p2/m, p0/m, z22.s, z30.s +// CHECK-ENCODING: [0xc1,0x0a,0x9e,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a 9e 80 + +fmopa za2.s, p5/m, p7/m, z9.s, z1.s +// CHECK-INST: fmopa za2.s, p5/m, p7/m, z9.s, z1.s +// CHECK-ENCODING: [0x22,0xf5,0x81,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 81 80 + +fmopa za3.s, p2/m, p5/m, z12.s, z11.s +// CHECK-INST: fmopa za3.s, p2/m, p5/m, z12.s, z11.s +// CHECK-ENCODING: [0x83,0xa9,0x8b,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 8b 80 Index: llvm/test/MC/AArch64/SME/fmops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmops-diagnostics.s @@ -0,0 +1,60 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-f64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile + +// non-widening + +fmops za4.s, p0/m, p0/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmops za4.s, p0/m, p0/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmops za8.d, p0/m, p0/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmops za8.d, p0/m, p0/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// widening + +fmops za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: fmops za4.s, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate + +// non-widening + +fmops za0.s, p8/m, p0/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.s, p8/m, p0/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmops za0.s, p0/m, p8/m, z0.s, z0.s +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.s, p0/m, p8/m, z0.s, z0.s +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmops za0.d, p8/m, p0/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.d, p8/m, p0/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmops za0.d, p0/m, p8/m, z0.d, z0.d +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.d, p0/m, p8/m, z0.d, z0.d +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// widening + +fmops za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.s, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fmops za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: fmops za0.s, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/fmops-fp64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmops-fp64.s @@ -0,0 +1,88 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-f64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-f64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-f64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-f64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +// --------------------------------------------------------------------------// +// Non-widening (double-precision) + +fmops za0.d, p0/m, p0/m, z0.d, z0.d +// CHECK-INST: fmops za0.d, p0/m, p0/m, z0.d, z0.d +// CHECK-ENCODING: [0x10,0x00,0xc0,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 10 00 c0 80 + +fmops za5.d, p5/m, p2/m, z10.d, z21.d +// CHECK-INST: fmops za5.d, p5/m, p2/m, z10.d, z21.d +// CHECK-ENCODING: [0x55,0x55,0xd5,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 55 55 d5 80 + +fmops za7.d, p3/m, p7/m, z13.d, z8.d +// CHECK-INST: fmops za7.d, p3/m, p7/m, z13.d, z8.d +// CHECK-ENCODING: [0xb7,0xed,0xc8,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: b7 ed c8 80 + +fmops za7.d, p7/m, p7/m, z31.d, z31.d +// CHECK-INST: fmops za7.d, p7/m, p7/m, z31.d, z31.d +// CHECK-ENCODING: [0xf7,0xff,0xdf,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: f7 ff df 80 + +fmops za5.d, p3/m, p0/m, z17.d, z16.d +// CHECK-INST: fmops za5.d, p3/m, p0/m, z17.d, z16.d +// CHECK-ENCODING: [0x35,0x0e,0xd0,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 35 0e d0 80 + +fmops za1.d, p1/m, p4/m, z1.d, z30.d +// CHECK-INST: fmops za1.d, p1/m, p4/m, z1.d, z30.d +// CHECK-ENCODING: [0x31,0x84,0xde,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 31 84 de 80 + +fmops za0.d, p5/m, p2/m, z19.d, z20.d +// CHECK-INST: fmops za0.d, p5/m, p2/m, z19.d, z20.d +// CHECK-ENCODING: [0x70,0x56,0xd4,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 70 56 d4 80 + +fmops za0.d, p6/m, p0/m, z12.d, z2.d +// CHECK-INST: fmops za0.d, p6/m, p0/m, z12.d, z2.d +// CHECK-ENCODING: [0x90,0x19,0xc2,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 90 19 c2 80 + +fmops za1.d, p2/m, p6/m, z1.d, z26.d +// CHECK-INST: fmops za1.d, p2/m, p6/m, z1.d, z26.d +// CHECK-ENCODING: [0x31,0xc8,0xda,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 31 c8 da 80 + +fmops za5.d, p2/m, p0/m, z22.d, z30.d +// CHECK-INST: fmops za5.d, p2/m, p0/m, z22.d, z30.d +// CHECK-ENCODING: [0xd5,0x0a,0xde,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: d5 0a de 80 + +fmops za2.d, p5/m, p7/m, z9.d, z1.d +// CHECK-INST: fmops za2.d, p5/m, p7/m, z9.d, z1.d +// CHECK-ENCODING: [0x32,0xf5,0xc1,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 32 f5 c1 80 + +fmops za7.d, p2/m, p5/m, z12.d, z11.d +// CHECK-INST: fmops za7.d, p2/m, p5/m, z12.d, z11.d +// CHECK-ENCODING: [0x97,0xa9,0xcb,0x80] +// CHECK-ERROR: instruction requires: sme-f64 +// CHECK-UNKNOWN: 97 a9 cb 80 Index: llvm/test/MC/AArch64/SME/fmops.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/fmops.s @@ -0,0 +1,163 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +// --------------------------------------------------------------------------// +// Widening + +fmops za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: fmops za0.s, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0xa0,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 a0 81 + +fmops za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: fmops za1.s, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x51,0x55,0xb5,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 b5 81 + +fmops za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: fmops za3.s, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb3,0xed,0xa8,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed a8 81 + +fmops za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: fmops za3.s, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf3,0xff,0xbf,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff bf 81 + +fmops za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: fmops za1.s, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x31,0x0e,0xb0,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e b0 81 + +fmops za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: fmops za1.s, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0xbe,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 be 81 + +fmops za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: fmops za0.s, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0xb4,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 b4 81 + +fmops za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: fmops za0.s, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0xa2,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 a2 81 + +fmops za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: fmops za1.s, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0xba,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 ba 81 + +fmops za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: fmops za1.s, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd1,0x0a,0xbe,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a be 81 + +fmops za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: fmops za2.s, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0xa1,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 a1 81 + +fmops za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: fmops za3.s, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x93,0xa9,0xab,0x81] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 ab 81 + +// --------------------------------------------------------------------------// +// Non-widening (single-precision) + +fmops za0.s, p0/m, p0/m, z0.s, z0.s +// CHECK-INST: fmops za0.s, p0/m, p0/m, z0.s, z0.s +// CHECK-ENCODING: [0x10,0x00,0x80,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 80 80 + +fmops za1.s, p5/m, p2/m, z10.s, z21.s +// CHECK-INST: fmops za1.s, p5/m, p2/m, z10.s, z21.s +// CHECK-ENCODING: [0x51,0x55,0x95,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 95 80 + +fmops za3.s, p3/m, p7/m, z13.s, z8.s +// CHECK-INST: fmops za3.s, p3/m, p7/m, z13.s, z8.s +// CHECK-ENCODING: [0xb3,0xed,0x88,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed 88 80 + +fmops za3.s, p7/m, p7/m, z31.s, z31.s +// CHECK-INST: fmops za3.s, p7/m, p7/m, z31.s, z31.s +// CHECK-ENCODING: [0xf3,0xff,0x9f,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff 9f 80 + +fmops za1.s, p3/m, p0/m, z17.s, z16.s +// CHECK-INST: fmops za1.s, p3/m, p0/m, z17.s, z16.s +// CHECK-ENCODING: [0x31,0x0e,0x90,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e 90 80 + +fmops za1.s, p1/m, p4/m, z1.s, z30.s +// CHECK-INST: fmops za1.s, p1/m, p4/m, z1.s, z30.s +// CHECK-ENCODING: [0x31,0x84,0x9e,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 9e 80 + +fmops za0.s, p5/m, p2/m, z19.s, z20.s +// CHECK-INST: fmops za0.s, p5/m, p2/m, z19.s, z20.s +// CHECK-ENCODING: [0x70,0x56,0x94,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 94 80 + +fmops za0.s, p6/m, p0/m, z12.s, z2.s +// CHECK-INST: fmops za0.s, p6/m, p0/m, z12.s, z2.s +// CHECK-ENCODING: [0x90,0x19,0x82,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 82 80 + +fmops za1.s, p2/m, p6/m, z1.s, z26.s +// CHECK-INST: fmops za1.s, p2/m, p6/m, z1.s, z26.s +// CHECK-ENCODING: [0x31,0xc8,0x9a,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 9a 80 + +fmops za1.s, p2/m, p0/m, z22.s, z30.s +// CHECK-INST: fmops za1.s, p2/m, p0/m, z22.s, z30.s +// CHECK-ENCODING: [0xd1,0x0a,0x9e,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a 9e 80 + +fmops za2.s, p5/m, p7/m, z9.s, z1.s +// CHECK-INST: fmops za2.s, p5/m, p7/m, z9.s, z1.s +// CHECK-ENCODING: [0x32,0xf5,0x81,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 81 80 + +fmops za3.s, p2/m, p5/m, z12.s, z11.s +// CHECK-INST: fmops za3.s, p2/m, p5/m, z12.s, z11.s +// CHECK-ENCODING: [0x93,0xa9,0x8b,0x80] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 8b 80 Index: llvm/test/MC/AArch64/SME/smopa-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smopa-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +smopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: smopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0x80,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 80 a0 + +smopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: smopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x41,0x55,0x95,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 95 a0 + +smopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: smopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xa3,0xed,0x88,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed 88 a0 + +smopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: smopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xe3,0xff,0x9f,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff 9f a0 + +smopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: smopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x21,0x0e,0x90,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e 90 a0 + +smopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: smopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x21,0x84,0x9e,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 9e a0 + +smopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: smopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x60,0x56,0x94,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 94 a0 + +smopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: smopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x80,0x19,0x82,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 82 a0 + +smopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: smopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x21,0xc8,0x9a,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 9a a0 + +smopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: smopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xc1,0x0a,0x9e,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a 9e a0 + +smopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: smopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x22,0xf5,0x81,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 81 a0 + +smopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: smopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x83,0xa9,0x8b,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 8b a0 Index: llvm/test/MC/AArch64/SME/smopa-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smopa-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +smopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: smopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0xc0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 00 00 c0 a0 + +smopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: smopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x45,0x55,0xd5,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 45 55 d5 a0 + +smopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: smopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa7,0xed,0xc8,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: a7 ed c8 a0 + +smopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: smopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe7,0xff,0xdf,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: e7 ff df a0 + +smopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: smopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x25,0x0e,0xd0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 25 0e d0 a0 + +smopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: smopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0xde,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 84 de a0 + +smopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: smopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0xd4,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 60 56 d4 a0 + +smopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: smopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0xc2,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 80 19 c2 a0 + +smopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: smopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0xda,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 c8 da a0 + +smopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: smopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc5,0x0a,0xde,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: c5 0a de a0 + +smopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: smopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0xc1,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 22 f5 c1 a0 + +smopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: smopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x87,0xa9,0xcb,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 87 a9 cb a0 Index: llvm/test/MC/AArch64/SME/smopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smopa-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +smopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: smopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: smopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +smopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/smops-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smops-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +smops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: smops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x10,0x00,0x80,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 80 a0 + +smops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: smops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x51,0x55,0x95,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 95 a0 + +smops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: smops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xb3,0xed,0x88,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed 88 a0 + +smops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: smops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xf3,0xff,0x9f,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff 9f a0 + +smops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: smops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x31,0x0e,0x90,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e 90 a0 + +smops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: smops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x31,0x84,0x9e,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 9e a0 + +smops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: smops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x70,0x56,0x94,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 94 a0 + +smops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: smops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x90,0x19,0x82,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 82 a0 + +smops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: smops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x31,0xc8,0x9a,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 9a a0 + +smops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: smops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xd1,0x0a,0x9e,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a 9e a0 + +smops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: smops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x32,0xf5,0x81,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 81 a0 + +smops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: smops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x93,0xa9,0x8b,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 8b a0 Index: llvm/test/MC/AArch64/SME/smops-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smops-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +smops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: smops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0xc0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 10 00 c0 a0 + +smops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: smops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x55,0x55,0xd5,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 55 55 d5 a0 + +smops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: smops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb7,0xed,0xc8,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: b7 ed c8 a0 + +smops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: smops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf7,0xff,0xdf,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: f7 ff df a0 + +smops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: smops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x35,0x0e,0xd0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 35 0e d0 a0 + +smops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: smops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0xde,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 84 de a0 + +smops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: smops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0xd4,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 70 56 d4 a0 + +smops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: smops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0xc2,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 90 19 c2 a0 + +smops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: smops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0xda,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 c8 da a0 + +smops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: smops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd5,0x0a,0xde,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: d5 0a de a0 + +smops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: smops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0xc1,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 32 f5 c1 a0 + +smops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: smops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x97,0xa9,0xcb,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 97 a9 cb a0 Index: llvm/test/MC/AArch64/SME/smops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/smops-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +smops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: smops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: smops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +smops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +smops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: smops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/sumopa-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumopa-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +sumopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: sumopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0xa0,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 a0 a0 + +sumopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: sumopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x41,0x55,0xb5,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 b5 a0 + +sumopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: sumopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xa3,0xed,0xa8,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed a8 a0 + +sumopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: sumopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xe3,0xff,0xbf,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff bf a0 + +sumopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: sumopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x21,0x0e,0xb0,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e b0 a0 + +sumopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: sumopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x21,0x84,0xbe,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 be a0 + +sumopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: sumopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x60,0x56,0xb4,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 b4 a0 + +sumopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: sumopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x80,0x19,0xa2,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 a2 a0 + +sumopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: sumopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x21,0xc8,0xba,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 ba a0 + +sumopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: sumopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xc1,0x0a,0xbe,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a be a0 + +sumopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: sumopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x22,0xf5,0xa1,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 a1 a0 + +sumopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: sumopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x83,0xa9,0xab,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 ab a0 Index: llvm/test/MC/AArch64/SME/sumopa-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumopa-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +sumopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: sumopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0xe0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 00 00 e0 a0 + +sumopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: sumopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x45,0x55,0xf5,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 45 55 f5 a0 + +sumopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: sumopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa7,0xed,0xe8,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: a7 ed e8 a0 + +sumopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: sumopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe7,0xff,0xff,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: e7 ff ff a0 + +sumopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: sumopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x25,0x0e,0xf0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 25 0e f0 a0 + +sumopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: sumopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0xfe,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 84 fe a0 + +sumopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: sumopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0xf4,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 60 56 f4 a0 + +sumopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: sumopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0xe2,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 80 19 e2 a0 + +sumopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: sumopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0xfa,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 c8 fa a0 + +sumopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: sumopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc5,0x0a,0xfe,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: c5 0a fe a0 + +sumopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: sumopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0xe1,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 22 f5 e1 a0 + +sumopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: sumopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x87,0xa9,0xeb,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 87 a9 eb a0 Index: llvm/test/MC/AArch64/SME/sumopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumopa-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +sumopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: sumopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: sumopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +sumopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/sumops-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumops-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +sumops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: sumops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x10,0x00,0xa0,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 a0 a0 + +sumops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: sumops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x51,0x55,0xb5,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 b5 a0 + +sumops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: sumops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xb3,0xed,0xa8,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed a8 a0 + +sumops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: sumops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xf3,0xff,0xbf,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff bf a0 + +sumops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: sumops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x31,0x0e,0xb0,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e b0 a0 + +sumops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: sumops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x31,0x84,0xbe,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 be a0 + +sumops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: sumops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x70,0x56,0xb4,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 b4 a0 + +sumops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: sumops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x90,0x19,0xa2,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 a2 a0 + +sumops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: sumops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x31,0xc8,0xba,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 ba a0 + +sumops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: sumops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xd1,0x0a,0xbe,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a be a0 + +sumops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: sumops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x32,0xf5,0xa1,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 a1 a0 + +sumops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: sumops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x93,0xa9,0xab,0xa0] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 ab a0 Index: llvm/test/MC/AArch64/SME/sumops-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumops-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +sumops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: sumops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0xe0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 10 00 e0 a0 + +sumops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: sumops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x55,0x55,0xf5,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 55 55 f5 a0 + +sumops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: sumops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb7,0xed,0xe8,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: b7 ed e8 a0 + +sumops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: sumops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf7,0xff,0xff,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: f7 ff ff a0 + +sumops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: sumops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x35,0x0e,0xf0,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 35 0e f0 a0 + +sumops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: sumops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0xfe,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 84 fe a0 + +sumops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: sumops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0xf4,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 70 56 f4 a0 + +sumops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: sumops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0xe2,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 90 19 e2 a0 + +sumops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: sumops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0xfa,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 c8 fa a0 + +sumops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: sumops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd5,0x0a,0xfe,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: d5 0a fe a0 + +sumops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: sumops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0xe1,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 32 f5 e1 a0 + +sumops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: sumops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x97,0xa9,0xeb,0xa0] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 97 a9 eb a0 Index: llvm/test/MC/AArch64/SME/sumops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/sumops-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +sumops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: sumops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: sumops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +sumops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +sumops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: sumops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/umopa-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umopa-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +umopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: umopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0xa0,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 a0 a1 + +umopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: umopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x41,0x55,0xb5,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 b5 a1 + +umopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: umopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xa3,0xed,0xa8,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed a8 a1 + +umopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: umopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xe3,0xff,0xbf,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff bf a1 + +umopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: umopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x21,0x0e,0xb0,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e b0 a1 + +umopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: umopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x21,0x84,0xbe,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 be a1 + +umopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: umopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x60,0x56,0xb4,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 b4 a1 + +umopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: umopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x80,0x19,0xa2,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 a2 a1 + +umopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: umopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x21,0xc8,0xba,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 ba a1 + +umopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: umopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xc1,0x0a,0xbe,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a be a1 + +umopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: umopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x22,0xf5,0xa1,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 a1 a1 + +umopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: umopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x83,0xa9,0xab,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 ab a1 Index: llvm/test/MC/AArch64/SME/umopa-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umopa-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +umopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: umopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0xe0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 00 00 e0 a1 + +umopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: umopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x45,0x55,0xf5,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 45 55 f5 a1 + +umopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: umopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa7,0xed,0xe8,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: a7 ed e8 a1 + +umopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: umopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe7,0xff,0xff,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: e7 ff ff a1 + +umopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: umopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x25,0x0e,0xf0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 25 0e f0 a1 + +umopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: umopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0xfe,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 84 fe a1 + +umopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: umopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0xf4,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 60 56 f4 a1 + +umopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: umopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0xe2,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 80 19 e2 a1 + +umopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: umopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0xfa,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 c8 fa a1 + +umopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: umopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc5,0x0a,0xfe,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: c5 0a fe a1 + +umopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: umopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0xe1,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 22 f5 e1 a1 + +umopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: umopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x87,0xa9,0xeb,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 87 a9 eb a1 Index: llvm/test/MC/AArch64/SME/umopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umopa-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +umopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: umopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: umopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +umopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/umops-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umops-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +umops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: umops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x10,0x00,0xa0,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 a0 a1 + +umops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: umops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x51,0x55,0xb5,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 b5 a1 + +umops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: umops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xb3,0xed,0xa8,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed a8 a1 + +umops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: umops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xf3,0xff,0xbf,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff bf a1 + +umops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: umops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x31,0x0e,0xb0,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e b0 a1 + +umops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: umops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x31,0x84,0xbe,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 be a1 + +umops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: umops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x70,0x56,0xb4,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 b4 a1 + +umops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: umops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x90,0x19,0xa2,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 a2 a1 + +umops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: umops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x31,0xc8,0xba,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 ba a1 + +umops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: umops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xd1,0x0a,0xbe,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a be a1 + +umops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: umops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x32,0xf5,0xa1,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 a1 a1 + +umops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: umops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x93,0xa9,0xab,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 ab a1 Index: llvm/test/MC/AArch64/SME/umops-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umops-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +umops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: umops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0xe0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 10 00 e0 a1 + +umops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: umops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x55,0x55,0xf5,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 55 55 f5 a1 + +umops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: umops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb7,0xed,0xe8,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: b7 ed e8 a1 + +umops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: umops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf7,0xff,0xff,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: f7 ff ff a1 + +umops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: umops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x35,0x0e,0xf0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 35 0e f0 a1 + +umops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: umops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0xfe,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 84 fe a1 + +umops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: umops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0xf4,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 70 56 f4 a1 + +umops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: umops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0xe2,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 90 19 e2 a1 + +umops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: umops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0xfa,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 c8 fa a1 + +umops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: umops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd5,0x0a,0xfe,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: d5 0a fe a1 + +umops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: umops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0xe1,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 32 f5 e1 a1 + +umops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: umops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x97,0xa9,0xeb,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 97 a9 eb a1 Index: llvm/test/MC/AArch64/SME/umops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/umops-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +umops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: umops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: umops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +umops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +umops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: umops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/usmopa-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmopa-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +usmopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: usmopa za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x00,0x00,0x80,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 00 00 80 a1 + +usmopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: usmopa za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x41,0x55,0x95,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 41 55 95 a1 + +usmopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: usmopa za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xa3,0xed,0x88,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: a3 ed 88 a1 + +usmopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: usmopa za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xe3,0xff,0x9f,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: e3 ff 9f a1 + +usmopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: usmopa za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x21,0x0e,0x90,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 0e 90 a1 + +usmopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: usmopa za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x21,0x84,0x9e,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 84 9e a1 + +usmopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: usmopa za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x60,0x56,0x94,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 60 56 94 a1 + +usmopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: usmopa za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x80,0x19,0x82,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 80 19 82 a1 + +usmopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: usmopa za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x21,0xc8,0x9a,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 21 c8 9a a1 + +usmopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: usmopa za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xc1,0x0a,0x9e,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: c1 0a 9e a1 + +usmopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: usmopa za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x22,0xf5,0x81,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 22 f5 81 a1 + +usmopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: usmopa za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x83,0xa9,0x8b,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 83 a9 8b a1 Index: llvm/test/MC/AArch64/SME/usmopa-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmopa-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +usmopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: usmopa za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x00,0x00,0xc0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 00 00 c0 a1 + +usmopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: usmopa za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x45,0x55,0xd5,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 45 55 d5 a1 + +usmopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: usmopa za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xa7,0xed,0xc8,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: a7 ed c8 a1 + +usmopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: usmopa za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xe7,0xff,0xdf,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: e7 ff df a1 + +usmopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: usmopa za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x25,0x0e,0xd0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 25 0e d0 a1 + +usmopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: usmopa za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x21,0x84,0xde,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 84 de a1 + +usmopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: usmopa za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x60,0x56,0xd4,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 60 56 d4 a1 + +usmopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: usmopa za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x80,0x19,0xc2,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 80 19 c2 a1 + +usmopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: usmopa za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x21,0xc8,0xda,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 21 c8 da a1 + +usmopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: usmopa za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xc5,0x0a,0xde,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: c5 0a de a1 + +usmopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: usmopa za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x22,0xf5,0xc1,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 22 f5 c1 a1 + +usmopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: usmopa za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x87,0xa9,0xcb,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 87 a9 cb a1 Index: llvm/test/MC/AArch64/SME/usmopa-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmopa-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +usmopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: usmopa za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: usmopa za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +usmopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmopa za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmopa za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmopa za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmopa za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: Index: llvm/test/MC/AArch64/SME/usmops-32.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmops-32.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +usmops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-INST: usmops za0.s, p0/m, p0/m, z0.b, z0.b +// CHECK-ENCODING: [0x10,0x00,0x80,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 10 00 80 a1 + +usmops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-INST: usmops za1.s, p5/m, p2/m, z10.b, z21.b +// CHECK-ENCODING: [0x51,0x55,0x95,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 51 55 95 a1 + +usmops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-INST: usmops za3.s, p3/m, p7/m, z13.b, z8.b +// CHECK-ENCODING: [0xb3,0xed,0x88,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: b3 ed 88 a1 + +usmops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-INST: usmops za3.s, p7/m, p7/m, z31.b, z31.b +// CHECK-ENCODING: [0xf3,0xff,0x9f,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: f3 ff 9f a1 + +usmops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-INST: usmops za1.s, p3/m, p0/m, z17.b, z16.b +// CHECK-ENCODING: [0x31,0x0e,0x90,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 0e 90 a1 + +usmops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-INST: usmops za1.s, p1/m, p4/m, z1.b, z30.b +// CHECK-ENCODING: [0x31,0x84,0x9e,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 84 9e a1 + +usmops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-INST: usmops za0.s, p5/m, p2/m, z19.b, z20.b +// CHECK-ENCODING: [0x70,0x56,0x94,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 70 56 94 a1 + +usmops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-INST: usmops za0.s, p6/m, p0/m, z12.b, z2.b +// CHECK-ENCODING: [0x90,0x19,0x82,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 90 19 82 a1 + +usmops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-INST: usmops za1.s, p2/m, p6/m, z1.b, z26.b +// CHECK-ENCODING: [0x31,0xc8,0x9a,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 31 c8 9a a1 + +usmops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-INST: usmops za1.s, p2/m, p0/m, z22.b, z30.b +// CHECK-ENCODING: [0xd1,0x0a,0x9e,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: d1 0a 9e a1 + +usmops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-INST: usmops za2.s, p5/m, p7/m, z9.b, z1.b +// CHECK-ENCODING: [0x32,0xf5,0x81,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 32 f5 81 a1 + +usmops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-INST: usmops za3.s, p2/m, p5/m, z12.b, z11.b +// CHECK-ENCODING: [0x93,0xa9,0x8b,0xa1] +// CHECK-ERROR: instruction requires: sme +// CHECK-UNKNOWN: 93 a9 8b a1 Index: llvm/test/MC/AArch64/SME/usmops-64.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmops-64.s @@ -0,0 +1,85 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d --mattr=+sme-i64 - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-i64 < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN +// Disassemble encoding and check the re-encoding (-show-encoding) matches. +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-i64 < %s \ +// RUN: | sed '/\.text$/d' | sed 's/.*encoding:\s//g' \ +// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-i64 -disassemble -show-encoding \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST + +usmops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-INST: usmops za0.d, p0/m, p0/m, z0.h, z0.h +// CHECK-ENCODING: [0x10,0x00,0xc0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 10 00 c0 a1 + +usmops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-INST: usmops za5.d, p5/m, p2/m, z10.h, z21.h +// CHECK-ENCODING: [0x55,0x55,0xd5,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 55 55 d5 a1 + +usmops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-INST: usmops za7.d, p3/m, p7/m, z13.h, z8.h +// CHECK-ENCODING: [0xb7,0xed,0xc8,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: b7 ed c8 a1 + +usmops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-INST: usmops za7.d, p7/m, p7/m, z31.h, z31.h +// CHECK-ENCODING: [0xf7,0xff,0xdf,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: f7 ff df a1 + +usmops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-INST: usmops za5.d, p3/m, p0/m, z17.h, z16.h +// CHECK-ENCODING: [0x35,0x0e,0xd0,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 35 0e d0 a1 + +usmops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-INST: usmops za1.d, p1/m, p4/m, z1.h, z30.h +// CHECK-ENCODING: [0x31,0x84,0xde,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 84 de a1 + +usmops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-INST: usmops za0.d, p5/m, p2/m, z19.h, z20.h +// CHECK-ENCODING: [0x70,0x56,0xd4,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 70 56 d4 a1 + +usmops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-INST: usmops za0.d, p6/m, p0/m, z12.h, z2.h +// CHECK-ENCODING: [0x90,0x19,0xc2,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 90 19 c2 a1 + +usmops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-INST: usmops za1.d, p2/m, p6/m, z1.h, z26.h +// CHECK-ENCODING: [0x31,0xc8,0xda,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 31 c8 da a1 + +usmops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-INST: usmops za5.d, p2/m, p0/m, z22.h, z30.h +// CHECK-ENCODING: [0xd5,0x0a,0xde,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: d5 0a de a1 + +usmops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-INST: usmops za2.d, p5/m, p7/m, z9.h, z1.h +// CHECK-ENCODING: [0x32,0xf5,0xc1,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 32 f5 c1 a1 + +usmops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-INST: usmops za7.d, p2/m, p5/m, z12.h, z11.h +// CHECK-ENCODING: [0x97,0xa9,0xcb,0xa1] +// CHECK-ERROR: instruction requires: sme-i64 +// CHECK-UNKNOWN: 97 a9 cb a1 Index: llvm/test/MC/AArch64/SME/usmops-diagnostics.s =================================================================== --- /dev/null +++ llvm/test/MC/AArch64/SME/usmops-diagnostics.s @@ -0,0 +1,39 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+sme-i64 2>&1 < %s| FileCheck %s + +// ------------------------------------------------------------------------- // +// Invalid tile +// +// .s => za0-za3, .d => za0-za7 + +usmops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: usmops za4.s, p0/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction +// CHECK-NEXT: usmops za8.d, p0/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Invalid predicate (p0-p7) + +usmops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmops za0.s, p8/m, p0/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmops za0.s, p0/m, p8/m, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmops za0.d, p8/m, p0/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +usmops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) +// CHECK-NEXT: usmops za0.d, p0/m, p8/m, z0.h, z0.h +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: