diff --git a/llvm/docs/SourceLevelDebugging.rst b/llvm/docs/SourceLevelDebugging.rst --- a/llvm/docs/SourceLevelDebugging.rst +++ b/llvm/docs/SourceLevelDebugging.rst @@ -770,7 +770,9 @@ positions, translating virtual register references into their physical machine locations. To avoid encoding incorrect variable locations, in this pass any DBG_VALUE of a virtual register that is not live, is replaced by -the undefined location. +the undefined location. The LiveDebugVariables may insert redundant DBG_VALUEs +because of virtual register rewriting. These will be subsequently removed by +the RemoveRedundantDebugValues pass. LiveDebugValues expansion of variable locations ----------------------------------------------- diff --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h --- a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h +++ b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h @@ -869,6 +869,8 @@ // Run post-ra passes. derived().addPostRegAlloc(addPass); + addPass(RemoveRedundantDebugValuesPass()); + // Insert prolog/epilog code. Eliminate abstract frame index references... if (getOptLevel() != CodeGenOpt::None) { addPass(PostRAMachineSinkingPass()); diff --git a/llvm/include/llvm/CodeGen/MachinePassRegistry.def b/llvm/include/llvm/CodeGen/MachinePassRegistry.def --- a/llvm/include/llvm/CodeGen/MachinePassRegistry.def +++ b/llvm/include/llvm/CodeGen/MachinePassRegistry.def @@ -155,6 +155,7 @@ DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass, ()) DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass, ()) DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass, ()) +DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugValuesPass, ()) DUMMY_MACHINE_FUNCTION_PASS("livedebugvalues", LiveDebugValuesPass, ()) DUMMY_MACHINE_FUNCTION_PASS("early-tailduplication", EarlyTailDuplicatePass, ()) DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass, ()) diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h --- a/llvm/include/llvm/CodeGen/Passes.h +++ b/llvm/include/llvm/CodeGen/Passes.h @@ -400,6 +400,9 @@ /// the intrinsic for later emission to the StackMap. extern char &StackMapLivenessID; + /// RemoveRedundantDebugValues pass. + extern char &RemoveRedundantDebugValuesID; + /// LiveDebugValues pass extern char &LiveDebugValuesID; diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -382,6 +382,7 @@ void initializeRegionPrinterPass(PassRegistry&); void initializeRegionViewerPass(PassRegistry&); void initializeRegisterCoalescerPass(PassRegistry&); +void initializeRemoveRedundantDebugValuesPass(PassRegistry&); void initializeRenameIndependentSubregsPass(PassRegistry&); void initializeReplaceWithVeclibLegacyPass(PassRegistry &); void initializeResetMachineFunctionPass(PassRegistry&); diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt --- a/llvm/lib/CodeGen/CMakeLists.txt +++ b/llvm/lib/CodeGen/CMakeLists.txt @@ -142,6 +142,7 @@ RegisterCoalescer.cpp RegisterPressure.cpp RegisterScavenging.cpp + RemoveRedundantDebugValues.cpp RenameIndependentSubregs.cpp MachineStableHash.cpp MIRVRegNamerUtils.cpp diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -97,6 +97,7 @@ initializeRegUsageInfoCollectorPass(Registry); initializeRegUsageInfoPropagationPass(Registry); initializeRegisterCoalescerPass(Registry); + initializeRemoveRedundantDebugValuesPass(Registry); initializeRenameIndependentSubregsPass(Registry); initializeSafeStackLegacyPassPass(Registry); initializeShadowStackGCLoweringPass(Registry); diff --git a/llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp b/llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp new file mode 100644 --- /dev/null +++ b/llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp @@ -0,0 +1,150 @@ +//===- RemoveRedundantDebugValues.cpp - Remove Redundant Debug Value MIs --===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/IR/DebugInfoMetadata.h" +#include "llvm/IR/Function.h" +#include "llvm/InitializePasses.h" +#include "llvm/Pass.h" + +/// \file RemoveRedundantDebugValues.cpp +/// +/// The RemoveRedundantDebugValues pass removes redundant DBG_VALUEs that +/// appear in MIR after the register allocator. + +#define DEBUG_TYPE "removeredundantdebugvalues" + +using namespace llvm; + +STATISTIC(NumRemovedBackward, "Number of DBG_VALUEs removed (backward scan)"); + +namespace { + +class RemoveRedundantDebugValues : public MachineFunctionPass { +public: + static char ID; + + RemoveRedundantDebugValues(); + + bool reduceDbgValues(MachineFunction &MF); + + /// Remove redundant debug value MIs for the given machine function. + bool runOnMachineFunction(MachineFunction &MF) override; + + void getAnalysisUsage(AnalysisUsage &AU) const override { + AU.setPreservesCFG(); + MachineFunctionPass::getAnalysisUsage(AU); + } +}; + +} // namespace + +//===----------------------------------------------------------------------===// +// Implementation +//===----------------------------------------------------------------------===// + +char RemoveRedundantDebugValues::ID = 0; + +char &llvm::RemoveRedundantDebugValuesID = RemoveRedundantDebugValues::ID; + +INITIALIZE_PASS(RemoveRedundantDebugValues, DEBUG_TYPE, + "Remove Redundant DEBUG_VALUE analysis", false, false) + +/// Default construct and initialize the pass. +RemoveRedundantDebugValues::RemoveRedundantDebugValues() + : MachineFunctionPass(ID) { + initializeRemoveRedundantDebugValuesPass(*PassRegistry::getPassRegistry()); +} + +// This analysis aims to remove redundant DBG_VALUEs by going backward +// in the basic block and removing all but the last DBG_VALUE for any +// given variable in a set of consecutive DBG_VALUE instructions. +// For example: +// (1) DBG_VALUE $edi, !"var1", ... +// (2) DBG_VALUE $esi, !"var2", ... +// (3) DBG_VALUE $edi, !"var1", ... +// ... +// in this case, we can remove (1). +static bool reduceDbgValsBackwardScan(MachineBasicBlock &MBB) { + LLVM_DEBUG(dbgs() << "\n == Backward Scan == \n"); + SmallVector DbgValsToBeRemoved; + SmallDenseSet VariableSet; + + for (MachineBasicBlock::reverse_iterator I = MBB.rbegin(), E = MBB.rend(); + I != E; ++I) { + MachineInstr *MI = &*I; + + if (MI->isDebugValue()) { + DebugVariable Var(MI->getDebugVariable(), MI->getDebugExpression(), + MI->getDebugLoc()->getInlinedAt()); + auto R = VariableSet.insert(Var); + // If it is a DBG_VALUE describing a constant as: + // DBG_VALUE 0, ... + // we just don't consider such instructions as candidates + // for redundant removal. + if (MI->isNonListDebugValue()) { + MachineOperand &Loc = MI->getDebugOperand(0); + if (!Loc.isReg()) { + // If we have already encountered this variable, just stop + // tracking it. + if (!R.second) + VariableSet.erase(Var); + continue; + } + } + + // We have already encountered the value for this variable, + // so this one can be deleted. + if (!R.second) + DbgValsToBeRemoved.push_back(MI); + continue; + } + + // If we encountered a non-DBG_VALUE, try to find the next + // sequence with consecutive DBG_VALUE instructions. + VariableSet.clear(); + } + + for (auto &Instr : DbgValsToBeRemoved) { + LLVM_DEBUG(dbgs() << "removing "; Instr->dump()); + Instr->eraseFromParent(); + ++NumRemovedBackward; + } + + return !DbgValsToBeRemoved.empty(); +} + +bool RemoveRedundantDebugValues::reduceDbgValues(MachineFunction &MF) { + LLVM_DEBUG(dbgs() << "\nDebug Value Reduction\n"); + + bool Changed = false; + + for (auto &MBB : MF) + Changed |= reduceDbgValsBackwardScan(MBB); + + return Changed; +} + +bool RemoveRedundantDebugValues::runOnMachineFunction(MachineFunction &MF) { + // Skip functions without debugging information. + if (!MF.getFunction().getSubprogram()) + return false; + + // Skip functions from NoDebug compilation units. + if (MF.getFunction().getSubprogram()->getUnit()->getEmissionKind() == + DICompileUnit::NoDebug) + return false; + + bool Changed = reduceDbgValues(MF); + return Changed; +} diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -1123,6 +1123,8 @@ // Run post-ra passes. addPostRegAlloc(); + addPass(&RemoveRedundantDebugValuesID, false); + addPass(&FixupStatepointCallerSavedID); // Insert prolog/epilog code. Eliminate abstract frame index references... diff --git a/llvm/test/CodeGen/AArch64/O0-pipeline.ll b/llvm/test/CodeGen/AArch64/O0-pipeline.ll --- a/llvm/test/CodeGen/AArch64/O0-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O0-pipeline.ll @@ -46,6 +46,7 @@ ; CHECK-NEXT: Eliminate PHI nodes for register allocation ; CHECK-NEXT: Two-Address instruction pass ; CHECK-NEXT: Fast Register Allocator +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Machine Optimization Remark Emitter diff --git a/llvm/test/CodeGen/AArch64/O3-pipeline.ll b/llvm/test/CodeGen/AArch64/O3-pipeline.ll --- a/llvm/test/CodeGen/AArch64/O3-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O3-pipeline.ll @@ -159,6 +159,7 @@ ; CHECK-NEXT: Machine Loop Invariant Code Motion ; CHECK-NEXT: AArch64 Redundant Copy Elimination ; CHECK-NEXT: A57 FP Anti-dependency breaker +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: PostRA Machine Sink ; CHECK-NEXT: MachineDominator Tree Construction diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll --- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll +++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll @@ -126,6 +126,7 @@ ; GCN-O0-NEXT: SI lower SGPR spill instructions ; GCN-O0-NEXT: Fast Register Allocator ; GCN-O0-NEXT: SI Fix VGPR copies +; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis ; GCN-O0-NEXT: Fixup Statepoint Caller Saved ; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis ; GCN-O0-NEXT: Machine Optimization Remark Emitter @@ -358,6 +359,7 @@ ; GCN-O1-NEXT: Machine Loop Invariant Code Motion ; GCN-O1-NEXT: SI Fix VGPR copies ; GCN-O1-NEXT: SI optimize exec mask operations +; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis ; GCN-O1-NEXT: Fixup Statepoint Caller Saved ; GCN-O1-NEXT: PostRA Machine Sink ; GCN-O1-NEXT: MachineDominator Tree Construction @@ -641,6 +643,7 @@ ; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion ; GCN-O1-OPTS-NEXT: SI Fix VGPR copies ; GCN-O1-OPTS-NEXT: SI optimize exec mask operations +; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis ; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved ; GCN-O1-OPTS-NEXT: PostRA Machine Sink ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction @@ -925,6 +928,7 @@ ; GCN-O2-NEXT: Machine Loop Invariant Code Motion ; GCN-O2-NEXT: SI Fix VGPR copies ; GCN-O2-NEXT: SI optimize exec mask operations +; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis ; GCN-O2-NEXT: Fixup Statepoint Caller Saved ; GCN-O2-NEXT: PostRA Machine Sink ; GCN-O2-NEXT: MachineDominator Tree Construction @@ -1222,6 +1226,7 @@ ; GCN-O3-NEXT: Machine Loop Invariant Code Motion ; GCN-O3-NEXT: SI Fix VGPR copies ; GCN-O3-NEXT: SI optimize exec mask operations +; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis ; GCN-O3-NEXT: Fixup Statepoint Caller Saved ; GCN-O3-NEXT: PostRA Machine Sink ; GCN-O3-NEXT: MachineDominator Tree Construction diff --git a/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll b/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll --- a/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll +++ b/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll @@ -43,7 +43,8 @@ ; CHECK-NEXT: .loc 1 10 0 ; example.cpp:10:0 ; CHECK-NEXT: .cfi_startproc ; CHECK-NEXT: ; %bb.0: -; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0] +;; NOTE: One dbg_value (DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0]) will be considered as +;; redundant after the virtregrewrite, so it will be removed. ; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr31+0] ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; CHECK-NEXT: buffer_load_dword v32, off, s[0:3], s32 diff --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll --- a/llvm/test/CodeGen/ARM/O3-pipeline.ll +++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll @@ -128,6 +128,7 @@ ; CHECK-NEXT: Stack Slot Coloring ; CHECK-NEXT: Machine Copy Propagation Pass ; CHECK-NEXT: Machine Loop Invariant Code Motion +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: PostRA Machine Sink ; CHECK-NEXT: Machine Block Frequency Analysis diff --git a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll --- a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll +++ b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll @@ -162,6 +162,7 @@ ; CHECK-NEXT: Stack Slot Coloring ; CHECK-NEXT: Machine Copy Propagation Pass ; CHECK-NEXT: Machine Loop Invariant Code Motion +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: PostRA Machine Sink ; CHECK-NEXT: Machine Block Frequency Analysis diff --git a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll --- a/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll +++ b/llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll @@ -5,7 +5,6 @@ ; CHECK-LABEL: test: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: #DEBUG_VALUE: test:Fptr <- $x3 -; CHECK-NEXT: #DEBUG_VALUE: test:Fptr <- $x3 ; CHECK-NEXT: #DEBUG_VALUE: test:Vptr <- $x4 ; CHECK-NEXT: addis 5, 2, .LCPI0_0@toc@ha ; CHECK-NEXT: .Ltmp0: diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll --- a/llvm/test/CodeGen/X86/O0-pipeline.ll +++ b/llvm/test/CodeGen/X86/O0-pipeline.ll @@ -49,6 +49,7 @@ ; CHECK-NEXT: X86 Lower Tile Copy ; CHECK-NEXT: Bundle Machine CFG Edges ; CHECK-NEXT: X86 FP Stackifier +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Machine Optimization Remark Emitter diff --git a/llvm/test/CodeGen/X86/opt-pipeline.ll b/llvm/test/CodeGen/X86/opt-pipeline.ll --- a/llvm/test/CodeGen/X86/opt-pipeline.ll +++ b/llvm/test/CodeGen/X86/opt-pipeline.ll @@ -152,6 +152,7 @@ ; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: Machine Dominance Frontier Construction ; CHECK-NEXT: X86 Load Value Injection (LVI) Load Hardening +; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis ; CHECK-NEXT: Fixup Statepoint Caller Saved ; CHECK-NEXT: PostRA Machine Sink ; CHECK-NEXT: Machine Block Frequency Analysis diff --git a/llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir b/llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir --- a/llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir +++ b/llvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir @@ -113,7 +113,6 @@ successors: %bb.1 liveins: $r0 - DBG_VALUE $r0, $noreg, !22, !DIExpression(), debug-location !23 DBG_VALUE $r0, $noreg, !22, !DIExpression(), debug-location !23 BUNDLE implicit-def dead $p0, implicit-def $pc, implicit killed $r0, implicit killed $r31, debug-location !24 { renamable $p0 = C2_cmpeqi killed renamable $r0, 0, debug-location !24 diff --git a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir --- a/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir +++ b/llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir @@ -73,7 +73,6 @@ bb.0.entry: liveins: $edi - DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !18 DBG_VALUE $edi, $noreg, !15, !DIExpression(), debug-location !18 DBG_VALUE $esi, $noreg, !16, !DIExpression(), debug-location !18 DBG_VALUE $edx, $noreg, !17, !DIExpression(), debug-location !18 diff --git a/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir new file mode 100644 --- /dev/null +++ b/llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir @@ -0,0 +1,123 @@ +# RUN: llc %s -o - -run-pass=removeredundantdebugvalues | FileCheck %s + +## This checks that the RemoveRedundantDebugValues removes redundant +## DBG_VALUEs. + +# CHECK-LABEL: foo +# CHECK-LABEL: bb.0.entry: +# CHECK: DBG_VALUE $edi +# CHECK-NOT: DBG_VALUE $edi +# CHECK: frame-setup PUSH64r + +# CHECK-LABEL: foo6 +# CHECK-LABEL: bb.0.entry: +# CHECK: DBG_VALUE 0 +# CHECK: DBG_VALUE 1 +# CHECK: frame-setup PUSH64r + +--- | + ; ModuleID = 'test.ll' + source_filename = "test.c" + target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" + target triple = "x86_64-unknown-linux-gnu" + + @side_effect = external dso_local local_unnamed_addr global i32, align 4 + @value = external dso_local local_unnamed_addr global i32, align 4 + + ; Function Attrs: nounwind uwtable + define dso_local i32 @foo(i32 %param) local_unnamed_addr !dbg !8 { + entry: + call void @llvm.dbg.value(metadata i32 %param, metadata !13, metadata !DIExpression()), !dbg !14 + store i32 %param, i32* @side_effect, align 4, !dbg !15 + %0 = load i32, i32* @value, align 4, !dbg !20 + call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !DIExpression()), !dbg !14 + tail call void @bar(i32 %0), !dbg !21 + ret i32 0, !dbg !22 + } + + define dso_local i32 @foo6(i32 %param) local_unnamed_addr !dbg !34 { + entry: + store i32 %param, i32* @side_effect, align 4, !dbg !35 + %0 = load i32, i32* @value, align 4, !dbg !35 + tail call void @bar(i32 %0), !dbg !35 + ret i32 0, !dbg !35 + } + + declare !dbg !23 dso_local void @bar(i32) local_unnamed_addr + + ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn + declare void @llvm.dbg.value(metadata, metadata, metadata) + + !llvm.dbg.cu = !{!0} + !llvm.module.flags = !{!3, !4, !5, !6} + !llvm.ident = !{!7} + + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) + !1 = !DIFile(filename: "test.c", directory: "/dir") + !2 = !{} + !3 = !{i32 7, !"Dwarf Version", i32 4} + !4 = !{i32 2, !"Debug Info Version", i32 3} + !5 = !{i32 1, !"wchar_size", i32 4} + !6 = !{i32 7, !"uwtable", i32 1} + !7 = !{!"clang version 13.0.0"} + !8 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 4, type: !9, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12) + !9 = !DISubroutineType(types: !10) + !10 = !{!11, !11} + !11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) + !12 = !{!13} + !13 = !DILocalVariable(name: "param", arg: 1, scope: !8, file: !1, line: 4, type: !11) + !14 = !DILocation(line: 0, scope: !8) + !15 = !DILocation(line: 5, column: 17, scope: !8) + !20 = !DILocation(line: 6, column: 13, scope: !8) + !21 = !DILocation(line: 7, column: 5, scope: !8) + !22 = !DILocation(line: 8, column: 5, scope: !8) + !23 = !DISubprogram(name: "bar", scope: !1, file: !1, line: 1, type: !24, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2) + !24 = !DISubroutineType(types: !25) + !25 = !{null, !11} + !34 = distinct !DISubprogram(name: "foo6", scope: !1, file: !1, line: 4, type: !9, scopeLine: 4, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12) + !35 = !DILocation(line: 0, scope: !34) + +... +--- +name: foo +alignment: 16 +liveins: + - { reg: '$edi', virtual-reg: '' } +body: | + bb.0.entry: + liveins: $edi, $esi + + DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14 + DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14 + frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp + CFI_INSTRUCTION def_cfa_offset 16 + MOV32mr $rip, 1, $noreg, @side_effect, $noreg, killed renamable $esi, debug-location !15 :: (store 4 into @side_effect) + DBG_VALUE $edi, $noreg, !13, !DIExpression(), debug-location !14 + CALL64pcrel32 @bar, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, debug-location !21 + $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 + $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 + CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 + RETQ killed $eax, debug-location !22 + +... +--- +name: foo6 +alignment: 16 +liveins: + - { reg: '$edi', virtual-reg: '' } +body: | + bb.0.entry: + liveins: $edi, $esi + + DBG_VALUE 0, $noreg, !13, !DIExpression(), debug-location !14 + DBG_VALUE 1, $noreg, !13, !DIExpression(), debug-location !14 + frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp + CFI_INSTRUCTION def_cfa_offset 16 + MOV32mr $rip, 1, $noreg, @side_effect, $noreg, killed renamable $esi, debug-location !15 :: (store 4 into @side_effect) + renamable $esi = MOV32rm $rip, 1, $noreg, @value, $noreg, debug-location !20 :: (dereferenceable load 4 from @value) + $eax = XOR32rr undef $eax, undef $eax, implicit-def dead $eflags, debug-location !22 + $rcx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !22 + CFI_INSTRUCTION def_cfa_offset 8, debug-location !22 + RETQ killed $eax, debug-location !22 + +... diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn --- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn @@ -170,6 +170,7 @@ "RegisterPressure.cpp", "RegisterScavenging.cpp", "RegisterUsageInfo.cpp", + "RemoveRedundantDebugValues.cpp", "RenameIndependentSubregs.cpp", "ReplaceWithVeclib.cpp", "ResetMachineFunctionPass.cpp",