Index: llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll +++ llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll @@ -7,13 +7,12 @@ ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ ; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=CHECKSYM,CHECKSYM32 %s --match-full-lines -; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck --check-prefix=CHECKRELOC %s +; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck --check-prefixes=CHECKRELOC,CHECKRELOC32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=CHECKSYM,CHECKSYM64 %s --match-full-lines -; RUN: not --crash llvm-objdump -r -d --symbol-description %t.o 2>&1 | FileCheck --check-prefix=XCOFF64 %s -; XCOFF64: LLVM ERROR: 64-bit support not implemented yet +; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck --check-prefixes=CHECKRELOC,CHECKRELOC64 %s %struct.S = type { i32, i32 } @@ -72,9 +71,12 @@ ; CHECKRELOC: 00000000 (idx: 7) .bar: ; CHECKRELOC-NEXT: 0: 7c 08 02 a6 mflr 0 -; CHECKRELOC-NEXT: 4: 90 01 00 08 stw 0, 8(1) -; CHECKRELOC-NEXT: 8: 94 21 ff c0 stwu 1, -64(1) -; CHECKRELOC-NEXT: c: 80 62 00 00 lwz 3, 0(2) +; CHECKRELOC32-NEXT: 4: 90 01 00 08 stw 0, 8(1) +; CHECKRELOC32-NEXT: 8: 94 21 ff c0 stwu 1, -64(1) +; CHECKRELOC32-NEXT: c: 80 62 00 00 lwz 3, 0(2) +; CHECKRELOC64-NEXT: 4: f8 01 00 10 std 0, 16(1) +; CHECKRELOC64-NEXT: 8: f8 21 ff 91 stdu 1, -112(1) +; CHECKRELOC64-NEXT: c: e8 62 00 00 ld 3, 0(2) ; CHECKRELOC-NEXT: 0000000e: R_TOC (idx: 13) s[TC] ; CHECKRELOC-NEXT: 10: 80 83 00 04 lwz 4, 4(3) ; CHECKRELOC-NEXT: 14: 7c 85 23 78 mr 5, 4 Index: llvm/test/CodeGen/PowerPC/aix-overflow-toc.py =================================================================== --- llvm/test/CodeGen/PowerPC/aix-overflow-toc.py +++ llvm/test/CodeGen/PowerPC/aix-overflow-toc.py @@ -9,12 +9,11 @@ # RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small -data-sections=false -mcpu=pwr4 -mattr=-altivec -O0 \ # RUN: -filetype=obj -o %t.o < %t.ll -# RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS32 %s +# RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS32 %s -# RUN: llc -mtriple powerpc64-ibm-aix-xcoff -data-sections=false \ -# RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj -o %t.o < %t.ll -# RUN: not --crash llvm-objdump -D -r --symbol-description %t.o 2>&1 | FileCheck --check-prefix=XCOFF64 %s -# XCOFF64: LLVM ERROR: 64-bit support not implemented yet +# RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=small -data-sections=false \ +# RUN: -mcpu=pwr4 -mattr=-altivec -O0 -filetype=obj -o %t.o < %t.ll +# RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS64 %s numentries = 12290 for x in range(0, numentries): @@ -51,18 +50,25 @@ # ASM64: ld 4, L..C12289-131072(2) # @a12289 # DIS32: 0: 80 82 00 00 lwz 4, 0(2) -# DIS32: 00000002: R_TOC (idx: 24591) a0[TC] +# DIS64: 0: e8 82 00 00 ld 4, 0(2) +# DIS: 00000002: R_TOC (idx: 24591) a0[TC] # DIS32: c: 80 82 00 04 lwz 4, 4(2) -# DIS32: 0000000e: R_TOC (idx: 24593) a1[TC] +# DIS64: c: e8 82 00 08 ld 4, 8(2) +# DIS: 0000000e: R_TOC (idx: 24593) a1[TC] # DIS32: fffc: 80 82 7f fc lwz 4, 32764(2) -# DIS32: 0000fffe: R_TOC (idx: 40973) a8191[TC] +# DIS64: fffc: e8 82 ff f8 ld 4, -8(2) +# DIS: 0000fffe: R_TOC (idx: 40973) a8191[TC] # DIS32: 10004: 80 82 80 00 lwz 4, -32768(2) -# DIS32: 00010006: R_TOC (idx: 40975) a8192[TC] +# DIS64: 10004: e8 82 00 00 ld 4, 0(2) +# DIS: 00010006: R_TOC (idx: 40975) a8192[TC] # DIS32: 1000c: 80 82 80 04 lwz 4, -32764(2) -# DIS32: 0001000e: R_TOC (idx: 40977) a8193[TC] +# DIS64: 1000c: e8 82 00 08 ld 4, 8(2) +# DIS: 0001000e: R_TOC (idx: 40977) a8193[TC] # DIS32: 18004: 80 82 c0 00 lwz 4, -16384(2) -# DIS32: 00018006: R_TOC (idx: 49167) a12288[TC] +# DIS64: 18004: e8 82 80 00 ld 4, -32768(2) +# DIS: 00018006: R_TOC (idx: 49167) a12288[TC] # DIS32: 1800c: 80 82 c0 04 lwz 4, -16380(2) -# DIS32: 0001800e: R_TOC (idx: 49169) a12289[TC] +# DIS64: 1800c: e8 82 80 08 ld 4, -32760(2) +# DIS: 0001800e: R_TOC (idx: 49169) a12289[TC] Index: llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll +++ llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll @@ -4,7 +4,7 @@ ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM32 %s --match-full-lines ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \ -; RUN: --check-prefix=32-REL %s +; RUN: --check-prefixes=REL,REL32 %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefixes=DIS,DIS32 %s @@ -17,9 +17,12 @@ ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM64 %s --match-full-lines +; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \ +; RUN: --check-prefixes=REL,REL64 %s + ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefixes=DIS,DIS64 %s -; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff \ +; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -mcpu=pwr4 -mattr=-altivec < %s | \ ; RUN: FileCheck %s @@ -70,44 +73,52 @@ ; SYM-NOT: .memcpy -; 32-REL: Relocations [ -; 32-REL-NEXT: Section (index: 2) .data { -; 32-REL-NEXT: Relocation { -; 32-REL-NEXT: Virtual Address: 0x34 -; 32-REL-NEXT: Symbol: .memcpy (3) -; 32-REL-NEXT: IsSigned: No -; 32-REL-NEXT: FixupBitValue: 0 -; 32-REL-NEXT: Length: 32 -; 32-REL-NEXT: Type: R_POS (0x0) -; 32-REL-NEXT: } -; 32-REL-NEXT: Relocation { -; 32-REL-NEXT: Virtual Address: 0x38 -; 32-REL-NEXT: Symbol: TOC (11) -; 32-REL-NEXT: IsSigned: No -; 32-REL-NEXT: FixupBitValue: 0 -; 32-REL-NEXT: Length: 32 -; 32-REL-NEXT: Type: R_POS (0x0) -; 32-REL-NEXT: } -; 32-REL-NEXT: Relocation { -; 32-REL-NEXT: Virtual Address: 0x40 -; 32-REL-NEXT: Symbol: .call_memcpy (5) -; 32-REL-NEXT: IsSigned: No -; 32-REL-NEXT: FixupBitValue: 0 -; 32-REL-NEXT: Length: 32 -; 32-REL-NEXT: Type: R_POS (0x0) -; 32-REL-NEXT: } -; 32-REL-NEXT: Relocation { -; 32-REL-NEXT: Virtual Address: 0x44 -; 32-REL-NEXT: Symbol: TOC (11) -; 32-REL-NEXT: IsSigned: No -; 32-REL-NEXT: FixupBitValue: 0 -; 32-REL-NEXT: Length: 32 -; 32-REL-NEXT: Type: R_POS (0x0) -; 32-REL-NEXT: } -; 32-REL-NEXT: } -; 32-REL-NEXT: ] - -; 32-REL-NOT: Type: R_RBR (0x1A) +; REL: Relocations [ +; REL-NEXT: Section (index: 2) .data { +; REL-NEXT: Relocation { +; REL32-NEXT: Virtual Address: 0x34 +; REL64-NEXT: Virtual Address: 0x38 +; REL-NEXT: Symbol: .memcpy (3) +; REL-NEXT: IsSigned: No +; REL-NEXT: FixupBitValue: 0 +; REL32-NEXT: Length: 32 +; REL64-NEXT: Length: 64 +; REL-NEXT: Type: R_POS (0x0) +; REL-NEXT: } +; REL-NEXT: Relocation { +; REL32-NEXT: Virtual Address: 0x38 +; REL64-NEXT: Virtual Address: 0x40 +; REL-NEXT: Symbol: TOC (11) +; REL-NEXT: IsSigned: No +; REL-NEXT: FixupBitValue: 0 +; REL32-NEXT: Length: 32 +; REL64-NEXT: Length: 64 +; REL-NEXT: Type: R_POS (0x0) +; REL-NEXT: } +; REL-NEXT: Relocation { +; REL32-NEXT: Virtual Address: 0x40 +; REL64-NEXT: Virtual Address: 0x50 +; REL-NEXT: Symbol: .call_memcpy (5) +; REL-NEXT: IsSigned: No +; REL-NEXT: FixupBitValue: 0 +; REL32-NEXT: Length: 32 +; REL64-NEXT: Length: 64 +; REL-NEXT: Type: R_POS (0x0) +; REL-NEXT: } +; REL-NEXT: Relocation { +; REL32-NEXT: Virtual Address: 0x44 +; REL64-NEXT: Virtual Address: 0x58 +; REL-NEXT: Symbol: TOC (11) +; REL-NEXT: IsSigned: No +; REL-NEXT: FixupBitValue: 0 +; REL32-NEXT: Length: 32 +; REL64-NEXT: Length: 64 +; REL-NEXT: Type: R_POS (0x0) +; REL-NEXT: } +; REL-NEXT: } +; REL-NEXT: ] + +; REL-NOT: Type: R_RBR (0x1A) ; DIS: Disassembly of section .text: ; DIS: 00000000 <.text>: @@ -117,15 +128,15 @@ ; DIS-NEXT: c: 60 00 00 00 nop ; DIS: 00000010 <.call_memcpy>: ; DIS-NEXT: 10: 7c 08 02 a6 mflr 0 -; DIS32: 14: 90 01 00 08 stw 0, 8(1) +; DIS32-NEXT: 14: 90 01 00 08 stw 0, 8(1) ; DIS32-NEXT: 18: 94 21 ff c0 stwu 1, -64(1) -; DIS64: 14: f8 01 00 10 std 0, 16(1) +; DIS64-NEXT: 14: f8 01 00 10 std 0, 16(1) ; DIS64-NEXT: 18: f8 21 ff 91 stdu 1, -112(1) ; DIS-NEXT: 1c: 4b ff ff e5 bl 0x0 ; DIS-NEXT: 20: 60 00 00 00 nop -; DIS32: 24: 38 21 00 40 addi 1, 1, 64 +; DIS32-NEXT: 24: 38 21 00 40 addi 1, 1, 64 ; DIS32-NEXT: 28: 80 01 00 08 lwz 0, 8(1) -; DIS64: 24: 38 21 00 70 addi 1, 1, 112 +; DIS64-NEXT: 24: 38 21 00 70 addi 1, 1, 112 ; DIS64-NEXT: 28: e8 01 00 10 ld 0, 16(1) ; DIS-NEXT: 2c: 7c 08 03 a6 mtlr 0 ; DIS-NEXT: 30: 4e 80 00 20 blr Index: llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll +++ llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll @@ -4,11 +4,11 @@ ; RUN: FileCheck --check-prefixes=CHECK,ASM64 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -data-sections=false -filetype=obj -o %t.o < %s -; RUN: llvm-readobj -r --expand-relocs --syms %t.o | FileCheck --check-prefixes=RELOC,SYM %s +; RUN: llvm-readobj -r --expand-relocs --syms %t.o | FileCheck --check-prefixes=RELOC,RELOC32,SYM,SYM32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: -data-sections=false -filetype=obj -o %t.o < %s -// UNSUPPORTED: powerpc64 +; RUN: llvm-readobj -r --expand-relocs --syms %t.o | FileCheck --check-prefixes=RELOC,RELOC64,SYM,SYM64 %s @common = common global i32 0, align 4 @pointer = global i32* @common, align 4 @@ -32,7 +32,8 @@ ; RELOC-NEXT: Symbol: common ([[#COM_INDX:]]) ; RELOC-NEXT: IsSigned: No ; RELOC-NEXT: FixupBitValue: 0 -; RELOC-NEXT: Length: 32 +; RELOC32-NEXT: Length: 32 +; RELOC64-NEXT: Length: 64 ; RELOC-NEXT: Type: R_POS (0x0) ; RELOC-NEXT: } ; RELOC-NEXT: } @@ -46,14 +47,17 @@ ; SYM-NEXT: NumberOfAuxEntries: 1 ; SYM-NEXT: CSECT Auxiliary Entry { ; SYM-NEXT: Index: [[#INDX+1]] -; SYM-NEXT: SectionLen: 4 +; SYM32-NEXT: SectionLen: 4 +; SYM64-NEXT: SectionLen: 8 ; SYM-NEXT: ParameterHashIndex: 0x0 ; SYM-NEXT: TypeChkSectNum: 0x0 -; SYM-NEXT: SymbolAlignmentLog2: 2 +; SYM32-NEXT: SymbolAlignmentLog2: 2 +; SYM64-NEXT: SymbolAlignmentLog2: 3 ; SYM-NEXT: SymbolType: XTY_SD (0x1) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) -; SYM-NEXT: StabInfoIndex: 0x0 -; SYM-NEXT: StabSectNum: 0x0 +; SYM32-NEXT: StabInfoIndex: 0x0 +; SYM32-NEXT: StabSectNum: 0x0 +; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB) ; SYM-NEXT: } ; SYM-NEXT: } ; SYM-NEXT: Symbol { @@ -72,14 +76,16 @@ ; SYM-NEXT: SymbolAlignmentLog2: 0 ; SYM-NEXT: SymbolType: XTY_LD (0x2) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) -; SYM-NEXT: StabInfoIndex: 0x0 -; SYM-NEXT: StabSectNum: 0x0 +; SYM32-NEXT: StabInfoIndex: 0x0 +; SYM32-NEXT: StabSectNum: 0x0 +; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB) ; SYM-NEXT: } ; SYM-NEXT: } ; SYM-NEXT: Symbol { ; SYM-NEXT: Index: [[#COM_INDX]] ; SYM-NEXT: Name: common -; SYM-NEXT: Value (RelocatableAddress): 0x4 +; SYM32-NEXT: Value (RelocatableAddress): 0x4 +; SYM64-NEXT: Value (RelocatableAddress): 0x8 ; SYM-NEXT: Section: .bss ; SYM-NEXT: Type: 0x0 ; SYM-NEXT: StorageClass: C_EXT (0x2) @@ -92,7 +98,8 @@ ; SYM-NEXT: SymbolAlignmentLog2: 2 ; SYM-NEXT: SymbolType: XTY_CM (0x3) ; SYM-NEXT: StorageMappingClass: XMC_RW (0x5) -; SYM-NEXT: StabInfoIndex: 0x0 -; SYM-NEXT: StabSectNum: 0x0 +; SYM32-NEXT: StabInfoIndex: 0x0 +; SYM32-NEXT: StabSectNum: 0x0 +; SYM64-NEXT: Auxiliary Type: AUX_CSECT (0xFB) ; SYM-NEXT: } ; SYM-NEXT: } Index: llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll =================================================================== --- llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll +++ llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll @@ -5,7 +5,7 @@ ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM32 %s --match-full-lines ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefixes=DIS,DIS32 %s -; RUN: llvm-objdump -r %t.o | FileCheck --check-prefix=DIS_REL %s +; RUN: llvm-objdump -r %t.o | FileCheck --check-prefixes=DIS_REL,DIS_REL32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec \ ; RUN: -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s @@ -13,8 +13,7 @@ ; RUN: FileCheck --check-prefixes=OBJ,OBJ64 %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM64 %s --match-full-lines ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefixes=DIS,DIS64 %s -; RUN: not --crash llvm-objdump -r %t.o 2>&1 | FileCheck --check-prefix=XCOFF64 %s -; XCOFF64: LLVM ERROR: 64-bit support not implemented yet +; RUN: llvm-objdump -r %t.o | FileCheck --check-prefixes=DIS_REL,DIS_REL64 %s @globalA = global i32 1, align 4 @globalB = global i32 2, align 4 @@ -520,16 +519,21 @@ ; DIS64-NEXT: 98: 00 00 00 00 ; DIS64-NEXT: 9c: 00 00 00 44 -; DIS_REL: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000 -; DIS_REL: RELOCATION RECORDS FOR [.text]: -; DIS_REL-NEXT: OFFSET TYPE VALUE -; DIS_REL-NEXT: 00000010 R_RBR .bar -; DIS_REL-NEXT: 0000001a R_TOC globalA -; DIS_REL-NEXT: 0000001e R_TOC globalB -; DIS_REL: RELOCATION RECORDS FOR [.data]: -; DIS_REL-NEXT: OFFSET TYPE VALUE -; DIS_REL-NEXT: 00000030 R_POS arr -; DIS_REL-NEXT: 00000034 R_POS .foo -; DIS_REL-NEXT: 00000038 R_POS TOC -; DIS_REL-NEXT: 00000040 R_POS globalA -; DIS_REL-NEXT: 00000044 R_POS globalB +; DIS_REL32: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000 +; DIS_REL64: {{.*}}aix-xcoff-reloc.ll.tmp.o: file format aix5coff64-rs6000 +; DIS_REL: RELOCATION RECORDS FOR [.text]: +; DIS_REL-NEXT: OFFSET TYPE VALUE +; DIS_REL-NEXT: 00000010 R_RBR .bar +; DIS_REL-NEXT: 0000001a R_TOC globalA +; DIS_REL-NEXT: 0000001e R_TOC globalB +; DIS_REL: RELOCATION RECORDS FOR [.data]: +; DIS_REL-NEXT: OFFSET TYPE VALUE +; DIS_REL-NEXT: 00000030 R_POS arr +; DIS_REL32-NEXT: 00000034 R_POS .foo +; DIS_REL32-NEXT: 00000038 R_POS TOC +; DIS_REL32-NEXT: 00000040 R_POS globalA +; DIS_REL32-NEXT: 00000044 R_POS globalB +; DIS_REL64-NEXT: 00000038 R_POS .foo +; DIS_REL64-NEXT: 00000040 R_POS TOC +; DIS_REL64-NEXT: 00000050 R_POS globalA +; DIS_REL64-NEXT: 00000058 R_POS globalB