diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
--- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -203,9 +203,14 @@
           NewTy, New, Idx, New->getName() + ".sub");
       IC.InsertNewInstBefore(GEP, *It);
 
+      // Gracefully handle allocas in other address spaces.
+      Value *NewV = GEP;
+      if (AI.getType()->getPointerAddressSpace() != GEP->getType()->getPointerAddressSpace())
+        NewV = IC.Builder.CreateAddrSpaceCast(GEP, AI.getType());
+
       // Now make everything use the getelementptr instead of the original
       // allocation.
-      return IC.replaceInstUsesWith(AI, GEP);
+      return IC.replaceInstUsesWith(AI, NewV);
     }
   }
 
diff --git a/llvm/test/Transforms/InstCombine/alloca-in-non-alloca-as.ll b/llvm/test/Transforms/InstCombine/alloca-in-non-alloca-as.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/alloca-in-non-alloca-as.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; Gracefully handle the alloca that is not in the alloca AS (=5)
+
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
+target triple = "amdgcn-amd-amdhsa"
+
+define weak amdgpu_kernel void @__omp_offloading_802_ea0109_main_l8(i32* %a) {
+; CHECK-LABEL: @__omp_offloading_802_ea0109_main_l8(
+; CHECK-NEXT:  .master:
+; CHECK-NEXT:    ret void
+;
+.master:
+  %0 = alloca i8, i64 8, align 1
+  %a_on_stack = bitcast i8* %0 to i32**
+  store i32* undef, i32** %a_on_stack, align 8
+  ret void
+}