diff --git a/lld/test/COFF/arm-thumb-thunks-multipass.s b/lld/test/COFF/arm-thumb-thunks-multipass.s --- a/lld/test/COFF/arm-thumb-thunks-multipass.s +++ b/lld/test/COFF/arm-thumb-thunks-multipass.s @@ -51,8 +51,8 @@ .endr bx lr -// FUNC01: 403000: 41 f0 fc 87 bne.w #8184 <.text+0x3ffc> -// FUNC01: 403004: 41 f0 ff 87 bne.w #8190 <.text+0x4006> +// FUNC01: 403000: 41 f0 fc 87 bne.w 0x404ffc <.text+0x3ffc> +// FUNC01: 403004: 41 f0 ff 87 bne.w 0x405006 <.text+0x4006> // Check that we only have two thunks here, even if we created the first // thunk twice (once in the first pass, then thrown away and recreated diff --git a/lld/test/COFF/arm-thumb-thunks.s b/lld/test/COFF/arm-thumb-thunks.s --- a/lld/test/COFF/arm-thumb-thunks.s +++ b/lld/test/COFF/arm-thumb-thunks.s @@ -48,9 +48,9 @@ "??_C@string2": .asciz "bar" -// MAIN: 401000: 40 f0 05 80 bne.w #10 <.text+0xe> -// MAIN: 401004: 40 f0 08 80 bne.w #16 <.text+0x18> -// MAIN: 401008: 40 f0 01 80 bne.w #2 <.text+0xe> +// MAIN: 401000: 40 f0 05 80 bne.w 0x40100e <.text+0xe> +// MAIN: 401004: 40 f0 08 80 bne.w 0x401018 <.text+0x18> +// MAIN: 401008: 40 f0 01 80 bne.w 0x40100e <.text+0xe> // MAIN: 40100c: 70 47 bx lr // func1 thunk // MAIN: 40100e: 40 f2 08 0c movw r12, #8 @@ -61,7 +61,7 @@ // MAIN: 40101c: c0 f2 20 0c movt r12, #32 // MAIN: 401020: e7 44 add pc, r12 -// FUNC1: 501022: 40 f0 01 80 bne.w #2 <.text+0x100028> +// FUNC1: 501022: 40 f0 01 80 bne.w 0x501028 <.text+0x100028> // FUNC1: 501026: 70 47 bx lr // func2 thunk // FUNC1: 501028: 4f f6 fe 7c movw r12, #65534 diff --git a/lld/test/COFF/armnt-blx23t.test b/lld/test/COFF/armnt-blx23t.test --- a/lld/test/COFF/armnt-blx23t.test +++ b/lld/test/COFF/armnt-blx23t.test @@ -12,20 +12,20 @@ # BEFORE: 4: 2d e9 00 48 push.w {r11, lr} # BEFORE: 8: eb 46 mov r11, sp # BEFORE: a: 20 20 movs r0, #32 -# BEFORE: c: 00 f0 00 f8 bl #0 +# BEFORE: c: 00 f0 00 f8 bl {{.+}} @ imm = #0 # BEFORE: 10: 01 30 adds r0, #1 # BEFORE: 12: bd e8 00 88 pop.w {r11, pc} # AFTER: Disassembly of section .text: # AFTER-EMPTY: -# AFTER: 1000: 70 47 bx lr -# AFTER: 1002: 00 bf nop -# AFTER: 1004: 2d e9 00 48 push.w {r11, lr} -# AFTER: 1008: eb 46 mov r11, sp -# AFTER: 100a: 20 20 movs r0, #32 -# AFTER: 100c: ff f7 f8 ff bl #-16 -# AFTER: 1010: 01 30 adds r0, #1 -# AFTER: 1012: bd e8 00 88 pop.w {r11, pc} +# AFTER: 401000: 70 47 bx lr +# AFTER: 401002: 00 bf nop +# AFTER: 401004: 2d e9 00 48 push.w {r11, lr} +# AFTER: 401008: eb 46 mov r11, sp +# AFTER: 40100a: 20 20 movs r0, #32 +# AFTER: 40100c: ff f7 f8 ff bl 0x401000 <.text> +# AFTER: 401010: 01 30 adds r0, #1 +# AFTER: 401012: bd e8 00 88 pop.w {r11, pc} --- !COFF header: diff --git a/lld/test/COFF/armnt-branch24t.test b/lld/test/COFF/armnt-branch24t.test --- a/lld/test/COFF/armnt-branch24t.test +++ b/lld/test/COFF/armnt-branch24t.test @@ -10,15 +10,15 @@ # BEFORE: 0: 70 47 bx lr # BEFORE: 2: 00 bf nop # BEFORE: 4: 20 20 movs r0, #32 -# BEFORE: 6: 00 f0 00 b8 b.w #0 +# BEFORE: 6: 00 f0 00 b8 b.w {{.+}} @ imm = #0 # AFTER: Disassembly of section .text: # AFTER-EMPTY: # AFTER: <.text>: -# AFTER: 1000: 70 47 bx lr -# AFTER: 1002: 00 bf nop -# AFTER: 1004: 20 20 movs r0, #32 -# AFTER: 1006: ff f7 fb bf b.w #-10 +# AFTER: 401000: 70 47 bx lr +# AFTER: 401002: 00 bf nop +# AFTER: 401004: 20 20 movs r0, #32 +# AFTER: 401006: ff f7 fb bf b.w 0x401000 <.text> --- !COFF header: diff --git a/lld/test/COFF/delayimports-armnt.yaml b/lld/test/COFF/delayimports-armnt.yaml --- a/lld/test/COFF/delayimports-armnt.yaml +++ b/lld/test/COFF/delayimports-armnt.yaml @@ -51,16 +51,17 @@ # BASEREL-NEXT: } # BASEREL-NEXT: ] # +# DISASM: 00401000 <.text>: # DISASM: 40100c: 43 f2 08 0c movw r12, #12296 # DISASM-NEXT: c0 f2 40 0c movt r12, #64 -# DISASM-NEXT: 00 f0 00 b8 b.w #0 +# DISASM-NEXT: 00 f0 00 b8 b.w {{.+}} @ imm = #0 # DISASM-NEXT: 2d e9 0f 48 push.w {r0, r1, r2, r3, r11, lr} # DISASM-NEXT: 0d f2 10 0b addw r11, sp, #16 # DISASM-NEXT: 2d ed 10 0b vpush {d0, d1, d2, d3, d4, d5, d6, d7} # DISASM-NEXT: 61 46 mov r1, r12 # DISASM-NEXT: 42 f2 00 00 movw r0, #8192 # DISASM-NEXT: c0 f2 40 00 movt r0, #64 -# DISASM-NEXT: ff f7 e7 ff bl #-50 +# DISASM-NEXT: ff f7 e7 ff bl 0x401000 <.text> # DISASM-NEXT: 84 46 mov r12, r0 # DISASM-NEXT: bd ec 10 0b vpop {d0, d1, d2, d3, d4, d5, d6, d7} # DISASM-NEXT: bd e8 0f 48 pop.w {r0, r1, r2, r3, r11, lr} diff --git a/lld/test/ELF/arm-bl-v6-inrange.s b/lld/test/ELF/arm-bl-v6-inrange.s --- a/lld/test/ELF/arm-bl-v6-inrange.s +++ b/lld/test/ELF/arm-bl-v6-inrange.s @@ -34,8 +34,8 @@ // CHECK-NEXT: Disassembly of section .caller: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 500000: 00 f4 00 f8 bl #-4194304 -// CHECK-NEXT: 500004: ff f3 fe ef blx #4194300 +// CHECK-NEXT: 500000: 00 f4 00 f8 bl 0x100004 +// CHECK-NEXT: 500004: ff f3 fe ef blx 0x900004 // CHECK-NEXT: 500008: 70 47 bx lr .arm diff --git a/lld/test/ELF/arm-bl-v6.s b/lld/test/ELF/arm-bl-v6.s --- a/lld/test/ELF/arm-bl-v6.s +++ b/lld/test/ELF/arm-bl-v6.s @@ -28,7 +28,7 @@ // CHECK-ARM1: Disassembly of section .text: // CHECK-ARM1-EMPTY: // CHECK-ARM1-NEXT: <_start>: -// CHECK-ARM1-NEXT: 21000: 00 00 00 fa blx #0 +// CHECK-ARM1-NEXT: 21000: 00 00 00 fa blx 0x21008 // CHECK-ARM1-NEXT: 21004: 1e ff 2f e1 bx lr .thumb .section .text.2, "ax", %progbits @@ -38,7 +38,7 @@ bl farthumbfunc // CHECK-THUMB1: : -// CHECK-THUMB1-NEXT: 21008: 00 f2 00 e8 blx #2097152 +// CHECK-THUMB1-NEXT: 21008: 00 f2 00 e8 blx 0x22100c <__ARMv5ABSLongThunk_farthumbfunc> /// 6 Megabytes, enough to make farthumbfunc out of range of caller /// on a v6 Arm, but not on a v7 Arm. diff --git a/lld/test/ELF/arm-blx.s b/lld/test/ELF/arm-blx.s --- a/lld/test/ELF/arm-blx.s +++ b/lld/test/ELF/arm-blx.s @@ -11,8 +11,8 @@ // RUN: ld.lld --script %t.script %t %tfar -o %t2 // RUN: llvm-objdump -d --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s -// Test BLX instruction is chosen for ARM BL/BLX instruction and Thumb callee -// Using two callees to ensure at least one has 2-byte alignment. +/// Test BLX instruction is chosen for ARM BL/BLX instruction and Thumb callee +/// Using two callees to ensure at least one has 2-byte alignment. .syntax unified .thumb .section .callee_low, "ax",%progbits @@ -48,7 +48,7 @@ blx callee_high2 bl blx_far blx blx_far2 -// blx to ARM instruction should be written as a BL +/// blx to ARM instruction should be written as a BL bl callee_arm_low blx callee_arm_low bl callee_arm_high @@ -87,22 +87,22 @@ // CHECK: Disassembly of section .caller: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 10000: 2b c0 ff fa blx #-65364 -// CHECK-NEXT: 10004: 2a c0 ff fa blx #-65368 -// CHECK-NEXT: 10008: 29 c0 ff fb blx #-65370 -// CHECK-NEXT: 1000c: 28 c0 ff fb blx #-65374 -// CHECK-NEXT: 10010: 3a 00 00 fa blx #232 -// CHECK-NEXT: 10014: 39 00 00 fa blx #228 -// CHECK-NEXT: 10018: 38 00 00 fb blx #226 -// CHECK-NEXT: 1001c: 37 00 00 fb blx #222 -// 10020 + 1FFFFFC + 8 = 0x2010024 = blx_far -// CHECK-NEXT: 10020: ff ff 7f fa blx #33554428 -// 10024 + 1FFFFFC + 8 = 0x2010028 = blx_far2 -// CHECK-NEXT: 10024: ff ff 7f fa blx #33554428 -// CHECK-NEXT: 10028: 34 c0 ff eb bl #-65328 -// CHECK-NEXT: 1002c: 33 c0 ff eb bl #-65332 -// CHECK-NEXT: 10030: 72 00 00 eb bl #456 -// CHECK-NEXT: 10034: 71 00 00 eb bl #452 +// CHECK-NEXT: 10000: 2b c0 ff fa blx 0xb4 +// CHECK-NEXT: 10004: 2a c0 ff fa blx 0xb4 +// CHECK-NEXT: 10008: 29 c0 ff fb blx 0xb6 +// CHECK-NEXT: 1000c: 28 c0 ff fb blx 0xb6 +// CHECK-NEXT: 10010: 3a 00 00 fa blx 0x10100 +// CHECK-NEXT: 10014: 39 00 00 fa blx 0x10100 +// CHECK-NEXT: 10018: 38 00 00 fb blx 0x10102 +// CHECK-NEXT: 1001c: 37 00 00 fb blx 0x10102 +/// 0x2010024 = blx_far +// CHECK-NEXT: 10020: ff ff 7f fa blx 0x2010024 +/// 0x2010028 = blx_far2 +// CHECK-NEXT: 10024: ff ff 7f fa blx 0x2010028 +// CHECK-NEXT: 10028: 34 c0 ff eb bl 0x100 +// CHECK-NEXT: 1002c: 33 c0 ff eb bl 0x100 +// CHECK-NEXT: 10030: 72 00 00 eb bl 0x10200 +// CHECK-NEXT: 10034: 71 00 00 eb bl 0x10200 // CHECK-NEXT: 10038: 1e ff 2f e1 bx lr // CHECK: Disassembly of section .callee3: diff --git a/lld/test/ELF/arm-branch-rangethunk.s b/lld/test/ELF/arm-branch-rangethunk.s --- a/lld/test/ELF/arm-branch-rangethunk.s +++ b/lld/test/ELF/arm-branch-rangethunk.s @@ -19,20 +19,23 @@ beq too_far3 // SHORT: 00030000 <_start>: -// SHORT-NEXT: 30000: bl #4 <__ARMv7ABSLongThunk_too_far1> -// SHORT-NEXT: 30004: b #4 <__ARMv7ABSLongThunk_too_far2> -// SHORT-NEXT: 30008: beq #4 <__ARMv7ABSLongThunk_too_far3> +// SHORT-NEXT: 30000: bl 0x3000c <__ARMv7ABSLongThunk_too_far1> +// SHORT-NEXT: 30004: b 0x30010 <__ARMv7ABSLongThunk_too_far2> +// SHORT-NEXT: 30008: beq 0x30014 <__ARMv7ABSLongThunk_too_far3> // SHORT: 0003000c <__ARMv7ABSLongThunk_too_far1>: -// SHORT-NEXT: 3000c: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff4> +/// 0x2030008 = too_far1 +// SHORT-NEXT: 3000c: b 0x2030008 // SHORT: 00030010 <__ARMv7ABSLongThunk_too_far2>: -// SHORT-NEXT: 30010: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffff8> +/// 0x203000c = too_far2 +// SHORT-NEXT: 30010: b 0x203000c // SHORT: 00030014 <__ARMv7ABSLongThunk_too_far3>: -// SHORT-NEXT: 30014: b #33554420 <__ARMv7ABSLongThunk_too_far3+0x1fffffc> +/// 0x2030010 = too_far3 +// SHORT-NEXT: 30014: b 0x2030010 // LONG: 00030000 <_start>: -// LONG-NEXT: 30000: bl #4 <__ARMv7ABSLongThunk_too_far1> -// LONG-NEXT: 30004: b #12 <__ARMv7ABSLongThunk_too_far2> -// LONG-NEXT: 30008: beq #20 <__ARMv7ABSLongThunk_too_far3> +// LONG-NEXT: 30000: bl 0x3000c <__ARMv7ABSLongThunk_too_far1> +// LONG-NEXT: 30004: b 0x30018 <__ARMv7ABSLongThunk_too_far2> +// LONG-NEXT: 30008: beq 0x30024 <__ARMv7ABSLongThunk_too_far3> // LONG: 0003000c <__ARMv7ABSLongThunk_too_far1>: // LONG-NEXT: 3000c: movw r12, #20 // LONG-NEXT: 30010: movt r12, #515 @@ -44,4 +47,4 @@ // LONG: 00030024 <__ARMv7ABSLongThunk_too_far3>: // LONG-NEXT: 30024: movw r12, #44 // LONG-NEXT: 30028: movt r12, #515 -// LONG-NEXT: 3002c: bx r12 \ No newline at end of file +// LONG-NEXT: 3002c: bx r12 diff --git a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s --- a/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s +++ b/lld/test/ELF/arm-branch-undef-weak-plt-thunk.s @@ -24,8 +24,8 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 201e4: 00 00 00 ea b #0 <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for> -// CHECK-NEXT: 201e8: 02 00 00 eb bl #8 <__ARMv7ABSLongThunk_bar2> +// CHECK-NEXT: 201e4: 00 00 00 ea b 0x201ec <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for> +// CHECK-NEXT: 201e8: 02 00 00 eb bl 0x201f8 <__ARMv7ABSLongThunk_bar2> // CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>: // CHECK-NEXT: 201ec: 30 c2 00 e3 movw r12, #560 // CHECK-NEXT: 201f0: 02 c2 40 e3 movt r12, #514 diff --git a/lld/test/ELF/arm-branch.s b/lld/test/ELF/arm-branch.s --- a/lld/test/ELF/arm-branch.s +++ b/lld/test/ELF/arm-branch.s @@ -44,22 +44,14 @@ bx lr // CHECK: 00010000 <_start>: -/// S(callee_low) = 0xb4; P = 0x10000; A = -8; S + A - P = -0xff54 = -65364 -// CHECK-NEXT: 10000: bl #-65364 -/// S(callee_low) = 0xb4; P = 0x10004; A = -8; S + A - P = -0xff58 = -65368 -// CHECK-NEXT: 10004: b #-65368 -/// S(callee_low) = 0xb4; P = 0x10008; A = -8; S + A - P = -0xff5c = -65372 -// CHECK-NEXT: 10008: beq #-65372 -/// S(callee_high) = 0x10028; P = 0x1000c; A = -8; S + A - P = 0x14 = 20 -// CHECK-NEXT: 1000c: bl #20 -/// S(callee_high) = 0x10028; P = 0x10010; A = -8; S + A - P = 0x10 = 16 -// CHECK-NEXT: 10010: b #16 -/// S(callee_high) = 0x10028; P = 0x10014; A = -8; S + A - P = 0x0c = 12 -// CHECK-NEXT: 10014: bne #12 -/// S(far) = 0x201001c; P = 0x10018; A = -8; S + A - P = 0x1fffffc = 33554428 -// CHECK-NEXT: 10018: bl #33554428 -/// S(far) = 0x201001c; P = 0x1001c; A = -8; S + A - P = 0x1fffff8 = 33554424 -// CHECK-NEXT: 1001c: b #33554424 -/// S(far) = 0x201001c; P = 0x10020; A = -8; S + A - P = 0x1fffff4 = 33554420 -// CHECK-NEXT: 10020: bgt #33554420 +// CHECK-NEXT: 10000: bl 0xb4 +// CHECK-NEXT: 10004: b 0xb4 +// CHECK-NEXT: 10008: beq 0xb4 +// CHECK-NEXT: 1000c: bl 0x10028 +// CHECK-NEXT: 10010: b 0x10028 +// CHECK-NEXT: 10014: bne 0x10028 +/// 0x201001c = far +// CHECK-NEXT: 10018: bl 0x201001c +// CHECK-NEXT: 1001c: b 0x201001c +// CHECK-NEXT: 10020: bgt 0x201001c // CHECK-NEXT: 10024: bx lr diff --git a/lld/test/ELF/arm-exidx-canunwind.s b/lld/test/ELF/arm-exidx-canunwind.s --- a/lld/test/ELF/arm-exidx-canunwind.s +++ b/lld/test/ELF/arm-exidx-canunwind.s @@ -55,8 +55,8 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 20108: bl #4 -// CHECK-NEXT: bl #4 +// CHECK-NEXT: 20108: bl 0x20114 +// CHECK-NEXT: bl 0x20118 // CHECK-NEXT: bx lr // CHECK: : // CHECK-NEXT: 20114: bx lr diff --git a/lld/test/ELF/arm-exidx-gc.s b/lld/test/ELF/arm-exidx-gc.s --- a/lld/test/ELF/arm-exidx-gc.s +++ b/lld/test/ELF/arm-exidx-gc.s @@ -93,8 +93,8 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 2010c: bl #4 -// CHECK-NEXT: 20110: bl #4 +// CHECK-NEXT: 2010c: bl 0x20118 +// CHECK-NEXT: 20110: bl 0x2011c // CHECK-NEXT: 20114: bx lr // CHECK: : // CHECK-NEXT: 20118: bx lr diff --git a/lld/test/ELF/arm-extreme-range-pi-thunk.s b/lld/test/ELF/arm-extreme-range-pi-thunk.s --- a/lld/test/ELF/arm-extreme-range-pi-thunk.s +++ b/lld/test/ELF/arm-extreme-range-pi-thunk.s @@ -34,7 +34,7 @@ // CHECK: Disassembly of section .text_low: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 130: bl #0 <__ARMV7PILongThunk_high> +// CHECK-NEXT: 130: bl 0x138 <__ARMV7PILongThunk_high> // CHECK-NEXT: 134: bx lr // CHECK: <__ARMV7PILongThunk_high>: @@ -47,7 +47,7 @@ // CHECK: Disassembly of section .text_high: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: f0000000: bl #0 <__ARMV7PILongThunk__start> +// CHECK-NEXT: f0000000: bl 0xf0000008 <__ARMV7PILongThunk__start> // CHECK-NEXT: f0000004: bx lr // CHECK: <__ARMV7PILongThunk__start>: @@ -61,9 +61,8 @@ // CHECK-THUMB: Disassembly of section .text_low: // CHECK-THUMB-EMPTY: // CHECK-THUMB-NEXT: <_start>: -// CHECK-THUMB-NEXT: 130: bl #4 +// CHECK-THUMB-NEXT: 130: bl 0x138 <__ThumbV7PILongThunk_high> // CHECK-THUMB-NEXT: 134: bx lr -// CHECK-THUMB-NEXT: 136: bmi #-88 // CHECK-THUMB: <__ThumbV7PILongThunk_high>: // CHECK-THUMB-NEXT: 138: movw r12, #65213 @@ -75,7 +74,7 @@ // CHECK-THUMB: Disassembly of section .text_high: // CHECK-THUMB-EMPTY: // CHECK-THUMB-NEXT: : -// CHECK-THUMB-NEXT: f0000000: bl #4 +// CHECK-THUMB-NEXT: f0000000: bl 0xf0000008 <__ThumbV7PILongThunk__start> // CHECK-THUMB-NEXT: f0000004: bx lr // CHECK-THUMB: <__ThumbV7PILongThunk__start>: diff --git a/lld/test/ELF/arm-fix-cortex-a8-blx.s b/lld/test/ELF/arm-fix-cortex-a8-blx.s --- a/lld/test/ELF/arm-fix-cortex-a8-blx.s +++ b/lld/test/ELF/arm-fix-cortex-a8-blx.s @@ -28,6 +28,6 @@ .inst.n 0xe800 // CHECK-PATCH: 21ffa: nop.w -// CHECK-PATCH-NEXT: 21ffe: blx #4 +// CHECK-PATCH-NEXT: 21ffe: blx 0x22004 <__CortexA8657417_21FFE> // CHECK-PATCH: 00022004 <__CortexA8657417_21FFE>: -// CHECK-PATCH-NEXT: 22004: b #-4104 +// CHECK-PATCH-NEXT: 22004: b 0x21004 <{{.+}}> @ imm = #-4104 diff --git a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s --- a/lld/test/ELF/arm-fix-cortex-a8-nopatch.s +++ b/lld/test/ELF/arm-fix-cortex-a8-nopatch.s @@ -28,8 +28,8 @@ b.w target // CALLSITE1: 00021ffa : -// CALLSITE1-NEXT: 21ffa: b.w #-4 -// CALLSITE1-NEXT: 21ffe: b.w #-8 +// CALLSITE1-NEXT: 21ffa: b.w 0x21ffa +// CALLSITE1-NEXT: 21ffe: b.w 0x21ffa .space 4088 .type target2, %function @@ -43,7 +43,7 @@ // CALLSITE2: 00022ffa : // CALLSITE2-NEXT: 22ffa: nop // CALLSITE2-NEXT: 22ffc: nop -// CALLSITE2-NEXT: 22ffe: bl #-8 +// CALLSITE2-NEXT: 22ffe: bl 0x22ffa .space 4088 .type target3, %function @@ -56,7 +56,7 @@ // CALLSITE3: 00023ffa : // CALLSITE3-NEXT: 23ffa: nop.w -// CALLSITE3-NEXT: 23ffe: beq.w #-4104 +// CALLSITE3-NEXT: 23ffe: beq.w 0x22ffa .space 4088 .type source4, %function @@ -71,7 +71,7 @@ // CALLSITE4: 00024ffa : // CALLSITE4-NEXT: 24ffa: nop.w -// CALLSITE4-NEXT: 24ffe: beq.w #0 +// CALLSITE4-NEXT: 24ffe: beq.w 0x25002 // CALLSITE4: 00025002 : // CALLSITE4-NEXT: 25002: nop.w @@ -90,7 +90,7 @@ beq.w target5 // CALLSITE5: 00025ffe : -// CALLSITE5-NEXT: 25ffe: beq.w #-8 +// CALLSITE5-NEXT: 25ffe: beq.w 0x25ffa /// Edge case where two word sequence starts at offset 0xffc, check that /// we don't match. In this case the branch will be completely in the 2nd @@ -105,7 +105,7 @@ bl target6 // CALLSITE6: 00027000 : -// CALLSITE6-NEXT: 27000: bl #-4 +// CALLSITE6-NEXT: 27000: bl 0x27000 /// Edge case where two word sequence starts at offset 0xffe, check that /// we don't match. In this case the branch will be completely in the 2nd @@ -120,4 +120,4 @@ bl target7 // CALLSITE7: 00028002 : -// CALLSITE7: 28002: bl #-4 +// CALLSITE7: 28002: bl 0x28002 diff --git a/lld/test/ELF/arm-fix-cortex-a8-plt.s b/lld/test/ELF/arm-fix-cortex-a8-plt.s --- a/lld/test/ELF/arm-fix-cortex-a8-plt.s +++ b/lld/test/ELF/arm-fix-cortex-a8-plt.s @@ -34,6 +34,6 @@ // CHECK: 00002ffa : // CHECK-NEXT: 2ffa: nop.w -// CHECK-NEXT: 2ffe: blx #4 +// CHECK-NEXT: 2ffe: blx 0x3004 <__CortexA8657417_2FFE> // CHECK: 00003004 <__CortexA8657417_2FFE>: -// CHECK-NEXT: 3004: b #-4076 +// CHECK-NEXT: 3004: b 0x2020 diff --git a/lld/test/ELF/arm-fix-cortex-a8-recognize.s b/lld/test/ELF/arm-fix-cortex-a8-recognize.s --- a/lld/test/ELF/arm-fix-cortex-a8-recognize.s +++ b/lld/test/ELF/arm-fix-cortex-a8-recognize.s @@ -55,11 +55,11 @@ // CALLSITE1: 00021ffa : // CALLSITE1-NEXT: 21ffa: nop.w -// CALLSITE1-NEXT: 21ffe: b.w #28674 +// CALLSITE1-NEXT: 21ffe: b.w 0x29004 <__CortexA8657417_21FFE> /// Expect no patch when doing a relocatable link ld -r. // CHECK-RELOCATABLE: 00000ffa : // CHECK-RELOCATABLE-NEXT: ffa: nop.w -// CHECK-RELOCATABLE-NEXT: ffe: b.w #-4 +// CHECK-RELOCATABLE-NEXT: ffe: b.w {{.+}} @ imm = #-4 .space 4088 .type target2, %function @@ -72,7 +72,7 @@ // CALLSITE2: 00022ffa : // CALLSITE2-NEXT: 22ffa: nop.w -// CALLSITE2-NEXT: 22ffe: bl #24582 +// CALLSITE2-NEXT: 22ffe: bl 0x29008 <__CortexA8657417_22FFE> .space 4088 .type target3, %function @@ -85,7 +85,7 @@ // CALLSITE3: 00023ffa : // CALLSITE3-NEXT: 23ffa: nop.w -// CALLSITE3-NEXT: 23ffe: beq.w #20490 +// CALLSITE3-NEXT: 23ffe: beq.w 0x2900c <__CortexA8657417_23FFE> .space 4082 .type target4, %function @@ -106,7 +106,7 @@ // CALLSITE4-NEXT: 24ff4: bx lr // CALLSITE4: 24ff8: 00 00 .short 0x0000 // CALLSITE4: 24ffa: nop.w -// CALLSITE4-NEXT: 24ffe: blx #16400 +// CALLSITE4-NEXT: 24ffe: blx 0x29010 <__CortexA8657417_24FFE> /// Separate sections for source and destination of branches to force /// a relocation. @@ -126,7 +126,7 @@ /// Target = 0x19014 __CortexA8657417_16FFE // CALLSITE5: 25ffa: nop.w -// CALLSITE5-NEXT: 25ffe: b.w #12306 +// CALLSITE5-NEXT: 25ffe: b.w 0x29014 <__CortexA8657417_25FFE> .section .text.2, "ax", %progbits .balign 2 @@ -144,7 +144,7 @@ /// Target = 0x19018 __CortexA8657417_17FFE // CALLSITE6: 26ffa: nop.w -// CALLSITE6-NEXT: 26ffe: bl #8214 +// CALLSITE6-NEXT: 26ffe: bl 0x29018 <__CortexA8657417_26FFE> .section .text.4, "ax", %progbits .global target7 @@ -160,7 +160,7 @@ bne.w target7 // CALLSITE7: 27ffa: nop.w -// CALLSITE7-NEXT: 27ffe: bne.w #4122 +// CALLSITE7-NEXT: 27ffe: bne.w 0x2901c <__CortexA8657417_27FFE> .section .text.6, "ax", %progbits .space 4082 @@ -184,28 +184,28 @@ // CALLSITE8-NEXT: 28ff4: bx lr // CALLSITE8: 28ff8: 00 00 .short 0x0000 // CALLSITE8: 28ffa: nop.w -// CALLSITE8-NEXT: 28ffe: blx #32 +// CALLSITE8-NEXT: 28ffe: blx 0x29020 <__CortexA8657417_28FFE> // CHECK-PATCHES: 00029004 <__CortexA8657417_21FFE>: -// CHECK-PATCHES-NEXT: 29004: b.w #-28686 +// CHECK-PATCHES-NEXT: 29004: b.w 0x21ffa // CHECK-PATCHES: 00029008 <__CortexA8657417_22FFE>: -// CHECK-PATCHES-NEXT: 29008: b.w #-24594 +// CHECK-PATCHES-NEXT: 29008: b.w 0x22ffa // CHECK-PATCHES: 0002900c <__CortexA8657417_23FFE>: -// CHECK-PATCHES-NEXT: 2900c: b.w #-20502 +// CHECK-PATCHES-NEXT: 2900c: b.w 0x23ffa // CHECK-PATCHES: 00029010 <__CortexA8657417_24FFE>: -// CHECK-PATCHES-NEXT: 29010: b #-16420 +// CHECK-PATCHES-NEXT: 29010: b 0x24ff4 // CHECK-PATCHES: 00029014 <__CortexA8657417_25FFE>: -// CHECK-PATCHES-NEXT: 29014: b.w #-16406 +// CHECK-PATCHES-NEXT: 29014: b.w 0x25002 // CHECK-PATCHES: 00029018 <__CortexA8657417_26FFE>: -// CHECK-PATCHES-NEXT: 29018: b.w #-12314 +// CHECK-PATCHES-NEXT: 29018: b.w 0x26002 // CHECK-PATCHES: 0002901c <__CortexA8657417_27FFE>: -// CHECK-PATCHES-NEXT: 2901c: b.w #-8222 +// CHECK-PATCHES-NEXT: 2901c: b.w 0x27002 // CHECK-PATCHES: 00029020 <__CortexA8657417_28FFE>: -// CHECK-PATCHES-NEXT: 29020: b #-52 +// CHECK-PATCHES-NEXT: 29020: b 0x28ff4 diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s --- a/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s +++ b/lld/test/ELF/arm-fix-cortex-a8-thunk-align.s @@ -28,7 +28,7 @@ // CHECK-NEXT: add r12, pc // CHECK-NEXT: bx r12 // CHECK: 00013004 <__CortexA8657417_11FFE>: -// CHECK-NEXT: 13004: b.w #-8196 +// CHECK-NEXT: 13004: b.w 0x11004 .section .text.02 /// Take us over thunk section spacing .space 16 * 1024 * 1024 diff --git a/lld/test/ELF/arm-fix-cortex-a8-thunk.s b/lld/test/ELF/arm-fix-cortex-a8-thunk.s --- a/lld/test/ELF/arm-fix-cortex-a8-thunk.s +++ b/lld/test/ELF/arm-fix-cortex-a8-thunk.s @@ -45,19 +45,19 @@ /// Expect erratum patch inserted here // CHECK: 00110ffa : // CHECK-NEXT: 110ffa: nop.w -// CHECK-NEXT: bl #2 +// CHECK-NEXT: bl 0x111004 <__CortexA8657417_110FFE> // CHECK: 00111004 <__CortexA8657417_110FFE>: -// CHECK-NEXT: 111004: b.w #-14 +// CHECK-NEXT: 111004: b.w 0x110ffa /// Expect range extension thunk here. // CHECK: 00111008 <__ThumbV7PILongThunk_early>: -// CHECK-NEXT: 111008: b.w #-1048582 +// CHECK-NEXT: 111008: b.w 0x11006 .section .text.04, "ax", %progbits /// The erratum patch will push this branch out of range, so another /// range extension thunk will be needed. beq.w early -// CHECK: 11100c: beq.w #-8 +// CHECK: 11100c: beq.w 0x111008 <__ThumbV7PILongThunk_early> .section .text.05, "ax", %progbits .arm diff --git a/lld/test/ELF/arm-force-pi-thunk.s b/lld/test/ELF/arm-force-pi-thunk.s --- a/lld/test/ELF/arm-force-pi-thunk.s +++ b/lld/test/ELF/arm-force-pi-thunk.s @@ -35,9 +35,9 @@ // CHECK-NEXT: <_start>: // CHECK-NEXT: 94: 70 47 bx lr // CHECK: : -// CHECK-NEXT: 96: 00 f0 03 f8 bl #6 -// CHECK-NEXT: 9a: 00 f0 07 f8 bl #14 -// CHECK-NEXT: 9e: d4 d4 bmi #-88 +// CHECK-NEXT: 96: 00 f0 03 f8 bl 0xa0 <__ThumbV7PILongThunk_high_target> +// CHECK-NEXT: 9a: 00 f0 07 f8 bl 0xac <__ThumbV7PILongThunk_high_target2> +// CHECK-NEXT: 9e: d4 d4 // CHECK: <__ThumbV7PILongThunk_high_target>: // CHECK-NEXT: a0: 4f f6 55 7c movw r12, #65365 // CHECK-NEXT: a4: c0 f2 ff 1c movt r12, #511 @@ -49,8 +49,8 @@ // CHECK-NEXT: b4: fc 44 add r12, pc // CHECK-NEXT: b6: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: b8: ff f7 f2 ff bl #-28 -// CHECK-NEXT: bc: ff f7 f6 ff bl #-20 +// CHECK-NEXT: b8: ff f7 f2 ff bl 0xa0 <__ThumbV7PILongThunk_high_target> +// CHECK-NEXT: bc: ff f7 f6 ff bl 0xac <__ThumbV7PILongThunk_high_target2> .section .text_high, "ax", %progbits @@ -72,8 +72,8 @@ // CHECK: Disassembly of section .text_high: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4 -// CHECK-NEXT: 2000004: 00 f0 06 f8 bl #12 +// CHECK-NEXT: 2000000: 00 f0 02 f8 bl 0x2000008 <__ThumbV7PILongThunk_low_target> +// CHECK-NEXT: 2000004: 00 f0 06 f8 bl 0x2000014 <__ThumbV7PILongThunk_low_target2> // CHECK: <__ThumbV7PILongThunk_low_target>: // CHECK-NEXT: 2000008: 40 f2 83 0c movw r12, #131 // CHECK-NEXT: 200000c: cf f6 00 6c movt r12, #65024 @@ -85,5 +85,5 @@ // CHECK-NEXT: 200001c: fc 44 add r12, pc // CHECK-NEXT: 200001e: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: 2000020: ff f7 f2 ff bl #-28 -// CHECK-NEXT: 2000024: ff f7 f6 ff bl #-20 +// CHECK-NEXT: 2000020: ff f7 f2 ff bl 0x2000008 <__ThumbV7PILongThunk_low_target> +// CHECK-NEXT: 2000024: ff f7 f6 ff bl 0x2000014 <__ThumbV7PILongThunk_low_target2> diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s --- a/lld/test/ELF/arm-gnu-ifunc-plt.s +++ b/lld/test/ELF/arm-gnu-ifunc-plt.s @@ -35,13 +35,13 @@ // DISASM: : // DISASM-NEXT: 201e0: bx lr // DISASM: <_start>: -// DISASM-NEXT: 201e4: bl #84 -// DISASM-NEXT: 201e8: bl #96 +// DISASM-NEXT: 201e4: bl 0x20240 +// DISASM-NEXT: 201e8: bl 0x20250 // DISASM: <$d.1>: // DISASM-NEXT: 201ec: 00 00 00 00 .word 0x00000000 // DISASM-NEXT: 201f0: 04 00 00 00 .word 0x00000004 -// DISASM: 201f4: bl #36 -// DISASM-NEXT: 201f8: bl #48 +// DISASM: 201f4: bl 0x20220 +// DISASM-NEXT: 201f8: bl 0x20230 // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .plt: // DISASM-EMPTY: diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s --- a/lld/test/ELF/arm-gnu-ifunc.s +++ b/lld/test/ELF/arm-gnu-ifunc.s @@ -118,8 +118,8 @@ // DISASM: : // DISASM-NEXT: 20108: bx lr // DISASM: <_start>: -// DISASM-NEXT: 2010c: bl #28 -// DISASM-NEXT: 20110: bl #40 +// DISASM-NEXT: 2010c: bl 0x20130 +// DISASM-NEXT: 20110: bl 0x20140 // 1 * 65536 + 244 = 0x100f4 __rel_iplt_start // DISASM-NEXT: 20114: movw r0, #244 // DISASM-NEXT: 20118: movt r0, #1 @@ -141,4 +141,3 @@ // DISASM-NEXT: 20148: ldr pc, [r12, #12]! // DISASM: <$d>: // DISASM-NEXT: 2014c: d4 d4 d4 d4 .word 0xd4d4d4d4 - diff --git a/lld/test/ELF/arm-long-thunk-converge.s b/lld/test/ELF/arm-long-thunk-converge.s --- a/lld/test/ELF/arm-long-thunk-converge.s +++ b/lld/test/ELF/arm-long-thunk-converge.s @@ -10,7 +10,7 @@ // CHECK1-NEXT: 4: 00 c2 40 e3 movt r12, #512 // CHECK1-NEXT: 8: 1c ff 2f e1 bx r12 // CHECK1: : -// CHECK1-NEXT: c: fb ff ff eb bl #-20 +// CHECK1-NEXT: c: fb ff ff eb bl 0x0 <__ARMv7ABSLongThunk_bar> .section .foo,"ax",%progbits,unique,1 foo: @@ -21,7 +21,7 @@ // CHECK2-NEXT: 2000004: 00 c0 40 e3 movt r12, #0 // CHECK2-NEXT: 2000008: 1c ff 2f e1 bx r12 // CHECK2: : -// CHECK2-NEXT: 200000c: fb ff ff eb bl #-20 <__ARMv7ABSLongThunk_foo> +// CHECK2-NEXT: 200000c: fb ff ff eb bl 0x2000000 <__ARMv7ABSLongThunk_foo> .section .bar,"ax",%progbits,unique,1 bar: diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s --- a/lld/test/ELF/arm-plt-reloc.s +++ b/lld/test/ELF/arm-plt-reloc.s @@ -28,9 +28,9 @@ // CHECK: : // CHECK-NEXT: 200bc: bx lr // CHECK: <_start>: -// CHECK-NEXT: 200c0: b #-20 -// CHECK-NEXT: 200c4: bl #-20 -// CHECK-NEXT: 200c8: beq #-20 +// CHECK-NEXT: 200c0: b 0x200b4 +// CHECK-NEXT: 200c4: bl 0x200b8 +// CHECK-NEXT: 200c8: beq 0x200bc // Expect PLT entries as symbols can be preempted // The .got.plt and .plt displacement is small so we can use small PLT entries. @@ -43,20 +43,17 @@ // DSO: : // DSO-NEXT: 1021c: bx lr // DSO: <_start>: -// S(0x10214) - P(0x10220) + A(-8) = 0x2c = 32 -// DSO-NEXT: 10220: b #40 -// S(0x10218) - P(0x10224) + A(-8) = 0x38 = 56 -// DSO-NEXT: 10224: bl #52 -// S(0x1021c) - P(0x10228) + A(-8) = 0x44 = 68 -// DSO-NEXT: 10228: beq #64 +// DSO-NEXT: 10220: b 0x10250 +// DSO-NEXT: 10224: bl 0x10260 +// DSO-NEXT: 10228: beq 0x10270 // DSO-EMPTY: // DSO-NEXT: Disassembly of section .plt: // DSO-EMPTY: // DSO-NEXT: <$a>: // DSO-NEXT: 10230: str lr, [sp, #-4]! -// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[2] +// (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2] // DSO-NEXT: 10234: add lr, pc, #0, #12 -// DSO-NEXT: 10238: add lr, lr, #32 +// DSO-NEXT: 10238: add lr, lr, #32, #20 // DSO-NEXT: 1023c: ldr pc, [lr, #164]! // DSO: <$d>: // DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 @@ -64,23 +61,23 @@ // DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 +// (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4 // DSO-NEXT: 10250: add r12, pc, #0, #12 -// DSO-NEXT: 10254: add r12, r12, #32 +// DSO-NEXT: 10254: add r12, r12, #32, #20 // DSO-NEXT: 10258: ldr pc, [r12, #140]! // DSO: <$d>: // DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 +// (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8 // DSO-NEXT: 10260: add r12, pc, #0, #12 -// DSO-NEXT: 10264: add r12, r12, #32 +// DSO-NEXT: 10264: add r12, r12, #32, #20 // DSO-NEXT: 10268: ldr pc, [r12, #128]! // DSO: <$d>: // DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec +// (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec // DSO-NEXT: 10270: add r12, pc, #0, #12 -// DSO-NEXT: 10274: add r12, r12, #32 +// DSO-NEXT: 10274: add r12, r12, #32, #20 // DSO-NEXT: 10278: ldr pc, [r12, #116]! // DSO: <$d>: // DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 @@ -126,9 +123,9 @@ // CHECKHIGH: : // CHECKHIGH-NEXT: 1008: bx lr // CHECKHIGH: <_start>: -// CHECKHIGH-NEXT: 100c: b #4108 <$a> -// CHECKHIGH-NEXT: 1010: bl #4120 <$a> -// CHECKHIGH-NEXT: 1014: beq #4132 <$a> +// CHECKHIGH-NEXT: 100c: b 0x2020 +// CHECKHIGH-NEXT: 1010: bl 0x2030 +// CHECKHIGH-NEXT: 1014: beq 0x2040 // CHECKHIGH-EMPTY: // CHECKHIGH-NEXT: Disassembly of section .plt: // CHECKHIGH-EMPTY: @@ -194,9 +191,9 @@ // CHECKLONG: : // CHECKLONG-NEXT: 1008: bx lr // CHECKLONG: <_start>: -// CHECKLONG-NEXT: 100c: b #4108 <$a> -// CHECKLONG-NEXT: 1010: bl #4120 <$a> -// CHECKLONG-NEXT: 1014: beq #4132 <$a> +// CHECKLONG-NEXT: 100c: b 0x2020 +// CHECKLONG-NEXT: 1010: bl 0x2030 +// CHECKLONG-NEXT: 1014: beq 0x2040 // CHECKLONG-EMPTY: // CHECKLONG-NEXT: Disassembly of section .plt: // CHECKLONG-EMPTY: @@ -263,9 +260,9 @@ // CHECKMIX: : // CHECKMIX-NEXT: 1008: bx lr // CHECKMIX: <_start>: -// CHECKMIX-NEXT: 100c: b #4108 <$a> -// CHECKMIX-NEXT: 1010: bl #4120 <$a> -// CHECKMIX-NEXT: 1014: beq #4132 <$a> +// CHECKMIX-NEXT: 100c: b 0x2020 +// CHECKMIX-NEXT: 1010: bl 0x2030 +// CHECKMIX-NEXT: 1014: beq 0x2040 // CHECKMIX-EMPTY: // CHECKMIX-NEXT: Disassembly of section .plt: // CHECKMIX-EMPTY: diff --git a/lld/test/ELF/arm-thumb-branch.s b/lld/test/ELF/arm-thumb-branch.s --- a/lld/test/ELF/arm-thumb-branch.s +++ b/lld/test/ELF/arm-thumb-branch.s @@ -47,15 +47,17 @@ // CHECK-NEXT: Disassembly of section .caller: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 10000: f0 f7 58 f8 bl #-65360 -// CHECK-NEXT: 10004: f0 f7 56 b8 b.w #-65364 -// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w #-65368 -// CHECK-NEXT: 1000c: 00 f0 0c f8 bl #24 -// CHECK-NEXT: 10010: 00 f0 0a b8 b.w #20 -// CHECK-NEXT: 10014: 40 f0 08 80 bne.w #16 -// CHECK-NEXT: 10018: ff f3 ff d7 bl #16777214 -// CHECK-NEXT: 1001c: ff f3 fd 97 b.w #16777210 -// CHECK-NEXT: 10020: 3f f3 ff af bgt.w #1048574 +// CHECK-NEXT: 10000: f0 f7 58 f8 bl 0xb4 +// CHECK-NEXT: 10004: f0 f7 56 b8 b.w 0xb4 +// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w 0xb4 +// CHECK-NEXT: 1000c: 00 f0 0c f8 bl 0x10028 +// CHECK-NEXT: 10010: 00 f0 0a b8 b.w 0x10028 +// CHECK-NEXT: 10014: 40 f0 08 80 bne.w 0x10028 +/// far_uncond = 0x101001b +// CHECK-NEXT: 10018: ff f3 ff d7 bl 0x101001a +// CHECK-NEXT: 1001c: ff f3 fd 97 b.w 0x101001a +/// far_cond = 0x110023 +// CHECK-NEXT: 10020: 3f f3 ff af bgt.w 0x110022 // CHECK-NEXT: 10024: 70 47 bx lr // CHECK-NEXT: 10026: // CHECK-EMPTY: diff --git a/lld/test/ELF/arm-thumb-condbranch-thunk.s b/lld/test/ELF/arm-thumb-condbranch-thunk.s --- a/lld/test/ELF/arm-thumb-condbranch-thunk.s +++ b/lld/test/ELF/arm-thumb-condbranch-thunk.s @@ -37,11 +37,11 @@ // CHECK1-EMPTY: // CHECK1-NEXT: : // CHECK1-NEXT: 80000: 70 47 bx lr -// CHECK1-NEXT: 80002: 7f f3 ff d7 bl #0xf7fffe +// CHECK1-NEXT: 80002: 7f f3 ff d7 bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc33> // CHECK1: <__Thumbv7ABSLongThunk_tfunc05>: -// CHECK1-NEXT: 80008: 7f f2 fa bf b.w #0x27fff4 +// CHECK1-NEXT: 80008: 7f f2 fa bf b.w 0x300000 // CHECK1: <__Thumbv7ABSLongThunk_tfunc00>: -// CHECK1-NEXT: 8000c: ff f7 f8 bf b.w #-0x10 +// CHECK1-NEXT: 8000c: ff f7 f8 bf b.w 0x80000 FUNCTION 01 // tfunc02 is within range of tfunc02 beq.w tfunc02 @@ -50,15 +50,15 @@ bne.w tfunc05 // CHECK2: : // CHECK2-NEXT: 100000: 70 47 bx lr -// CHECK2-NEXT: 100002: 3f f0 fd a7 beq.w #0x7fffa -// CHECK2-NEXT: 100006: 7f f4 ff a7 bne.w #-0x80002 <__Thumbv7ABSLongThunk_tfunc05> +// CHECK2-NEXT: 100002: 3f f0 fd a7 beq.w 0x180000 +// CHECK2-NEXT: 100006: 7f f4 ff a7 bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05> FUNCTION 02 // We can reach the Thunk Section created for bne.w tfunc05 bne.w tfunc05 beq.w tfunc00 // CHECK3: 180000: 70 47 bx lr -// CHECK3-NEXT: 180002: 40 f4 01 80 bne.w #-0xffffe <__Thumbv7ABSLongThunk_tfunc05> -// CHECK3-NEXT: 180006: 00 f4 01 80 beq.w #-0xffffe <__Thumbv7ABSLongThunk_tfunc00> +// CHECK3-NEXT: 180002: 40 f4 01 80 bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05> +// CHECK3-NEXT: 180006: 00 f4 01 80 beq.w 0x8000c <__Thumbv7ABSLongThunk_tfunc00> FUNCTION 03 FUNCTION 04 FUNCTION 05 @@ -67,13 +67,13 @@ FUNCTION 08 FUNCTION 09 // CHECK4: <__Thumbv7ABSLongThunk_tfunc03>: -// CHECK4-NEXT: 500004: ff f4 fc bf b.w #-0x300008 +// CHECK4-NEXT: 500004: ff f4 fc bf b.w 0x200000 FUNCTION 10 // We can't reach any Thunk Section, create a new one beq.w tfunc03 // CHECK5: : // CHECK5-NEXT: 580000: 70 47 bx lr -// CHECK5-NEXT: 580002: 3f f4 ff a7 beq.w #-0x80002 <__Thumbv7ABSLongThunk_tfunc03> +// CHECK5-NEXT: 580002: 3f f4 ff a7 beq.w 0x500004 <__Thumbv7ABSLongThunk_tfunc03> FUNCTION 11 FUNCTION 12 FUNCTION 13 @@ -96,13 +96,13 @@ FUNCTION 30 FUNCTION 31 // CHECK6: <__Thumbv7ABSLongThunk_tfunc33>: -// CHECK6-NEXT: 1000004: ff f0 fc bf b.w #0xffff8 +// CHECK6-NEXT: 1000004: ff f0 fc bf b.w 0x1100000 // CHECK6: <__Thumbv7ABSLongThunk_tfunc00>: -// CHECK6-NEXT: 1000008: 7f f4 fa 97 b.w #-0xf8000c +// CHECK6-NEXT: 1000008: 7f f4 fa 97 b.w 0x80000 FUNCTION 32 FUNCTION 33 // We should be able to reach an existing ThunkSection. b.w tfunc00 // CHECK7: : // CHECK7-NEXT: 1100000: 70 47 bx lr -// CHECK7-NEXT: 1100002: 00 f7 01 b8 b.w #-0xffffe <__Thumbv7ABSLongThunk_tfunc00> +// CHECK7-NEXT: 1100002: 00 f7 01 b8 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc00> diff --git a/lld/test/ELF/arm-thumb-interwork-abs.s b/lld/test/ELF/arm-thumb-interwork-abs.s --- a/lld/test/ELF/arm-thumb-interwork-abs.s +++ b/lld/test/ELF/arm-thumb-interwork-abs.s @@ -28,11 +28,11 @@ // WARN: branch and link relocation: R_ARM_THM_CALL to non STT_FUNC symbol: sym interworking not performed; consider using directive '.type sym, %function' to give symbol type STT_FUNC if interworking between ARM and Thumb is required // CHECK: 00021000 : -// CHECK-NEXT: 21000: b #-57352 -// CHECK-NEXT: 21004: bl #-57356 -// CHECK-NEXT: 21008: blx #-57360 +// CHECK-NEXT: 21000: b 0x13000 +// CHECK-NEXT: 21004: bl 0x13000 +// CHECK-NEXT: 21008: blx 0x13000 // CHECK: 0002100c : -// CHECK-NEXT: 2100c: b.w #-57360 -// CHECK-NEXT: 21010: bl #-57364 -// CHECK-NEXT: 21014: blx #-57364 +// CHECK-NEXT: 2100c: b.w 0x13000 +// CHECK-NEXT: 21010: bl 0x13000 +// CHECK-NEXT: 21014: blx 0x13004 diff --git a/lld/test/ELF/arm-thumb-interwork-ifunc.s b/lld/test/ELF/arm-thumb-interwork-ifunc.s --- a/lld/test/ELF/arm-thumb-interwork-ifunc.s +++ b/lld/test/ELF/arm-thumb-interwork-ifunc.s @@ -42,13 +42,13 @@ bl foo // CHECK: 00021004 <_start>: -// CHECK-NEXT: b #36 <$a> -// CHECK-NEXT: bl #32 <$a> +// CHECK-NEXT: b 0x21030 +// CHECK-NEXT: bl 0x21030 // CHECK: 0002100c : -// CHECK-NEXT: b.w #8 -// CHECK-NEXT: b.w #4 -// CHECK-NEXT: blx #24 +// CHECK-NEXT: b.w 0x21018 <__Thumbv7ABSLongThunk_foo> +// CHECK-NEXT: b.w 0x21018 <__Thumbv7ABSLongThunk_foo> +// CHECK-NEXT: blx 0x21030 // CHECK: 00021018 <__Thumbv7ABSLongThunk_foo>: // CHECK-NEXT: movw r12, #4144 diff --git a/lld/test/ELF/arm-thumb-interwork-notfunc.s b/lld/test/ELF/arm-thumb-interwork-notfunc.s --- a/lld/test/ELF/arm-thumb-interwork-notfunc.s +++ b/lld/test/ELF/arm-thumb-interwork-notfunc.s @@ -95,47 +95,47 @@ blx thumb_func_with_explicit_notype // CHECK: 00021008 <_start>: -// CHECK-NEXT: 21008: b #-16 -// CHECK-NEXT: 2100c: b #-20 -// CHECK-NEXT: 21010: b #-24 -// CHECK-NEXT: 21014: b #-24 -// CHECK-NEXT: 21018: b #-28 -// CHECK-NEXT: 2101c: b #-32 -// CHECK-NEXT: 21020: bl #-40 -// CHECK-NEXT: 21024: bl #-44 -// CHECK-NEXT: 21028: bl #-48 -// CHECK-NEXT: 2102c: bl #-48 -// CHECK-NEXT: 21030: bl #-52 -// CHECK-NEXT: 21034: bl #-56 -// CHECK-NEXT: 21038: blx #-64 -// CHECK-NEXT: 2103c: blx #-68 -// CHECK-NEXT: 21040: blx #-72 -// CHECK-NEXT: 21044: blx #-72 -// CHECK-NEXT: 21048: blx #-76 -// CHECK-NEXT: 2104c: blx #-80 +// CHECK-NEXT: 21008: b 0x21000 +// CHECK-NEXT: 2100c: b 0x21000 +// CHECK-NEXT: 21010: b 0x21000 +// CHECK-NEXT: 21014: b 0x21004 +// CHECK-NEXT: 21018: b 0x21004 +// CHECK-NEXT: 2101c: b 0x21004 +// CHECK-NEXT: 21020: bl 0x21000 +// CHECK-NEXT: 21024: bl 0x21000 +// CHECK-NEXT: 21028: bl 0x21000 +// CHECK-NEXT: 2102c: bl 0x21004 +// CHECK-NEXT: 21030: bl 0x21004 +// CHECK-NEXT: 21034: bl 0x21004 +// CHECK-NEXT: 21038: blx 0x21000 +// CHECK-NEXT: 2103c: blx 0x21000 +// CHECK-NEXT: 21040: blx 0x21000 +// CHECK-NEXT: 21044: blx 0x21004 +// CHECK-NEXT: 21048: blx 0x21004 +// CHECK-NEXT: 2104c: blx 0x21004 // CHECK: 00021050 : -// CHECK-NEXT: 21050: b.w #-84 -// CHECK-NEXT: 21054: b.w #-88 -// CHECK-NEXT: 21058: b.w #-92 -// CHECK-NEXT: 2105c: b.w #-92 -// CHECK-NEXT: 21060: b.w #-96 -// CHECK-NEXT: 21064: b.w #-100 -// CHECK-NEXT: 21068: beq.w #-108 -// CHECK-NEXT: 2106c: beq.w #-112 -// CHECK-NEXT: 21070: beq.w #-116 -// CHECK-NEXT: 21074: beq.w #-116 -// CHECK-NEXT: 21078: beq.w #-120 -// CHECK-NEXT: 2107c: beq.w #-124 -// CHECK-NEXT: 21080: bl #-132 -// CHECK-NEXT: 21084: bl #-136 -// CHECK-NEXT: 21088: bl #-140 -// CHECK-NEXT: 2108c: bl #-140 -// CHECK-NEXT: 21090: bl #-144 -// CHECK-NEXT: 21094: bl #-148 -// CHECK-NEXT: 21098: blx #-156 -// CHECK-NEXT: 2109c: blx #-160 -// CHECK-NEXT: 210a0: blx #-164 -// CHECK-NEXT: 210a4: blx #-164 -// CHECK-NEXT: 210a8: blx #-168 -// CHECK-NEXT: 210ac: blx #-172 +// CHECK-NEXT: 21050: b.w 0x21000 +// CHECK-NEXT: 21054: b.w 0x21000 +// CHECK-NEXT: 21058: b.w 0x21000 +// CHECK-NEXT: 2105c: b.w 0x21004 +// CHECK-NEXT: 21060: b.w 0x21004 +// CHECK-NEXT: 21064: b.w 0x21004 +// CHECK-NEXT: 21068: beq.w 0x21000 +// CHECK-NEXT: 2106c: beq.w 0x21000 +// CHECK-NEXT: 21070: beq.w 0x21000 +// CHECK-NEXT: 21074: beq.w 0x21004 +// CHECK-NEXT: 21078: beq.w 0x21004 +// CHECK-NEXT: 2107c: beq.w 0x21004 +// CHECK-NEXT: 21080: bl 0x21000 +// CHECK-NEXT: 21084: bl 0x21000 +// CHECK-NEXT: 21088: bl 0x21000 +// CHECK-NEXT: 2108c: bl 0x21004 +// CHECK-NEXT: 21090: bl 0x21004 +// CHECK-NEXT: 21094: bl 0x21004 +// CHECK-NEXT: 21098: blx 0x21000 +// CHECK-NEXT: 2109c: blx 0x21000 +// CHECK-NEXT: 210a0: blx 0x21000 +// CHECK-NEXT: 210a4: blx 0x21004 +// CHECK-NEXT: 210a8: blx 0x21004 +// CHECK-NEXT: 210ac: blx 0x21004 diff --git a/lld/test/ELF/arm-thumb-interwork-shared.s b/lld/test/ELF/arm-thumb-interwork-shared.s --- a/lld/test/ELF/arm-thumb-interwork-shared.s +++ b/lld/test/ELF/arm-thumb-interwork-shared.s @@ -19,10 +19,10 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 101e0: b.w #12 <__ThumbV7PILongThunk_elsewhere> -// CHECK-NEXT: b.w #20 <__ThumbV7PILongThunk_weakref> -// CHECK-NEXT: blx #68 -// CHECK-NEXT: blx #80 +// CHECK-NEXT: 101e0: b.w 0x101f0 <__ThumbV7PILongThunk_elsewhere> +// CHECK-NEXT: b.w 0x101fc <__ThumbV7PILongThunk_weakref> +// CHECK-NEXT: blx 0x10230 +// CHECK-NEXT: blx 0x10240 // CHECK: <__ThumbV7PILongThunk_elsewhere>: // CHECK-NEXT: 101f0: movw r12, #52 // CHECK-NEXT: movt r12, #0 diff --git a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s --- a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s +++ b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s @@ -27,9 +27,9 @@ bx lr // CHECK: <_start>: -// CHECK-NEXT: 21000: 03 00 00 ea b #12 <__ARMv5ABSLongThunk_thumb_func> -// CHECK-NEXT: 21004: 01 00 00 fa blx #4 -// CHECK-NEXT: 21008: 00 00 00 fa blx #0 +// CHECK-NEXT: 21000: 03 00 00 ea b 0x21014 <__ARMv5ABSLongThunk_thumb_func> +// CHECK-NEXT: 21004: 01 00 00 fa blx 0x21010 +// CHECK-NEXT: 21008: 00 00 00 fa blx 0x21010 // CHECK-NEXT: 2100c: 1e ff 2f e1 bx lr // CHECK: : @@ -41,9 +41,9 @@ // CHECK-NEXT: 21018: 11 10 02 00 .word 0x00021011 // CHECK-PI: <_start>: -// CHECK-PI-NEXT: 11000: 03 00 00 ea b #12 <__ARMV5PILongThunk_thumb_func> -// CHECK-PI-NEXT: 11004: 01 00 00 fa blx #4 -// CHECK-PI-NEXT: 11008: 00 00 00 fa blx #0 +// CHECK-PI-NEXT: 11000: 03 00 00 ea b 0x11014 <__ARMV5PILongThunk_thumb_func> +// CHECK-PI-NEXT: 11004: 01 00 00 fa blx 0x11010 +// CHECK-PI-NEXT: 11008: 00 00 00 fa blx 0x11010 // CHECK-PI-NEXT: 1100c: 1e ff 2f e1 bx lr // CHECK-PI: : diff --git a/lld/test/ELF/arm-thumb-interwork-thunk.s b/lld/test/ELF/arm-thumb-interwork-thunk.s --- a/lld/test/ELF/arm-thumb-interwork-thunk.s +++ b/lld/test/ELF/arm-thumb-interwork-thunk.s @@ -80,15 +80,15 @@ // CHECK-ARM-ABS-ARM: Disassembly of section .arm_caller: // CHECK-ARM-ABS-ARM-EMPTY: // CHECK-ARM-ABS-ARM-NEXT: : -// CHECK-ARM-ABS-ARM-NEXT: 1300: 3e ff ff fa blx #-776 -// CHECK-ARM-ABS-ARM-NEXT: 1304: 3d ff ff fa blx #-780 -// CHECK-ARM-ABS-ARM-NEXT: 1308: 06 00 00 ea b #24 <__ARMv7ABSLongThunk_thumb_callee1> -// CHECK-ARM-ABS-ARM-NEXT: 130c: 05 00 00 ea b #20 <__ARMv7ABSLongThunk_thumb_callee1> -// CHECK-ARM-ABS-ARM-NEXT: 1310: 07 00 00 ea b #28 <__ARMv7ABSLongThunk_thumb_callee2> -// CHECK-ARM-ABS-ARM-NEXT: 1314: 09 00 00 ea b #36 <__ARMv7ABSLongThunk_thumb_callee3> -// CHECK-ARM-ABS-ARM-NEXT: 1318: 78 ff ff ea b #-544 -// CHECK-ARM-ABS-ARM-NEXT: 131c: b7 00 00 0a beq #732 -// CHECK-ARM-ABS-ARM-NEXT: 1320: b7 00 00 1a bne #732 +// CHECK-ARM-ABS-ARM-NEXT: 1300: 3e ff ff fa blx 0x1000 +// CHECK-ARM-ABS-ARM-NEXT: 1304: 3d ff ff fa blx 0x1000 +// CHECK-ARM-ABS-ARM-NEXT: 1308: 06 00 00 ea b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1> +// CHECK-ARM-ABS-ARM-NEXT: 130c: 05 00 00 ea b 0x1328 <__ARMv7ABSLongThunk_thumb_callee1> +// CHECK-ARM-ABS-ARM-NEXT: 1310: 07 00 00 ea b 0x1334 <__ARMv7ABSLongThunk_thumb_callee2> +// CHECK-ARM-ABS-ARM-NEXT: 1314: 09 00 00 ea b 0x1340 <__ARMv7ABSLongThunk_thumb_callee3> +// CHECK-ARM-ABS-ARM-NEXT: 1318: 78 ff ff ea b 0x1100 +// CHECK-ARM-ABS-ARM-NEXT: 131c: b7 00 00 0a beq 0x1600 +// CHECK-ARM-ABS-ARM-NEXT: 1320: b7 00 00 1a bne 0x1604 // CHECK-ARM-ABS-ARM-NEXT: 1324: 1e ff 2f e1 bx lr // CHECK-ARM-ABS-ARM: <__ARMv7ABSLongThunk_thumb_callee1>: // 0x1001 = thumb_callee1 @@ -109,15 +109,15 @@ // CHECK-PI-ARM: Disassembly of section .arm_caller: // CHECK-PI-ARM-EMPTY: // CHECK-PI-ARM-NEXT: : -// CHECK-PI-ARM-NEXT: 1300: 3e ff ff fa blx #-776 -// CHECK-PI-ARM-NEXT: 1304: 3d ff ff fa blx #-780 -// CHECK-PI-ARM-NEXT: 1308: 06 00 00 ea b #24 <__ARMV7PILongThunk_thumb_callee1> -// CHECK-PI-ARM-NEXT: 130c: 05 00 00 ea b #20 <__ARMV7PILongThunk_thumb_callee1> -// CHECK-PI-ARM-NEXT: 1310: 08 00 00 ea b #32 <__ARMV7PILongThunk_thumb_callee2> -// CHECK-PI-ARM-NEXT: 1314: 0b 00 00 ea b #44 <__ARMV7PILongThunk_thumb_callee3> -// CHECK-PI-ARM-NEXT: 1318: 78 ff ff ea b #-544 -// CHECK-PI-ARM-NEXT: 131c: b7 00 00 0a beq #732 -// CHECK-PI-ARM-NEXT: 1320: b7 00 00 1a bne #732 +// CHECK-PI-ARM-NEXT: 1300: 3e ff ff fa blx 0x1000 +// CHECK-PI-ARM-NEXT: 1304: 3d ff ff fa blx 0x1000 +// CHECK-PI-ARM-NEXT: 1308: 06 00 00 ea b 0x1328 <__ARMV7PILongThunk_thumb_callee1> +// CHECK-PI-ARM-NEXT: 130c: 05 00 00 ea b 0x1328 <__ARMV7PILongThunk_thumb_callee1> +// CHECK-PI-ARM-NEXT: 1310: 08 00 00 ea b 0x1338 <__ARMV7PILongThunk_thumb_callee2> +// CHECK-PI-ARM-NEXT: 1314: 0b 00 00 ea b 0x1348 <__ARMV7PILongThunk_thumb_callee3> +// CHECK-PI-ARM-NEXT: 1318: 78 ff ff ea b 0x1100 +// CHECK-PI-ARM-NEXT: 131c: b7 00 00 0a beq 0x1600 +// CHECK-PI-ARM-NEXT: 1320: b7 00 00 1a bne 0x1604 // CHECK-PI-ARM-NEXT: 1324: 1e ff 2f e1 bx lr // CHECK-PI-ARM: <__ARMV7PILongThunk_thumb_callee1>: // 0x1330 + 8 - 0x337 = 0x1001 = thumb_callee1 @@ -188,14 +188,14 @@ // CHECK-ABS-THUMB: Disassembly of section .thumb_caller: // CHECK-ABS-THUMB-EMPTY: // CHECK-ABS-THUMB-NEXT: : -// CHECK-ABS-THUMB-NEXT: 1400: ff f7 7e ee blx #-772 -// CHECK-ABS-THUMB-NEXT: 1404: ff f7 7c ee blx #-776 -// CHECK-ABS-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__Thumbv7ABSLongThunk_arm_callee1> -// CHECK-ABS-THUMB-NEXT: 140c: 00 f0 0d b8 b.w #26 <__Thumbv7ABSLongThunk_arm_callee2> -// CHECK-ABS-THUMB-NEXT: 1410: 00 f0 10 b8 b.w #32 <__Thumbv7ABSLongThunk_arm_callee3> -// CHECK-ABS-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__Thumbv7ABSLongThunk_arm_callee1> -// CHECK-ABS-THUMB-NEXT: 1418: 00 f0 07 80 beq.w #14 <__Thumbv7ABSLongThunk_arm_callee2> -// CHECK-ABS-THUMB-NEXT: 141c: 40 f0 0a 80 bne.w #20 <__Thumbv7ABSLongThunk_arm_callee3> +// CHECK-ABS-THUMB-NEXT: 1400: ff f7 7e ee blx 0x1100 +// CHECK-ABS-THUMB-NEXT: 1404: ff f7 7c ee blx 0x1100 +// CHECK-ABS-THUMB-NEXT: 1408: 00 f0 0a b8 b.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1> +// CHECK-ABS-THUMB-NEXT: 140c: 00 f0 0d b8 b.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2> +// CHECK-ABS-THUMB-NEXT: 1410: 00 f0 10 b8 b.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3> +// CHECK-ABS-THUMB-NEXT: 1414: 00 f0 04 80 beq.w 0x1420 <__Thumbv7ABSLongThunk_arm_callee1> +// CHECK-ABS-THUMB-NEXT: 1418: 00 f0 07 80 beq.w 0x142a <__Thumbv7ABSLongThunk_arm_callee2> +// CHECK-ABS-THUMB-NEXT: 141c: 40 f0 0a 80 bne.w 0x1434 <__Thumbv7ABSLongThunk_arm_callee3> // CHECK-ABS-THUMB: <__Thumbv7ABSLongThunk_arm_callee1>: // 0x1100 = arm_callee1 // CHECK-ABS-THUMB-NEXT: 1420: 41 f2 00 1c movw r12, #4352 @@ -215,14 +215,14 @@ // CHECK-PI-THUMB: Disassembly of section .thumb_caller: // CHECK-PI-THUMB-EMPTY: // CHECK-PI-THUMB-NEXT: : -// CHECK-PI-THUMB-NEXT: 1400: ff f7 7e ee blx #-772 -// CHECK-PI-THUMB-NEXT: 1404: ff f7 7c ee blx #-776 -// CHECK-PI-THUMB-NEXT: 1408: 00 f0 0a b8 b.w #20 <__ThumbV7PILongThunk_arm_callee1> -// CHECK-PI-THUMB-NEXT: 140c: 00 f0 0e b8 b.w #28 <__ThumbV7PILongThunk_arm_callee2> -// CHECK-PI-THUMB-NEXT: 1410: 00 f0 12 b8 b.w #36 <__ThumbV7PILongThunk_arm_callee3> -// CHECK-PI-THUMB-NEXT: 1414: 00 f0 04 80 beq.w #8 <__ThumbV7PILongThunk_arm_callee1> -// CHECK-PI-THUMB-NEXT: 1418: 00 f0 08 80 beq.w #16 <__ThumbV7PILongThunk_arm_callee2> -// CHECK-PI-THUMB-NEXT: 141c: 40 f0 0c 80 bne.w #24 <__ThumbV7PILongThunk_arm_callee3> +// CHECK-PI-THUMB-NEXT: 1400: ff f7 7e ee blx 0x1100 +// CHECK-PI-THUMB-NEXT: 1404: ff f7 7c ee blx 0x1100 +// CHECK-PI-THUMB-NEXT: 1408: 00 f0 0a b8 b.w 0x1420 <__ThumbV7PILongThunk_arm_callee1> +// CHECK-PI-THUMB-NEXT: 140c: 00 f0 0e b8 b.w 0x142c <__ThumbV7PILongThunk_arm_callee2> +// CHECK-PI-THUMB-NEXT: 1410: 00 f0 12 b8 b.w 0x1438 <__ThumbV7PILongThunk_arm_callee3> +// CHECK-PI-THUMB-NEXT: 1414: 00 f0 04 80 beq.w 0x1420 <__ThumbV7PILongThunk_arm_callee1> +// CHECK-PI-THUMB-NEXT: 1418: 00 f0 08 80 beq.w 0x142c <__ThumbV7PILongThunk_arm_callee2> +// CHECK-PI-THUMB-NEXT: 141c: 40 f0 0c 80 bne.w 0x1438 <__ThumbV7PILongThunk_arm_callee3> // CHECK-PI-THUMB: <__ThumbV7PILongThunk_arm_callee1>: // 0x1428 + 4 - 0x32c = 0x1100 = arm_callee1 // CHECK-PI-THUMB-NEXT: 1420: 4f f6 d4 4c movw r12, #64724 diff --git a/lld/test/ELF/arm-thumb-mix-range-thunk-os.s b/lld/test/ELF/arm-thumb-mix-range-thunk-os.s --- a/lld/test/ELF/arm-thumb-mix-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-mix-range-thunk-os.s @@ -62,12 +62,12 @@ bne afunc32 // CHECK1: : // CHECK1-NEXT: 100000: 1e ff 2f e1 bx lr -// CHECK1-NEXT: 100004: fd ff 7b fa blx #32505844 -// CHECK1-NEXT: 100008: fd ff 3b ea b #15728628 -// CHECK1-NEXT: 10000c: fc ff 3b 0a beq #15728624 -// CHECK1-NEXT: 100010: fa ff 7f eb bl #33554408 -// CHECK1-NEXT: 100014: f9 ff 7f ea b #33554404 -// CHECK1-NEXT: 100018: f8 ff 7f 1a bne #33554400 +// CHECK1-NEXT: 100004: fd ff 7b fa blx 0x2000000 +// CHECK1-NEXT: 100008: fd ff 3b ea b 0x1000004 <__ARMv7ABSLongThunk_tfunc31> +// CHECK1-NEXT: 10000c: fc ff 3b 0a beq 0x1000004 <__ARMv7ABSLongThunk_tfunc31> +// CHECK1-NEXT: 100010: fa ff 7f eb bl 0x2100000 +// CHECK1-NEXT: 100014: f9 ff 7f ea b 0x2100000 +// CHECK1-NEXT: 100018: f8 ff 7f 1a bne 0x2100000 THUMBFUNCTION 01 // Expect Thumb bl to be in range (can use blx to change state) bl afunc14 @@ -75,8 +75,8 @@ b.w afunc14 // CHECK2: : // CHECK2-NEXT: 200000: 70 47 bx lr -// CHECK2-NEXT: 200002: ff f0 fe c7 blx #13631484 -// CHECK2-NEXT: 200006: 00 f2 03 90 b.w #14680070 <__Thumbv7ABSLongThunk_afunc14> +// CHECK2-NEXT: 200002: ff f0 fe c7 blx 0xf00000 +// CHECK2-NEXT: 200006: 00 f2 03 90 b.w 0x1000010 <__Thumbv7ABSLongThunk_afunc14> ARMFUNCTION 02 THUMBFUNCTION 03 @@ -127,12 +127,12 @@ bl afunc00 // CHECK6: : // CHECK6-NEXT: 2200000: 70 47 bx lr -// CHECK6-NEXT: 2200002: ff f4 ff ff bl #-3145730 +// CHECK6-NEXT: 2200002: ff f4 ff ff bl 0x1f00004 <__Thumbv7ABSLongThunk_afunc00> ARMFUNCTION 34 // Out of range, can reach earlier Thunk Section // CHECK7: : // CHECK7-NEXT: 2300000: 1e ff 2f e1 bx lr -// CHECK7-NEXT: 2300004: fe ff ef fa blx #-4194312 <__Thumbv7ABSLongThunk_afunc00 +// CHECK7-NEXT: 2300004: fe ff ef fa blx 0x1f00004 <__Thumbv7ABSLongThunk_afunc00> bl afunc00 THUMBFUNCTION 35 ARMFUNCTION 36 @@ -161,7 +161,7 @@ // CHECK9-NEXT: 3300008: c0 f2 30 2c movt r12, #560 // CHECK9-NEXT: 330000c: 60 47 bx r12 // CHECK9: <__Thumbv7ABSLongThunk_tfunc35>: -// CHECK9-NEXT: 330000e: ff f4 f7 97 b.w #-15728658 +// CHECK9-NEXT: 330000e: ff f4 f7 97 b.w 0x2400000 THUMBFUNCTION 51 ARMFUNCTION 52 THUMBFUNCTION 53 @@ -180,14 +180,14 @@ bl afunc34 b tfunc35 // CHECK10: : -// CHECK10-NEXT: 4100000: 1e ff 2f e1 bx lr -// CHECK10-NEXT: 4100004: fd ff 87 eb bl #-31457292 -// CHECK10-NEXT: 4100008: fd ff b3 ea b #-19922956 <__ARMv7ABSLongThunk_tfunc35> +// CHECK10-NEXT: 4100000: 1e ff 2f e1 bx lr +// CHECK10-NEXT: 4100004: fd ff 87 eb bl 0x2300000 +// CHECK10-NEXT: 4100008: fd ff b3 ea b 0x2e00004 <__ARMv7ABSLongThunk_tfunc35> THUMBFUNCTION 65 // afunc34 and tfunc35 are both out of range bl afunc34 bl tfunc35 // CHECK11: : // CHECK11: 4200000: 70 47 bx lr -// CHECK11-NEXT: 4200002: ff f4 ff d7 bl #-15728642 -// CHECK11-NEXT: 4200006: 00 f5 02 d0 bl #-15728636 +// CHECK11-NEXT: 4200002: ff f4 ff d7 bl 0x3300004 <__Thumbv7ABSLongThunk_afunc34> +// CHECK11-NEXT: 4200006: 00 f5 02 d0 bl 0x330000e <__Thumbv7ABSLongThunk_tfunc35> diff --git a/lld/test/ELF/arm-thumb-narrow-branch-check.s b/lld/test/ELF/arm-thumb-narrow-branch-check.s --- a/lld/test/ELF/arm-thumb-narrow-branch-check.s +++ b/lld/test/ELF/arm-thumb-narrow-branch-check.s @@ -57,14 +57,12 @@ // CHECK-NEXT: Disassembly of section .caller: // CHECK-EMPTY: // CHECK-NEXT: : -// 1004 - 0x800 (2048) + 4 = 0x808 = callee_low_far -// CHECK-NEXT: 1004: 00 e4 b #-2048 -// 1006 - 0xa (10) + 4 = 0x1000 = callee_low -// CHECK-NEXT: 1006: fb e7 b #-10 -// 1008 + 4 + 4 = 0x1010 = callee_high -// CHECK-NEXT: 1008: 02 e0 b #4 -// 100a + 0x7fe (2046) + 4 = 0x180c = callee_high_far -// CHECK-NEXT: 100a: ff e3 b #2046 +/// callee_low_far = 0x809 +// CHECK-NEXT: 1004: 00 e4 b 0x808 +// CHECK-NEXT: 1006: fb e7 b 0x1000 +// CHECK-NEXT: 1008: 02 e0 b 0x1010 +/// callee_high_far = 0x180d +// CHECK-NEXT: 100a: ff e3 b 0x180c // CHECK-NEXT: 100c: 70 47 bx lr // CHECK-NEXT: 100e: 00 bf nop // CHECK-EMPTY: @@ -76,5 +74,5 @@ // CHECK-NEXT: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 1014: ff f7 f6 ff bl #-20 +// CHECK-NEXT: 1014: ff f7 f6 ff bl 0x1004 // CHECK-NEXT: 1018: 70 47 bx lr diff --git a/lld/test/ELF/arm-thumb-no-undefined-thunk.s b/lld/test/ELF/arm-thumb-no-undefined-thunk.s --- a/lld/test/ELF/arm-thumb-no-undefined-thunk.s +++ b/lld/test/ELF/arm-thumb-no-undefined-thunk.s @@ -19,7 +19,7 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// 0x110b8 = next instruction -// CHECK: 200b4: {{.*}} bl #0 -// CHECK-NEXT: 200b8: {{.*}} b.w #0 <_start+0x8> -// CHECK-NEXT: 200bc: {{.*}} b.w #0 <_start+0xc> +// 0x200b8 = next instruction +// CHECK: 200b4: {{.*}} bl 0x200b8 <_start+0x4> @ imm = #0 +// CHECK-NEXT: 200b8: {{.*}} b.w 0x200bc <_start+0x8> @ imm = #0 +// CHECK-NEXT: 200bc: {{.*}} b.w 0x200c0 <_start+0xc> @ imm = #0 diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s --- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s @@ -38,13 +38,13 @@ // CHECK1: Disassembly of section .text: // CHECK1-EMPTY: // CHECK1-NEXT: : -// CHECK1-NEXT: 2000000: 00 f0 00 d8 bl #8388608 -// CHECK1-NEXT: 2000004: 00 f0 04 d8 bl #8388616 +// CHECK1-NEXT: 2000000: 00 f0 00 d8 bl 0x2800004 <__ThumbV7PILongThunk_elsewhere> +// CHECK1-NEXT: 2000004: 00 f0 04 d8 bl 0x2800010 <__ThumbV7PILongThunk_preemptible> // CHECK1-NEXT: 2000008: 70 47 bx lr // CHECK1: : -// CHECK1-NEXT: 200000a: 00 f0 07 d8 bl #8388622 -// CHECK1-NEXT: 200000e: 00 f0 0b d8 bl #8388630 -// CHECK1-NEXT: 2000012: 00 f0 09 d8 bl #8388626 +// CHECK1-NEXT: 200000a: 00 f0 07 d8 bl 0x280001c <__ThumbV7PILongThunk_far_preemptible> +// CHECK1-NEXT: 200000e: 00 f0 0b d8 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible> +// CHECK1-NEXT: 2000012: 00 f0 09 d8 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible> // CHECK1-NEXT: 2000016: 70 47 bx lr .section .text.2, "ax", %progbits @@ -83,7 +83,7 @@ bl elsewhere // CHECK3: : -// CHECK3: 4000000: 00 f0 16 e8 blx #44 +// CHECK3: 4000000: 00 f0 16 e8 blx 0x4000030 // CHECK4: Disassembly of section .plt: // CHECK4-EMPTY: diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s --- a/lld/test/ELF/arm-thumb-plt-reloc.s +++ b/lld/test/ELF/arm-thumb-plt-reloc.s @@ -32,12 +32,9 @@ // CHECK-NEXT: 200b8: 70 47 bx lr // CHECK-NEXT: 200ba: d4 d4 // CHECK: <_start>: -// . + 4 -12 = 0x200b4 = func1 -// CHECK-NEXT: 200bc: ff f7 fa ff bl #-12 -// . + 4 -14 = 0x200b6 = func2 -// CHECK-NEXT: 200c0: ff f7 f9 ff bl #-14 -// . + 4 -16 = 0x200b8 = func3 -// CHECK-NEXT: 200c4: ff f7 f8 ff bl #-16 +// CHECK-NEXT: 200bc: ff f7 fa ff bl 0x200b4 +// CHECK-NEXT: 200c0: ff f7 f9 ff bl 0x200b6 +// CHECK-NEXT: 200c4: ff f7 f8 ff bl 0x200b8 // Expect PLT entries as symbols can be preempted // .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble @@ -50,21 +47,21 @@ // DSO-NEXT: 10216: 70 47 bx lr // DSO: : // DSO-NEXT: 10218: 70 47 bx lr -// DSO-NEXT: 1021a: d4 d4 bmi #-88 +// DSO-NEXT: 1021a: d4 d4 // DSO: <_start>: -// . + 48 + 4 = 0x10250 = PLT func1 -// DSO-NEXT: 1021c: 00 f0 18 e8 blx #48 -// . + 60 + 4 = 0x10260 = PLT func2 -// DSO-NEXT: 10220: 00 f0 1e e8 blx #60 -// . + 72 + 4 = 0x10270 = PLT func3 -// DSO-NEXT: 10224: 00 f0 24 e8 blx #72 +// 0x10250 = PLT func1 +// DSO-NEXT: 1021c: 00 f0 18 e8 blx 0x10250 +// 0x10260 = PLT func2 +// DSO-NEXT: 10220: 00 f0 1e e8 blx 0x10260 +// 0x10270 = PLT func3 +// DSO-NEXT: 10224: 00 f0 24 e8 blx 0x10270 // DSO: Disassembly of section .plt: // DSO-EMPTY: // DSO-NEXT: <$a>: // DSO-NEXT: 10230: 04 e0 2d e5 str lr, [sp, #-4]! -// (0x10234 + 8) + (0 RoR 12) + 8192 + 164 = 0x32e0 = .got.plt[3] +// (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2] // DSO-NEXT: 10234: 00 e6 8f e2 add lr, pc, #0, #12 -// DSO-NEXT: 10238: 20 ea 8e e2 add lr, lr, #32 +// DSO-NEXT: 10238: 20 ea 8e e2 add lr, lr, #32, #20 // DSO-NEXT: 1023c: a4 f0 be e5 ldr pc, [lr, #164]! // DSO: <$d>: @@ -73,23 +70,23 @@ // DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10250 + 8) + (0 RoR 12) + 8192 + 140 = 0x32e4 +// (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4 // DSO-NEXT: 10250: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 10254: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10254: 20 ca 8c e2 add r12, r12, #32, #20 // DSO-NEXT: 10258: 8c f0 bc e5 ldr pc, [r12, #140]! // DSO: <$d>: // DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10260 + 8) + (0 RoR 12) + 8192 + 128 = 0x32e8 +// (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8 // DSO-NEXT: 10260: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 10264: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10264: 20 ca 8c e2 add r12, r12, #32, #20 // DSO-NEXT: 10268: 80 f0 bc e5 ldr pc, [r12, #128]! // DSO: <$d>: // DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO: <$a>: -// (0x10270 + 8) + (0 RoR 12) + 8192 + 116 = 0x32ec +// (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec // DSO-NEXT: 10270: 00 c6 8f e2 add r12, pc, #0, #12 -// DSO-NEXT: 10274: 20 ca 8c e2 add r12, r12, #32 +// DSO-NEXT: 10274: 20 ca 8c e2 add r12, r12, #32, #20 // DSO-NEXT: 10278: 74 f0 bc e5 ldr pc, [r12, #116]! // DSO: <$d>: // DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thumb-range-thunk-os.s b/lld/test/ELF/arm-thumb-range-thunk-os.s --- a/lld/test/ELF/arm-thumb-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-range-thunk-os.s @@ -45,9 +45,9 @@ // CHECK1: Disassembly of section .text: // CHECK1-EMPTY: // CHECK1-NEXT: <_start>: -// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572 -// CHECK1-NEXT: 100004: ff f3 fc d7 bl #16777208 -// CHECK1-NEXT: 100008: ff f2 fc d7 bl #15728632 +// CHECK1-NEXT: 100000: ff f0 fe ff bl 0x200000 +// CHECK1-NEXT: 100004: ff f3 fc d7 bl 0x1100000 +// CHECK1-NEXT: 100008: ff f2 fc d7 bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc16> FUNCTION 00 // CHECK2: : @@ -61,7 +61,7 @@ b.w tfunc28 // CHECK4: : // CHECK4-NEXT: 400000: 70 47 bx lr -// CHECK4-NEXT: 400002: 00 f0 01 90 b.w #12582914 <__Thumbv7ABSLongThunk_tfunc28> +// CHECK4-NEXT: 400002: 00 f0 01 90 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc28> FUNCTION 03 FUNCTION 04 FUNCTION 05 @@ -76,9 +76,9 @@ FUNCTION 14 // Expect precreated ThunkSection here // CHECK5: <__Thumbv7ABSLongThunk_tfunc16>: -// CHECK5-NEXT: 1000004: ff f1 fc bf b.w #2097144 +// CHECK5-NEXT: 1000004: ff f1 fc bf b.w 0x1200000 // CHECK5: <__Thumbv7ABSLongThunk_tfunc28>: -// CHECK5-NEXT: 1000008: ff f1 fa 97 b.w #14680052 +// CHECK5-NEXT: 1000008: ff f1 fa 97 b.w 0x1e00000 // CHECK5: <__Thumbv7ABSLongThunk_tfunc32>: // CHECK5-NEXT: 100000c: 40 f2 01 0c movw r12, #1 // CHECK5-NEXT: 1000010: c0 f2 20 2c movt r12, #544 @@ -88,7 +88,7 @@ // CHECK5-NEXT: 100001a: c0 f2 30 2c movt r12, #560 // CHECK5-NEXT: 100001e: 60 47 bx r12 // CHECK5: <__Thumbv7ABSLongThunk_tfunc02>: -// CHECK5-NEXT: 1000020: ff f7 ee 97 b.w #-12582948 +// CHECK5-NEXT: 1000020: ff f7 ee 97 b.w 0x400000 FUNCTION 15 // tfunc00 and tfunc01 are < 16Mb away, expect no range extension thunks bl tfunc00 @@ -99,18 +99,18 @@ bl tfunc33 // CHECK6: : // CHECK6-NEXT: 1100000: 70 47 bx lr -// CHECK6-NEXT: 1100002: ff f4 fd d7 bl #-15728646 -// CHECK6-NEXT: 1100006: ff f5 fb d7 bl #-14680074 -// CHECK6-NEXT: 110000a: ff f6 ff ff bl #-1048578 -// CHECK6-NEXT: 110000e: 00 f7 02 f8 bl #-1048572 +// CHECK6-NEXT: 1100002: ff f4 fd d7 bl 0x200000 +// CHECK6-NEXT: 1100006: ff f5 fb d7 bl 0x300000 +// CHECK6-NEXT: 110000a: ff f6 ff ff bl 0x100000c <__Thumbv7ABSLongThunk_tfunc32> +// CHECK6-NEXT: 110000e: 00 f7 02 f8 bl 0x1000016 <__Thumbv7ABSLongThunk_tfunc33> FUNCTION 16 FUNCTION 17 FUNCTION 18 // Expect another precreated thunk section here // CHECK7: <__Thumbv7ABSLongThunk_tfunc15>: -// CHECK7-NEXT: 1400004: ff f4 fc bf b.w #-3145736 +// CHECK7-NEXT: 1400004: ff f4 fc bf b.w 0x1100000 // CHECK7: <__Thumbv7ABSLongThunk_tfunc16>: -// CHECK7-NEXT: 1400008: ff f5 fa bf b.w #-2097164 +// CHECK7-NEXT: 1400008: ff f5 fa bf b.w 0x1200000 FUNCTION 19 FUNCTION 20 FUNCTION 21 @@ -125,7 +125,7 @@ // section // CHECK8: : // CHECK8-NEXT: 1e00000: 70 47 bx lr -// CHECK8-NEXT: 1e00002: 00 f6 0d 90 b.w #-14680038 <__Thumbv7ABSLongThunk_tfunc02> +// CHECK8-NEXT: 1e00002: 00 f6 0d 90 b.w 0x1000020 <__Thumbv7ABSLongThunk_tfunc02> b.w tfunc02 FUNCTION 29 @@ -138,13 +138,13 @@ bl tfunc16 // CHECK9: : // CHECK9: 2200000: 70 47 bx lr -// CHECK9-NEXT: 2200002: ff f5 ff d7 bl #-14680066 -// CHECK9-NEXT: 2200006: ff f5 ff d7 bl #-14680066 +// CHECK9-NEXT: 2200002: ff f5 ff d7 bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15> +// CHECK9-NEXT: 2200006: ff f5 ff d7 bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16> FUNCTION 33 bl tfunc15 bl tfunc16 // CHECK10: : // CHECK10: 2300000: 70 47 bx lr -// CHECK10-NEXT: 2300002: ff f4 ff d7 bl #-15728642 -// CHECK10-NEXT: 2300006: ff f4 ff d7 bl #-15728642 +// CHECK10-NEXT: 2300002: ff f4 ff d7 bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15> +// CHECK10-NEXT: 2300006: ff f4 ff d7 bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16> diff --git a/lld/test/ELF/arm-thumb-thunk-empty-pass.s b/lld/test/ELF/arm-thumb-thunk-empty-pass.s --- a/lld/test/ELF/arm-thumb-thunk-empty-pass.s +++ b/lld/test/ELF/arm-thumb-thunk-empty-pass.s @@ -18,13 +18,13 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 200b4: ff f7 fe ff bl #-4 +// CHECK-NEXT: 200b4: ff f7 fe ff bl 0x200b4 <_start> // CHECK: <__Thumbv7ABSLongThunk__start>: -// CHECK-NEXT: 200b8: ff f7 fc bf b.w #-8 <_start> +// CHECK-NEXT: 200b8: ff f7 fc bf b.w 0x200b4 <_start> // CHECK: <__Thumbv7ABSLongThunk__start>: // CHECK: 10200bc: 40 f2 b5 0c movw r12, #181 // CHECK-NEXT: 10200c0: c0 f2 02 0c movt r12, #2 // CHECK-NEXT: 10200c4: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: 10200c6: ff f7 f9 ff bl #-14 +// CHECK-NEXT: 10200c6: ff f7 f9 ff bl 0x10200bc <__Thumbv7ABSLongThunk__start> diff --git a/lld/test/ELF/arm-thumb-thunk-v6m.s b/lld/test/ELF/arm-thumb-thunk-v6m.s --- a/lld/test/ELF/arm-thumb-thunk-v6m.s +++ b/lld/test/ELF/arm-thumb-thunk-v6m.s @@ -33,7 +33,7 @@ // CHECK: Disassembly of section .text_low: // CHECK-EMPTY: // CHECK-NEXT: <_start>: -// CHECK-NEXT: 94: 00 f0 00 f8 bl #0 +// CHECK-NEXT: 94: 00 f0 00 f8 bl 0x98 <__Thumbv6MABSLongThunk_far> // CHECK: <__Thumbv6MABSLongThunk_far>: // CHECK-NEXT: 98: 03 b4 push {r0, r1} // CHECK-NEXT: 9a: 01 48 ldr r0, [pc, #4] @@ -48,7 +48,7 @@ // CHECK-PI: Disassembly of section .text_low: // CHECK-PI-EMPTY: // CHECK-PI-NEXT: <_start>: -// CHECK-PI-NEXT: 130: 00 f0 00 f8 bl #0 +// CHECK-PI-NEXT: 130: 00 f0 00 f8 bl 0x134 <__Thumbv6MPILongThunk_far> // CHECK-PI: <__Thumbv6MPILongThunk_far>: // CHECK-PI-NEXT: 134: 01 b4 push {r0} // CHECK-PI-NEXT: 136: 02 48 ldr r0, [pc, #8] diff --git a/lld/test/ELF/arm-thumb-undefined-weak-narrow.test b/lld/test/ELF/arm-thumb-undefined-weak-narrow.test --- a/lld/test/ELF/arm-thumb-undefined-weak-narrow.test +++ b/lld/test/ELF/arm-thumb-undefined-weak-narrow.test @@ -6,7 +6,7 @@ # CHECK: Disassembly of section .text: # CHECK-EMPTY: # CHECK-NEXT: <_start>: -# CHECK-NEXT: ff e7 b #-2 +# CHECK-NEXT: ff e7 b 0x200b6 <_start+0x2> @ imm = #-2 # Test the R_ARM_THM_JUMP11 relocation (102) to an undefined weak reference # It should resolve to the next instruction, which is an offset of -2 which diff --git a/lld/test/ELF/arm-thumb-undefined-weak.s b/lld/test/ELF/arm-thumb-undefined-weak.s --- a/lld/test/ELF/arm-thumb-undefined-weak.s +++ b/lld/test/ELF/arm-thumb-undefined-weak.s @@ -37,11 +37,11 @@ .reloc 0x1c, R_ARM_THM_PC12, target // CHECK: Disassembly of section .text: // CHECK-EMPTY: -// CHECK: 200b4: {{.*}} beq.w #0 <_start+0x4> -// CHECK-NEXT: 200b8: {{.*}} b.w #0 <_start+0x8> -// CHECK-NEXT: 200bc: {{.*}} bl #0 +// CHECK: 200b4: {{.*}} beq.w 0x200b8 <_start+0x4> @ imm = #0 +// CHECK-NEXT: 200b8: {{.*}} b.w 0x200bc <_start+0x8> @ imm = #0 +// CHECK-NEXT: 200bc: {{.*}} bl 0x200c0 <_start+0xc> @ imm = #0 /// blx is transformed into bl so we don't change state -// CHECK-NEXT: 200c0: {{.*}} bl #0 +// CHECK-NEXT: 200c0: {{.*}} bl 0x200c4 <_start+0x10> @ imm = #0 // CHECK-NEXT: 200c4: {{.*}} movt r0, #0 // CHECK-NEXT: 200c8: {{.*}} movw r0, #0 // CHECK-NEXT: 200cc: {{.*}} adr.w r0, #-4 diff --git a/lld/test/ELF/arm-thunk-arm-thumb-reuse.s b/lld/test/ELF/arm-thunk-arm-thumb-reuse.s --- a/lld/test/ELF/arm-thunk-arm-thumb-reuse.s +++ b/lld/test/ELF/arm-thunk-arm-thumb-reuse.s @@ -29,12 +29,12 @@ bl far2 // CHECK: 00010000 <_start>: -// CHECK-NEXT: 10000: bl #8 <__ARMv7ABSLongThunk_far> +// CHECK-NEXT: 10000: bl 0x10010 <__ARMv7ABSLongThunk_far> // CHECK: 00010004 <$t.1>: -// CHECK-NEXT: 10004: blx #8 -// CHECK-NEXT: 10008: bl #16 +// CHECK-NEXT: 10004: blx 0x10010 <__ARMv7ABSLongThunk_far> +// CHECK-NEXT: 10008: bl 0x1001c <__Thumbv7ABSLongThunk_far2> // CHECK: 0001000c <$a.2>: -// CHECK-NEXT: 1000c: blx #8 <__Thumbv7ABSLongThunk_far2> +// CHECK-NEXT: 1000c: blx 0x1001c <__Thumbv7ABSLongThunk_far2> // CHECK: 00010010 <__ARMv7ABSLongThunk_far>: // CHECK-NEXT: 10010: movw r12, #0 // CHECK-NEXT: 10014: movt r12, #4096 diff --git a/lld/test/ELF/arm-thunk-largesection.s b/lld/test/ELF/arm-thunk-largesection.s --- a/lld/test/ELF/arm-thunk-largesection.s +++ b/lld/test/ELF/arm-thunk-largesection.s @@ -22,7 +22,7 @@ // CHECK2: <__Thumbv7ABSLongThunk__start>: -// CHECK2-NEXT: 22004: b.w #-4104 <_start> +// CHECK2-NEXT: 22004: b.w 0x21000 <_start> /// Gigantic section where we need a ThunkSection either side of it .section .text.large1, "ax", %progbits @@ -32,8 +32,8 @@ .space (16 * 1024 * 1024) - 4 bl _start .space (16 * 1024 * 1024) - 16 -// CHECK3: 1021ff8: bl #-16777208 -// CHECK4: 2021ff8: bl #16777200 +// CHECK3: 1021ff8: bl 0x22004 <__Thumbv7ABSLongThunk__start> +// CHECK4: 2021ff8: bl 0x3021fec <__Thumbv7ABSLongThunk__start> // CHECK5: <__Thumbv7ABSLongThunk__start>: // CHECK5-NEXT: 3021fec: movw r12, #4097 diff --git a/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s b/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s --- a/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s +++ b/lld/test/ELF/arm-thunk-linkerscript-dotexpr.s @@ -32,8 +32,8 @@ // CHECK1-NEXT: <_start>: // CHECK1-NEXT: 94: 70 47 bx lr // CHECK1: : -// CHECK1-NEXT: 96: 00 f0 03 f8 bl #6 -// CHECK1-NEXT: 9a: 00 f0 06 f8 bl #12 +// CHECK1-NEXT: 96: 00 f0 03 f8 bl 0xa0 <__Thumbv7ABSLongThunk_high_target> +// CHECK1-NEXT: 9a: 00 f0 06 f8 bl 0xaa <__Thumbv7ABSLongThunk_high_target2> // CHECK1: <__Thumbv7ABSLongThunk_high_target>: // CHECK1-NEXT: a0: 40 f2 bd 0c movw r12, #189 // CHECK1-NEXT: a4: c0 f2 00 2c movt r12, #512 @@ -43,8 +43,8 @@ // CHECK1-NEXT: ae: c0 f2 00 2c movt r12, #512 // CHECK1-NEXT: b2: 60 47 bx r12 // CHECK1: : -// CHECK1-NEXT: b4: ff f7 f4 ff bl #-24 -// CHECK1-NEXT: b8: ff f7 f7 ff bl #-18 +// CHECK1-NEXT: b4: ff f7 f4 ff bl 0xa0 <__Thumbv7ABSLongThunk_high_target> +// CHECK1-NEXT: b8: ff f7 f7 ff bl 0xaa <__Thumbv7ABSLongThunk_high_target2> .section .text_high, "ax", %progbits .thumb @@ -63,8 +63,8 @@ bl low_target2 // CHECK2: : -// CHECK2-NEXT: 20000bc: 00 f0 02 f8 bl #4 -// CHECK2-NEXT: 20000c0: 00 f0 05 f8 bl #10 +// CHECK2-NEXT: 20000bc: 00 f0 02 f8 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target> +// CHECK2-NEXT: 20000c0: 00 f0 05 f8 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2> // CHECK2: <__Thumbv7ABSLongThunk_low_target>: // CHECK2-NEXT: 20000c4: 40 f2 97 0c movw r12, #151 // CHECK2-NEXT: 20000c8: c0 f2 00 0c movt r12, #0 @@ -74,5 +74,5 @@ // CHECK2-NEXT: 20000d2: c0 f2 00 0c movt r12, #0 // CHECK2-NEXT: 20000d6: 60 47 bx r12 // CHECK2: : -// CHECK2-NEXT: 20000d8: ff f7 f4 ff bl #-24 -// CHECK2-NEXT: 20000dc: ff f7 f7 ff bl #-18 +// CHECK2-NEXT: 20000d8: ff f7 f4 ff bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target> +// CHECK2-NEXT: 20000dc: ff f7 f7 ff bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2> diff --git a/lld/test/ELF/arm-thunk-linkerscript-large.s b/lld/test/ELF/arm-thunk-linkerscript-large.s --- a/lld/test/ELF/arm-thunk-linkerscript-large.s +++ b/lld/test/ELF/arm-thunk-linkerscript-large.s @@ -55,8 +55,8 @@ // CHECK1: Disassembly of section .text: // CHECK1-EMPTY: // CHECK1-NEXT: <_start>: -// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572 -// CHECK1-NEXT: 100004: 00 f0 00 f8 bl #0 +// CHECK1-NEXT: 100000: ff f0 fe ff bl 0x200000 +// CHECK1-NEXT: 100004: 00 f0 00 f8 bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31> // CHECK1: <__Thumbv7ABSLongThunk_tfunch31>: // CHECK1-NEXT: 100008: 40 f2 01 0c movw r12, #1 // CHECK1-NEXT: 10000c: c0 f2 10 4c movt r12, #1040 @@ -70,8 +70,8 @@ // CHECK2-EMPTY: // CHECK2-NEXT: : // CHECK2-NEXT: 200000: 70 47 bx lr -// CHECK2-NEXT: 200002: ff f0 ff df bl #9437182 -// CHECK2-NEXT: 200006: ff f6 ff ff bl #-1048578 +// CHECK2-NEXT: 200002: ff f0 ff df bl 0xb00004 <__Thumbv7ABSLongThunk_tfuncl24> +// CHECK2-NEXT: 200006: ff f6 ff ff bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31> FUNCTIONL 01 FUNCTIONL 02 FUNCTIONL 03 @@ -82,7 +82,7 @@ FUNCTIONL 08 FUNCTIONL 09 // CHECK3: <__Thumbv7ABSLongThunk_tfuncl24>: -// CHECK3-NEXT: b00004: ff f2 fc 97 b.w #15728632 +// CHECK3-NEXT: b00004: ff f2 fc 97 b.w 0x1a00000 FUNCTIONL 10 FUNCTIONL 11 FUNCTIONL 12 @@ -110,9 +110,9 @@ bl tfuncl24 // Shouldn't need a thunk bl tfunch00 -// CHECK4: 2100002: 00 f0 05 f8 bl #10 -// CHECK4-NEXT: 2100006: ff f4 fb f7 bl #-7340042 -// CHECK4-NEXT: 210000a: ff f0 f9 ff bl #1048562 +// CHECK4: 2100002: 00 f0 05 f8 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00> +// CHECK4-NEXT: 2100006: ff f4 fb f7 bl 0x1a00000 +// CHECK4-NEXT: 210000a: ff f0 f9 ff bl 0x2200000 // CHECK4: <__Thumbv7ABSLongThunk_tfuncl00>: // CHECK4-NEXT: 2100010: 40 f2 01 0c movw r12, #1 // CHECK4-NEXT: 2100014: c0 f2 20 0c movt r12, #32 @@ -127,9 +127,9 @@ // CHECK5-EMPTY: // CHECK5-NEXT: : // CHECK5-NEXT: 2200000: 70 47 bx lr -// CHECK5-NEXT: 2200002: 00 f7 05 f8 bl #-1048566 -// CHECK5-NEXT: 2200006: ff f7 fb df bl #-8388618 -// CHECK5-NEXT: 220000a: ff f6 f9 ff bl #-1048590 +// CHECK5-NEXT: 2200002: 00 f7 05 f8 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00> +// CHECK5-NEXT: 2200006: ff f7 fb df bl 0x1a00000 +// CHECK5-NEXT: 220000a: ff f6 f9 ff bl 0x2100000 FUNCTIONH 01 FUNCTIONH 02 FUNCTIONH 03 @@ -166,8 +166,8 @@ bl tfunch00 // CHECK6: : // CHECK6-NEXT: 4100000: 70 47 bx lr -// CHECK6-NEXT: 4100002: 00 f0 03 f8 bl #6 -// CHECK6-NEXT: 4100006: 00 f0 06 f8 bl #12 +// CHECK6-NEXT: 4100002: 00 f0 03 f8 bl 0x410000c <__Thumbv7ABSLongThunk_tfuncl00> +// CHECK6-NEXT: 4100006: 00 f0 06 f8 bl 0x4100016 <__Thumbv7ABSLongThunk_tfunch00> // CHECK6: <__Thumbv7ABSLongThunk_tfuncl00>: // CHECK6-NEXT: 410000c: 40 f2 01 0c movw r12, #1 // CHECK6-NEXT: 4100010: c0 f2 20 0c movt r12, #32 diff --git a/lld/test/ELF/arm-thunk-linkerscript-orphan.s b/lld/test/ELF/arm-thunk-linkerscript-orphan.s --- a/lld/test/ELF/arm-thunk-linkerscript-orphan.s +++ b/lld/test/ELF/arm-thunk-linkerscript-orphan.s @@ -22,8 +22,8 @@ // CHECK-NEXT: <_start>: // CHECK-NEXT: 100000: 70 47 bx lr // CHECK: : -// CHECK-NEXT: 100002: 00 f0 03 f8 bl #6 -// CHECK-NEXT: 100006: 00 f0 06 f8 bl #12 +// CHECK-NEXT: 100002: 00 f0 03 f8 bl 0x10000c <__Thumbv7ABSLongThunk_high_target> +// CHECK-NEXT: 100006: 00 f0 06 f8 bl 0x100016 <__Thumbv7ABSLongThunk_orphan_target> // CHECK: <__Thumbv7ABSLongThunk_high_target>: // CHECK-NEXT: 10000c: 40 f2 01 0c movw r12, #1 // CHECK-NEXT: 100010: c0 f2 00 2c movt r12, #512 @@ -42,8 +42,8 @@ // CHECK: Disassembly of section .text_high: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4 -// CHECK-NEXT: 2000004: 00 f0 06 f8 bl #12 +// CHECK-NEXT: 2000000: 00 f0 02 f8 bl 0x2000008 <__Thumbv7ABSLongThunk_low_target> +// CHECK-NEXT: 2000004: 00 f0 06 f8 bl 0x2000014 // CHECK: <__Thumbv7ABSLongThunk_low_target>: // CHECK-NEXT: 2000008: 40 f2 03 0c movw r12, #3 // CHECK-NEXT: 200000c: c0 f2 10 0c movt r12, #16 @@ -59,8 +59,8 @@ // CHECK: Disassembly of section orphan: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 2000014: ff f7 f8 ff bl #-16 -// CHECK-NEXT: 2000018: ff f7 f2 ff bl #-28 +// CHECK-NEXT: 2000014: ff f7 f8 ff bl 0x2000008 <__Thumbv7ABSLongThunk_low_target> +// CHECK-NEXT: 2000018: ff f7 f2 ff bl 0x2000000 .data .word 10 diff --git a/lld/test/ELF/arm-thunk-linkerscript-sort.s b/lld/test/ELF/arm-thunk-linkerscript-sort.s --- a/lld/test/ELF/arm-thunk-linkerscript-sort.s +++ b/lld/test/ELF/arm-thunk-linkerscript-sort.s @@ -41,7 +41,7 @@ FUNCTION 16 FUNCTION 15 // CHECK2: <__Thumbv7ABSLongThunk_tfunc31>: -// CHECK2-NEXT: 1000004: ff f3 fc 97 b.w #16777208 +// CHECK2-NEXT: 1000004: ff f3 fc 97 b.w 0x2000000 FUNCTION 14 FUNCTION 13 FUNCTION 12 @@ -65,5 +65,5 @@ bl tfunc01 bl tfunc31 // CHECK1: <_start>: -// CHECK1-NEXT: 100000: ff f0 fe ff bl #1048572 -// CHECK1-NEXT: 100004: ff f2 fe d7 bl #15728636 +// CHECK1-NEXT: 100000: ff f0 fe ff bl 0x200000 +// CHECK1-NEXT: 100004: ff f2 fe d7 bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc31> diff --git a/lld/test/ELF/arm-thunk-linkerscript.s b/lld/test/ELF/arm-thunk-linkerscript.s --- a/lld/test/ELF/arm-thunk-linkerscript.s +++ b/lld/test/ELF/arm-thunk-linkerscript.s @@ -32,8 +32,8 @@ // CHECK-NEXT: <_start>: // CHECK-NEXT: 94: 70 47 bx lr // CHECK: : -// CHECK-NEXT: 96: 00 f0 03 f8 bl #6 -// CHECK-NEXT: 9a: 00 f0 06 f8 bl #12 +// CHECK-NEXT: 96: 00 f0 03 f8 bl 0xa0 <__Thumbv7ABSLongThunk_high_target> +// CHECK-NEXT: 9a: 00 f0 06 f8 bl 0xaa <__Thumbv7ABSLongThunk_high_target2> // CHECK: <__Thumbv7ABSLongThunk_high_target>: // CHECK-NEXT: a0: 40 f2 01 0c movw r12, #1 // CHECK-NEXT: a4: c0 f2 00 2c movt r12, #512 @@ -43,8 +43,8 @@ // CHECK-NEXT: ae: c0 f2 00 2c movt r12, #512 // CHECK-NEXT: b2: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: b4: ff f7 f4 ff bl #-24 -// CHECK-NEXT: b8: ff f7 f7 ff bl #-18 +// CHECK-NEXT: b4: ff f7 f4 ff bl 0xa0 <__Thumbv7ABSLongThunk_high_target> +// CHECK-NEXT: b8: ff f7 f7 ff bl 0xaa <__Thumbv7ABSLongThunk_high_target2> .section .text_high, "ax", %progbits .thumb @@ -65,8 +65,8 @@ // CHECK: Disassembly of section .text_high: // CHECK-EMPTY: // CHECK-NEXT: : -// CHECK-NEXT: 2000000: 00 f0 02 f8 bl #4 -// CHECK-NEXT: 2000004: 00 f0 05 f8 bl #10 +// CHECK-NEXT: 2000000: 00 f0 02 f8 bl 0x2000008 <__Thumbv7ABSLongThunk_low_target> +// CHECK-NEXT: 2000004: 00 f0 05 f8 bl 0x2000012 <__Thumbv7ABSLongThunk_low_target2> // CHECK: <__Thumbv7ABSLongThunk_low_target>: // CHECK-NEXT: 2000008: 40 f2 97 0c movw r12, #151 // CHECK-NEXT: 200000c: c0 f2 00 0c movt r12, #0 @@ -76,5 +76,5 @@ // CHECK-NEXT: 2000016: c0 f2 00 0c movt r12, #0 // CHECK-NEXT: 200001a: 60 47 bx r12 // CHECK: : -// CHECK-NEXT: 200001c: ff f7 f4 ff bl #-24 -// CHECK-NEXT: 2000020: ff f7 f7 ff bl #-18 +// CHECK-NEXT: 200001c: ff f7 f4 ff bl 0x2000008 <__Thumbv7ABSLongThunk_low_target> +// CHECK-NEXT: 2000020: ff f7 f7 ff bl 0x2000012 <__Thumbv7ABSLongThunk_low_target2> diff --git a/lld/test/ELF/arm-thunk-many-passes.s b/lld/test/ELF/arm-thunk-many-passes.s --- a/lld/test/ELF/arm-thunk-many-passes.s +++ b/lld/test/ELF/arm-thunk-many-passes.s @@ -35,24 +35,24 @@ // CHECK-ELF-NEXT: Value: 0x101104C // CHECK: 00011000 <_start>: -// CHECK-NEXT: 11000: b.w #14680132 <__Thumbv7ABSLongThunk_f2> -// CHECK-NEXT: 11004: b.w #14680128 <__Thumbv7ABSLongThunk_f2> -// CHECK-NEXT: 11008: b.w #14680128 <__Thumbv7ABSLongThunk_f3> -// CHECK-NEXT: 1100c: b.w #14680124 <__Thumbv7ABSLongThunk_f3> -// CHECK-NEXT: 11010: b.w #14680124 <__Thumbv7ABSLongThunk_f4> -// CHECK-NEXT: 11014: b.w #14680120 <__Thumbv7ABSLongThunk_f4> -// CHECK-NEXT: 11018: b.w #14680120 <__Thumbv7ABSLongThunk_f5> -// CHECK-NEXT: 1101c: b.w #14680116 <__Thumbv7ABSLongThunk_f5> -// CHECK-NEXT: 11020: b.w #14680116 <__Thumbv7ABSLongThunk_f6> -// CHECK-NEXT: 11024: b.w #14680112 <__Thumbv7ABSLongThunk_f6> -// CHECK-NEXT: 11028: b.w #14680112 <__Thumbv7ABSLongThunk_f7> -// CHECK-NEXT: 1102c: b.w #14680108 <__Thumbv7ABSLongThunk_f7> -// CHECK-NEXT: 11030: b.w #14680108 <__Thumbv7ABSLongThunk_f8> -// CHECK-NEXT: 11034: b.w #14680104 <__Thumbv7ABSLongThunk_f8> -// CHECK-NEXT: 11038: b.w #14680104 <__Thumbv7ABSLongThunk_f9> -// CHECK-NEXT: 1103c: b.w #14680100 <__Thumbv7ABSLongThunk_f9> -// CHECK-NEXT: 11040: b.w #14680100 <__Thumbv7ABSLongThunk_f10> -// CHECK-NEXT: 11044: b.w #14680096 <__Thumbv7ABSLongThunk_f10> +// CHECK-NEXT: 11000: b.w 0xe11048 <__Thumbv7ABSLongThunk_f2> +// CHECK-NEXT: 11004: b.w 0xe11048 <__Thumbv7ABSLongThunk_f2> +// CHECK-NEXT: 11008: b.w 0xe1104c <__Thumbv7ABSLongThunk_f3> +// CHECK-NEXT: 1100c: b.w 0xe1104c <__Thumbv7ABSLongThunk_f3> +// CHECK-NEXT: 11010: b.w 0xe11050 <__Thumbv7ABSLongThunk_f4> +// CHECK-NEXT: 11014: b.w 0xe11050 <__Thumbv7ABSLongThunk_f4> +// CHECK-NEXT: 11018: b.w 0xe11054 <__Thumbv7ABSLongThunk_f5> +// CHECK-NEXT: 1101c: b.w 0xe11054 <__Thumbv7ABSLongThunk_f5> +// CHECK-NEXT: 11020: b.w 0xe11058 <__Thumbv7ABSLongThunk_f6> +// CHECK-NEXT: 11024: b.w 0xe11058 <__Thumbv7ABSLongThunk_f6> +// CHECK-NEXT: 11028: b.w 0xe1105c <__Thumbv7ABSLongThunk_f7> +// CHECK-NEXT: 1102c: b.w 0xe1105c <__Thumbv7ABSLongThunk_f7> +// CHECK-NEXT: 11030: b.w 0xe11060 <__Thumbv7ABSLongThunk_f8> +// CHECK-NEXT: 11034: b.w 0xe11060 <__Thumbv7ABSLongThunk_f8> +// CHECK-NEXT: 11038: b.w 0xe11064 <__Thumbv7ABSLongThunk_f9> +// CHECK-NEXT: 1103c: b.w 0xe11064 <__Thumbv7ABSLongThunk_f9> +// CHECK-NEXT: 11040: b.w 0xe11068 <__Thumbv7ABSLongThunk_f10> +// CHECK-NEXT: 11044: b.w 0xe11068 <__Thumbv7ABSLongThunk_f10> .thumb diff --git a/lld/test/ELF/arm-thunk-multipass-plt.s b/lld/test/ELF/arm-thunk-multipass-plt.s --- a/lld/test/ELF/arm-thunk-multipass-plt.s +++ b/lld/test/ELF/arm-thunk-multipass-plt.s @@ -41,9 +41,9 @@ .section .text.07, "ax", %progbits .space (1024 * 1024) -/// 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible@plt +/// 0xd00040 = preemptible@plt // CHECK: 0070000c <__ARMV5PILongThunk_preemptible>: -// CHECK-NEXT: 70000c: b #6291500 +// CHECK-NEXT: 70000c: b 0xd00040 .section .text.08, "ax", %progbits .space (1024 * 1024) - 4 @@ -52,8 +52,7 @@ .balign 2 bl preemptible bl preemptible2 -/// 0x80000c + 4 - 100004 = 0x70000c = __ARMv5PILongThunk_preemptible -// CHECK-CALL: 80000c: blx #-1048580 +// CHECK-CALL: 80000c: blx 0x70000c <__ARMV5PILongThunk_preemptible> .balign 2 .globl preemptible .type preemptible, %function diff --git a/lld/test/ELF/arm-thunk-multipass.s b/lld/test/ELF/arm-thunk-multipass.s --- a/lld/test/ELF/arm-thunk-multipass.s +++ b/lld/test/ELF/arm-thunk-multipass.s @@ -27,8 +27,8 @@ b.w arm_target // arm_target is in range but needs an interworking thunk // CHECK1: <_start>: -// CHECK1-NEXT: 100002: 00 f3 06 d0 bl #15728652 -// CHECK1-NEXT: 100006: ff f2 ff 97 b.w #15728638 <__Thumbv7ABSLongThunk_arm_target> +// CHECK1-NEXT: 100002: 00 f3 06 d0 bl 0x1000012 <__Thumbv7ABSLongThunk_target> +// CHECK1-NEXT: 100006: ff f2 ff 97 b.w 0x1000008 <__Thumbv7ABSLongThunk_arm_target> nop nop nop @@ -64,9 +64,9 @@ // CHECK2-NEXT: 100000c: c0 f2 00 1c movt r12, #256 // CHECK2-NEXT: 1000010: 60 47 bx r12 // CHECK2: <__Thumbv7ABSLongThunk_target>: -// CHECK2-NEXT: 1000012: ff f0 ff bf b.w #1048574 +// CHECK2-NEXT: 1000012: ff f0 ff bf b.w 0x1100014 // CHECK2: <__Thumbv7ABSLongThunk_target2>: -// CHECK2-NEXT: 1000016: ff f4 fc 97 b.w #-15728648 +// CHECK2-NEXT: 1000016: ff f4 fc 97 b.w 0x100012 .section .text.17, "ax", %progbits // Just enough space so that bl target is in range if no extension thunks are @@ -86,7 +86,7 @@ nop bx lr // CHECK3: : -// CHECK3-NEXT: 1100014: ff f6 ff ff bl #-1048578 +// CHECK3-NEXT: 1100014: ff f6 ff ff bl 0x1000016 <__Thumbv7ABSLongThunk_target2> // CHECK3-NEXT: 1100018: 00 bf nop // CHECK3-NEXT: 110001a: 00 bf nop // CHECK3-NEXT: 110001c: 70 47 bx lr diff --git a/lld/test/ELF/arm-thunk-nosuitable.s b/lld/test/ELF/arm-thunk-nosuitable.s --- a/lld/test/ELF/arm-thunk-nosuitable.s +++ b/lld/test/ELF/arm-thunk-nosuitable.s @@ -20,9 +20,9 @@ bx lr // CHECK: <_start>: -// CHECK-NEXT: 2200b4: 00 f0 00 80 beq.w #0 +// CHECK-NEXT: 2200b4: 00 f0 00 80 beq.w 0x2200b8 <__Thumbv7ABSLongThunk_target> // CHECK: <__Thumbv7ABSLongThunk_target>: -// CHECK-NEXT: 2200b8: 00 f0 01 90 b.w #12582914 +// CHECK-NEXT: 2200b8: 00 f0 01 90 b.w 0xe200be // CHECK: 2200bc: 70 47 bx lr .section .text.2, "ax", %progbits diff --git a/lld/test/ELF/arm-thunk-re-add.s b/lld/test/ELF/arm-thunk-re-add.s --- a/lld/test/ELF/arm-thunk-re-add.s +++ b/lld/test/ELF/arm-thunk-re-add.s @@ -94,9 +94,9 @@ // CHECK2-NEXT: 1100010: fc 44 add r12, pc // CHECK2-NEXT: 1100012: 60 47 bx r12 // CHECK2: : -// CHECK2-NEXT: 1100014: ff f6 f6 bf b.w #-1048596 <__ThumbV7PILongThunk_imported> -// CHECK2-NEXT: 1100018: 3f f4 f6 af beq.w #-20 <__ThumbV7PILongThunk_imported> -// CHECK2-NEXT: 110001c: ff f6 f8 bf b.w #-1048592 <__ThumbV7PILongThunk_imported2> +// CHECK2-NEXT: 1100014: ff f6 f6 bf b.w 0x1000004 <__ThumbV7PILongThunk_imported> +// CHECK2-NEXT: 1100018: 3f f4 f6 af beq.w 0x1100008 <__ThumbV7PILongThunk_imported> +// CHECK2-NEXT: 110001c: ff f6 f8 bf b.w 0x1000010 <__ThumbV7PILongThunk_imported2> // CHECK3: Disassembly of section .plt: // CHECK3-EMPTY: diff --git a/lld/test/ELF/arm-undefined-weak.s b/lld/test/ELF/arm-undefined-weak.s --- a/lld/test/ELF/arm-undefined-weak.s +++ b/lld/test/ELF/arm-undefined-weak.s @@ -33,9 +33,9 @@ // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: 100100b4 <_start>: -// CHECK-NEXT: 100100b4: b #-4 -// CHECK-NEXT: 100100b8: bl #-4 -// CHECK-NEXT: 100100bc: bl #-4 +// CHECK-NEXT: 100100b4: b {{.+}} @ imm = #-4 +// CHECK-NEXT: 100100b8: bl {{.+}} @ imm = #-4 +// CHECK-NEXT: 100100bc: bl {{.+}} @ imm = #-4 // CHECK-NEXT: 100100c0: movt r0, #0 // CHECK-NEXT: 100100c4: movw r0, #0 // CHECK: 100100c8: 00 00 00 00 .word 0x00000000 diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h @@ -44,10 +44,8 @@ void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O); - void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, - const MCSubtargetInfo &STI, raw_ostream &O) { - printOperand(MI, OpNum, STI, O); - } + void printOperand(const MCInst *MI, uint64_t Address, unsigned OpNum, + const MCSubtargetInfo &STI, raw_ostream &O); void printSORegRegOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O); diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp @@ -17,6 +17,7 @@ #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrAnalysis.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" @@ -348,6 +349,20 @@ } } +void ARMInstPrinter::printOperand(const MCInst *MI, uint64_t Address, + unsigned OpNum, const MCSubtargetInfo &STI, + raw_ostream &O) { + const MCOperand &Op = MI->getOperand(OpNum); + if (!Op.isImm() || !PrintBranchImmAsAddress || getUseMarkup()) + return printOperand(MI, OpNum, STI, O); + uint64_t Target = ARM_MC::evaluateBranchTarget(MII.get(MI->getOpcode()), + Address, Op.getImm()); + Target &= 0xffffffff; + O << formatHex(Target); + if (CommentStream) + *CommentStream << "imm = #" << formatImm(Op.getImm()) << '\n'; +} + void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) { diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h @@ -57,6 +57,9 @@ return false; } +uint64_t evaluateBranchTarget(const MCInstrDesc &InstDesc, uint64_t Addr, + int64_t Imm); + /// Create a ARM MCSubtargetInfo instance. This is exposed so Asm parser, etc. /// do not need to go through TargetRegistry. MCSubtargetInfo *createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -195,6 +195,24 @@ return false; } +uint64_t ARM_MC::evaluateBranchTarget(const MCInstrDesc &InstDesc, + uint64_t Addr, int64_t Imm) { + // For ARM instructions the PC offset is 8 bytes, for Thumb instructions it + // is 4 bytes. + uint64_t Offset = + ((InstDesc.TSFlags & ARMII::FormMask) == ARMII::ThumbFrm) ? 4 : 8; + + // A Thumb instruction BLX(i) can be 16-bit aligned while targets Arm code + // which is 32-bit aligned. The target address for the case is calculated as + // targetAddress = Align(PC,4) + imm32; + // where + // Align(x, y) = y * (x DIV y); + if (InstDesc.getOpcode() == ARM::tBLXi) + Addr &= ~0x3; + + return Addr + Imm + Offset; +} + MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPU); @@ -413,32 +431,15 @@ const MCInstrDesc &Desc = Info->get(Inst.getOpcode()); // Find the PC-relative immediate operand in the instruction. - bool FoundImm = false; - int64_t Imm; for (unsigned OpNum = 0; OpNum < Desc.getNumOperands(); ++OpNum) { if (Inst.getOperand(OpNum).isImm() && Desc.OpInfo[OpNum].OperandType == MCOI::OPERAND_PCREL) { - Imm = Inst.getOperand(OpNum).getImm(); - FoundImm = true; + int64_t Imm = Inst.getOperand(OpNum).getImm(); + Target = ARM_MC::evaluateBranchTarget(Desc, Addr, Imm); + return true; } } - if (!FoundImm) - return false; - - // For ARM instructions the PC offset is 8 bytes, for Thumb instructions it - // is 4 bytes. - uint64_t Offset = ((Desc.TSFlags & ARMII::FormMask) == ARMII::ThumbFrm) ? 4 : 8; - - // A Thumb instruction BLX(i) can be 16-bit aligned while targets Arm code - // which is 32-bit aligned. The target address for the case is calculated as - // targetAddress = Align(PC,4) + imm32; - // where - // Align(x, y) = y * (x DIV y); - if (Inst.getOpcode() == ARM::tBLXi) - Addr &= ~0x3; - - Target = Addr + Imm + Offset; - return true; + return false; } }; diff --git a/llvm/test/CodeGen/ARM/Windows/division-range.ll b/llvm/test/CodeGen/ARM/Windows/division-range.ll --- a/llvm/test/CodeGen/ARM/Windows/division-range.ll +++ b/llvm/test/CodeGen/ARM/Windows/division-range.ll @@ -10,6 +10,5 @@ } ; CHECK: cmp r1, #0 -; CHECK: beq # +; CHECK: beq {{.+}} @ imm = # ; CHECK: bl - diff --git a/llvm/test/MC/ARM/arm-macho-calls.s b/llvm/test/MC/ARM/arm-macho-calls.s --- a/llvm/test/MC/ARM/arm-macho-calls.s +++ b/llvm/test/MC/ARM/arm-macho-calls.s @@ -2,9 +2,9 @@ @ RUN: llvm-objdump -d -r %t | FileCheck %s @ CHECK: <_func>: -@ CHECK: bl #0 <_func+0x8> +@ CHECK: bl 0x8 <_func+0x8> @ imm = #0 @ CHECK: ARM_RELOC_BR24 __text -@ CHECK: bl #-12 <_func> +@ CHECK: bl 0x0 <_func> @ imm = #-12 @ CHECK: ARM_RELOC_BR24 _elsewhere .global _func _func: diff --git a/llvm/test/MC/ARM/branch-disassemble.s b/llvm/test/MC/ARM/branch-disassemble.s --- a/llvm/test/MC/ARM/branch-disassemble.s +++ b/llvm/test/MC/ARM/branch-disassemble.s @@ -7,8 +7,8 @@ @ RUN: | FileCheck %s -check-prefix CHECK-THUMB b.w .Lbranch -@ CHECK-ARM: b #4 <$a.0+0xc> -@ CHECK-THUMB: b.w #8 <$t.0+0xc> +@ CHECK-ARM: b 0xc <$a.0+0xc> @ imm = #4 +@ CHECK-THUMB: b.w 0xc <$t.0+0xc> @ imm = #8 adds r0, r1, #42 adds r1, r2, #42 .Lbranch: diff --git a/llvm/test/MC/ARM/coff-relocations.s b/llvm/test/MC/ARM/coff-relocations.s --- a/llvm/test/MC/ARM/coff-relocations.s +++ b/llvm/test/MC/ARM/coff-relocations.s @@ -18,28 +18,28 @@ b target @ CHECK-ENCODING-LABEL: : -@ CHECK-ENCODING-NEXT: b.w #0 +@ CHECK-ENCODING-NEXT: b.w {{.+}} @ imm = #0 .thumb_func branch24t_1: bl target @ CHECK-ENCODING-LABEL: : -@ CHECK-ENCODING-NEXR: bl #0 +@ CHECK-ENCODING-NEXR: bl {{.+}} @ imm = #0 .thumb_func branch20t: bcc target @ CHECK-ENCODING-LABEL: : -@ CHECK-ENCODING-NEXT: blo.w #0 +@ CHECK-ENCODING-NEXT: blo.w {{.+}} @ imm = #0 .thumb_func blx23t: blx target @ CHECK-ENCODING-LABEL: : -@ CHECK-ENCODING-NEXT: blx #0 +@ CHECK-ENCODING-NEXT: blx {{.+}} @ imm = #0 .thumb_func mov32t: diff --git a/llvm/test/MC/ARM/thumb-cb-thumbfunc.s b/llvm/test/MC/ARM/thumb-cb-thumbfunc.s --- a/llvm/test/MC/ARM/thumb-cb-thumbfunc.s +++ b/llvm/test/MC/ARM/thumb-cb-thumbfunc.s @@ -1,7 +1,7 @@ @ RUN: llvm-mc -triple thumbv7-apple-macho -filetype=obj -o %t %s @ RUN: llvm-objdump -d --triple=thumbv7 %t | FileCheck %s -@ CHECK: cbnz r0, #0 +@ CHECK: cbnz r0, 0x4 @ imm = #0 .thumb_func label4 cbnz r0, label4 .space 2 diff --git a/llvm/test/MC/ARM/thumb1-relax-bcc.s b/llvm/test/MC/ARM/thumb1-relax-bcc.s --- a/llvm/test/MC/ARM/thumb1-relax-bcc.s +++ b/llvm/test/MC/ARM/thumb1-relax-bcc.s @@ -8,5 +8,5 @@ bne _func2 @ CHECK-ERROR: unsupported relocation on symbol -@ CHECK-ELF: 7f f4 fe af bne.w #-4 +@ CHECK-ELF: 7f f4 fe af bne.w {{.+}} @ imm = #-4 @ CHECK-ELF-NEXT: R_ARM_THM_JUMP19 _func2 diff --git a/llvm/test/MC/ARM/thumb1-relax-br.s b/llvm/test/MC/ARM/thumb1-relax-br.s --- a/llvm/test/MC/ARM/thumb1-relax-br.s +++ b/llvm/test/MC/ARM/thumb1-relax-br.s @@ -12,8 +12,8 @@ @ CHECK-ERROR: unsupported relocation on symbol -@ CHECK-MACHO: ff f7 fe bf b.w #-4 +@ CHECK-MACHO: ff f7 fe bf b.w {{.+}} @ imm = #-4 @ CHECK-MACHO-NEXT: ARM_THUMB_RELOC_BR22 -@ CHECK-ELF: ff f7 fe bf b.w #-4 +@ CHECK-ELF: ff f7 fe bf b.w {{.+}} @ imm = #-4 @ CHECK-ELF-NEXT: R_ARM_THM_JUMP24 _func2 diff --git a/llvm/test/MC/ARM/thumb2-b.w-target.s b/llvm/test/MC/ARM/thumb2-b.w-target.s --- a/llvm/test/MC/ARM/thumb2-b.w-target.s +++ b/llvm/test/MC/ARM/thumb2-b.w-target.s @@ -3,8 +3,8 @@ .syntax unified // CHECK-LABEL: start -// CHECK-NEXT: b.w #16777208 -// CHECK-NEXT: b.w #2 +// CHECK-NEXT: b.w {{.+}} @ imm = #16777208 +// CHECK-NEXT: b.w {{.+}} @ imm = #2 start: b.w start - 1f + 0x1000000 1: diff --git a/llvm/test/MC/ARM/thumb2-cbn-to-next-inst.s b/llvm/test/MC/ARM/thumb2-cbn-to-next-inst.s --- a/llvm/test/MC/ARM/thumb2-cbn-to-next-inst.s +++ b/llvm/test/MC/ARM/thumb2-cbn-to-next-inst.s @@ -23,11 +23,11 @@ @ CHECK: 0: 02 eb 03 01 add.w r1, r2, r3 @ CHECK: 4: 00 bf nop @ CHECK: 6: 05 eb 06 04 add.w r4, r5, r6 -@ CHECK: a: 0a b9 cbnz r2, #2 +@ CHECK: a: 0a b9 cbnz r2, 0x10 @ imm = #2 @ CHECK: c: a8 eb 09 07 sub.w r7, r8, r9 @ CHECK: 10: 08 eb 09 07 add.w r7, r8, r9 @ CHECK: 14: 00 bf nop @ CHECK: 16: 0b eb 0c 0a add.w r10, r11, r12 -@ CHECK: 1a: 0a b1 cbz r2, #2 +@ CHECK: 1a: 0a b1 cbz r2, 0x20 @ imm = #2 @ CHECK: 1c: a8 eb 09 07 sub.w r7, r8, r9 @ CHECK: 20: 04 eb 05 03 add.w r3, r4, r5 diff --git a/llvm/test/MC/Disassembler/ARM/mve-lol.txt b/llvm/test/MC/Disassembler/ARM/mve-lol.txt --- a/llvm/test/MC/Disassembler/ARM/mve-lol.txt +++ b/llvm/test/MC/Disassembler/ARM/mve-lol.txt @@ -5,45 +5,45 @@ # checking that we see branch targets annotations like <$t.0+0xc> in the # disassembly. -# CHECK: wls lr, r3, #8 <$t.0+0xc> +# CHECK: wls lr, r3, 0xc <$t.0+0xc> @ imm = #8 # CHECK: vmov q0, q1 -# CHECK: le lr, #-8 <$t.0+0x4> +# CHECK: le lr, 0x4 <$t.0+0x4> @ imm = #-8 wls lr, r3, #8 vmov q0, q1 le lr, #-8 -# CHECK: wlstp.8 lr, r3, #8 <$t.0+0x18> +# CHECK: wlstp.8 lr, r3, 0x18 <$t.0+0x18> @ imm = #8 # CHECK: vmov q0, q1 -# CHECK: letp lr, #-8 <$t.0+0x10> +# CHECK: letp lr, 0x10 <$t.0+0x10> @ imm = #-8 wlstp.8 lr, r3, #8 vmov q0, q1 letp lr, #-8 -# CHECK: wlstp.16 lr, r3, #8 <$t.0+0x24> +# CHECK: wlstp.16 lr, r3, 0x24 <$t.0+0x24> @ imm = #8 # CHECK: vmov q0, q1 -# CHECK: letp lr, #-8 <$t.0+0x1c> +# CHECK: letp lr, 0x1c <$t.0+0x1c> @ imm = #-8 wlstp.16 lr, r3, #8 vmov q0, q1 letp lr, #-8 -# CHECK: wlstp.32 lr, r3, #8 <$t.0+0x30> +# CHECK: wlstp.32 lr, r3, 0x30 <$t.0+0x30> @ imm = #8 # CHECK: vmov q0, q1 -# CHECK: letp lr, #-8 <$t.0+0x28> +# CHECK: letp lr, 0x28 <$t.0+0x28> @ imm = #-8 wlstp.32 lr, r3, #8 vmov q0, q1 letp lr, #-8 -# CHECK: wlstp.64 lr, r3, #8 <$t.0+0x3c> +# CHECK: wlstp.64 lr, r3, 0x3c <$t.0+0x3c> @ imm = #8 # CHECK: vmov q0, q1 -# CHECK: letp lr, #-8 <$t.0+0x34> +# CHECK: letp lr, 0x34 <$t.0+0x34> @ imm = #-8 wlstp.64 lr, r3, #8 vmov q0, q1 diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/branch-symbols.s b/llvm/test/tools/llvm-objdump/ELF/ARM/branch-symbols.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/branch-symbols.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/branch-symbols.s @@ -7,8 +7,8 @@ .arm b foo ble foo -@ CHECK: 0: b #-8 -@ CHECK: 4: ble #-12 +@ CHECK: 0: b 0x0 @ imm = #-8 +@ CHECK: 4: ble 0x0 @ imm = #-12 .thumb b foo @@ -19,29 +19,29 @@ le lr, foo cbz r0, bar cbnz r0, bar -@ CHECK: 8: b #-12 -@ CHECK: a: b.w #-14 -@ CHECK: e: ble #-18 -@ CHECK: 10: ble.w #-20 -@ CHECK: 14: le #-24 -@ CHECK: 18: le lr, #-28 -@ CHECK: 1c: cbz r0, #40 -@ CHECK: 1e: cbnz r0, #38 +@ CHECK: 8: b 0x0 @ imm = #-12 +@ CHECK: a: b.w 0x0 @ imm = #-14 +@ CHECK: e: ble 0x0 @ imm = #-18 +@ CHECK: 10: ble.w 0x0 @ imm = #-20 +@ CHECK: 14: le 0x0 @ imm = #-24 +@ CHECK: 18: le lr, 0x0 @ imm = #-28 +@ CHECK: 1c: cbz r0, 0x48 @ imm = #40 +@ CHECK: 1e: cbnz r0, 0x48 @ imm = #38 // Calls without relocations (these offsets al correspond to label foo). .arm bl #-40 blx #-44 bleq #-48 -@ CHECK: 20: bl #-40 -@ CHECK: 24: blx #-44 -@ CHECK: 28: bleq #-48 +@ CHECK: 20: bl 0x0 @ imm = #-40 +@ CHECK: 24: blx 0x0 @ imm = #-44 +@ CHECK: 28: bleq 0x0 @ imm = #-48 .thumb bl #-48 blx #-52 -@ CHECK: 2c: bl #-48 -@ CHECK: 30: blx #-52 +@ CHECK: 2c: bl 0x0 @ imm = #-48 +@ CHECK: 30: blx 0x0 @ imm = #-52 // Calls with relocations. These currently emit a reference to their own // location, because we don't take relocations into account when printing @@ -50,21 +50,19 @@ bl baz blx baz bleq baz -@ CHECK: 34: bl #-8 <$a.4> +@ CHECK: 34: bl {{.+}} @ imm = #-8 @ CHECK: 00000034: R_ARM_CALL baz -@ CHECK: 38: blx #-8 <$a.4+0x4> +@ CHECK: 38: blx {{.+}} @ imm = #-8 @ CHECK: 00000038: R_ARM_CALL baz -@ CHECK: 3c: bleq #-8 <$a.4+0x8> +@ CHECK: 3c: bleq {{.+}} @ imm = #-8 @ CHECK: 0000003c: R_ARM_JUMP24 baz .thumb bl baz blx baz -@ CHECK: 40: bl #-4 <$t.5> -@ CHECK: 00000040: R_ARM_THM_CALL baz -@ CHECK: 44: blx #-4 <$t.5+0x4> -@ CHECK: 00000044: R_ARM_THM_CALL baz +@ CHECK: 40: bl {{.+}} @ imm = #-4 +@ CHECK: 00000040: R_ARM_THM_CALL baz +@ CHECK: 44: blx {{.+}} @ imm = #-4 +@ CHECK: 00000044: R_ARM_THM_CALL baz bar: - - diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s b/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/invalid-instruction.s @@ -5,5 +5,5 @@ .inst 0xffffffff l0: -@CHECK: 0: 00 00 00 ea b #0 +@CHECK: 0: 00 00 00 ea b 0x8 @ imm = #0 @CHECK-NEXT: 4: ff ff ff ff diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/tblxi-target.s b/llvm/test/tools/llvm-objdump/ELF/ARM/tblxi-target.s --- a/llvm/test/tools/llvm-objdump/ELF/ARM/tblxi-target.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/tblxi-target.s @@ -5,10 +5,12 @@ # RUN: llvm-objdump -dr - --triple armv8a --no-show-raw-insn | \ # RUN: FileCheck %s -# CHECK: : +# CHECK: 00000000 : +# CHECK: 00000004 : # CHECK-NEXT: 4: nop -# CHECK-NEXT: 6: blx #-8 -# CHECK-NEXT: a: blx #4 +# CHECK-NEXT: 6: blx 0x0 @ imm = #-8 +# CHECK-NEXT: a: blx 0x10 @ imm = #4 +# CHECK: 00000010 : .arm foo: diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test --- a/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/unknown-instr.test @@ -14,7 +14,7 @@ # CHECK: 00000000 <.text>: # CHECK-NEXT: 0: cb -# CHECK-NEXT: 1: f3 f7 8b be b.w #-49898 +# CHECK-NEXT: 1: f3 f7 8b be b.w 0xffff3d1b <{{.+}}> @ imm = #-49898 --- !ELF FileHeader: