Add norm sub-target feature to table gen for ARC

[thomasjohns]

Summary

This is a small change for going through the process of creating a patch for the ARC code generator.

This adds the norm sub-target feature (without backing implementation for now) to table gen.

[marksl]

Looks fine to me

[danilaml]

Test failures appear unrelated.

llvm/lib/Target/ARC/ARC.td

 //===- ARC.td - Describe the ARC Target Machine ------------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 include "llvm/Target/Target.td"
 
+//===----------------------------------------------------------------------===//
+// ARC Subtarget features
+//===----------------------------------------------------------------------===//
+
+def FeatureNORM
+    : SubtargetFeature<"norm", "Xnorm", "true",
+                       "Enable support for norm instruction.">;
+
+//===----------------------------------------------------------------------===//
+// Registers, calling conventions, instruction descriptions
+//===----------------------------------------------------------------------===//
+
 include "ARCRegisterInfo.td"
 include "ARCInstrInfo.td"
 include "ARCCallingConv.td"
 
 def ARCInstrInfo : InstrInfo;
 
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
 def : Proc<"generic", []>;
 
 def ARC : Target {
   let InstructionSet = ARCInstrInfo;
 }

llvm/lib/Target/ARC/ARCSubtarget.h

 #include "ARCGenSubtargetInfo.inc"
 
 namespace llvm {
 
 class StringRef;
 class TargetMachine;
 
 class ARCSubtarget : public ARCGenSubtargetInfo {
+  bool Xnorm = false;
+
   virtual void anchor();
   ARCInstrInfo InstrInfo;
   ARCFrameLowering FrameLowering;
   ARCTargetLowering TLInfo;
   SelectionDAGTargetInfo TSInfo;
 
 public:
   /// This constructor initializes the data members to match that
const ARCTargetLowering *getTargetLowering() const override {
     return &TLInfo;
   }
   const ARCRegisterInfo *getRegisterInfo() const override {
     return &InstrInfo.getRegisterInfo();
   }
   const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
     return &TSInfo;
   }
+
+  bool hasNorm() const { return Xnorm; }
 };
 
 } // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_ARC_ARCSUBTARGET_H