diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -1227,6 +1227,79 @@ return !isWin64Prologue(MF) && MF.needsFrameMoves(); } +namespace { +class FrameBuilder final { + const Function &F; + + MachineFunction &MF; + MachineBasicBlock &MBB; + MachineModuleInfo &MMI; + + const X86Subtarget &STI; + const X86InstrInfo &TII; + + // Indicates if the target uses Windows CFI directives. + bool TargetUsesWinCFI; + + // Indiciates if we are building the frame for a funclet. + bool IsFunclet; + + // Indicates if the frame needs CFI directives to be emitted for FPO. + bool ShouldEmitWinFPO; + + // Indicates if the frame needs CFI directives to be emitted. + bool ShouldEmitWinCFI; + + // The insertion point for the basic block. + MachineBasicBlock::iterator MBBI; + + // The debug location associated with any instruction emitted. This should be + // the unknown value for the prologue as the first debug instruction + // establishes the end of the prologue. + DebugLoc DL; + + // Indicates if the frame has any Windows CFI directives. + bool HasWinCFI = false; + + // NOTE: Temporarily friend the emission function until the entire function is + // migrated to the builder. + friend void X86FrameLowering::emitPrologue(MachineFunction &, + MachineBasicBlock &) const; + +public: + FrameBuilder(MachineFunction &MF, MachineBasicBlock &MBB) + : F(MF.getFunction()), MF(MF), MBB(MBB), MMI(MF.getMMI()), + STI(MF.getSubtarget()), TII(*STI.getInstrInfo()), + MBBI(MBB.begin()) { + TargetUsesWinCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI(); + + IsFunclet = MBB.isEHFuncletEntry(); + + // FIXME: we should emit FPO data for funclets as well. + ShouldEmitWinFPO = + STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag() && !IsFunclet; + + // Emit CFI directives if the the frame needs to support unwinding or if we + // need to emit FPO data. + ShouldEmitWinCFI = + (TargetUsesWinCFI && F.needsUnwindTableEntry()) || ShouldEmitWinFPO; + } + +private: + void EmitWinCFI(unsigned CFI, std::initializer_list Args = {}) { + if (!ShouldEmitWinCFI) + return; + + MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(CFI)); + for (int64_t Imm : Args) + MIB.addImm(Imm); + MIB.setMIFlag(MachineInstr::FrameSetup); + + HasWinCFI = true; + } +}; +} + /// emitPrologue - Push callee-saved registers onto the stack, which /// automatically adjust the stack pointer. Adjust the stack pointer to allocate /// space for local variables. Also emit labels used by the exception handler to @@ -1316,10 +1389,9 @@ MachineBasicBlock &MBB) const { assert(&STI == &MF.getSubtarget() && "MF used frame lowering for wrong subtarget"); - MachineBasicBlock::iterator MBBI = MBB.begin(); + MachineFrameInfo &MFI = MF.getFrameInfo(); const Function &Fn = MF.getFunction(); - MachineModuleInfo &MMI = MF.getMMI(); X86MachineFunctionInfo *X86FI = MF.getInfo(); uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment. uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate. @@ -1332,22 +1404,14 @@ bool IsClrFunclet = IsFunclet && FnHasClrFunclet; bool HasFP = hasFP(MF); bool IsWin64Prologue = isWin64Prologue(MF); - bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry(); - // FIXME: Emit FPO data for EH funclets. - bool NeedsWinFPO = - !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag(); - bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO; bool NeedsDwarfCFI = needsDwarfCFI(MF); Register FramePtr = TRI->getFrameRegister(MF); const Register MachineFramePtr = STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr; Register BasePtr = TRI->getBaseRegister(); - bool HasWinCFI = false; - // Debug location must be unknown since the first debug location is used - // to determine the end of the prologue. - DebugLoc DL; + FrameBuilder FB(MF, MBB); // Add RETADDR move area to callee saved frame size. int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); @@ -1363,7 +1427,7 @@ unsigned StackProbeSize = STI.getTargetLowering()->getStackProbeSize(MF); if (HasFP && X86FI->hasSwiftAsyncContext()) { - BuildMI(MBB, MBBI, DL, TII.get(X86::BTS64ri8), + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::BTS64ri8), MachineFramePtr) .addUse(MachineFramePtr) .addImm(60) @@ -1377,7 +1441,7 @@ Fn.arg_size() == 2) { StackSize += 8; MFI.setStackSize(StackSize); - emitSPUpdate(MBB, MBBI, DL, -8, /*InEpilogue=*/false); + emitSPUpdate(MBB, FB.MBBI, FB.DL, -8, /*InEpilogue=*/false); } // If this is x86-64 and the Red Zone is not disabled, if we are a leaf @@ -1402,7 +1466,7 @@ // applies to tail call optimized functions where the callee argument stack // size is bigger than the callers. if (TailCallReturnAddrDelta < 0) { - BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta, + BuildStackAdjustment(MBB, FB.MBBI, FB.DL, TailCallReturnAddrDelta, /*InEpilogue=*/false) .setMIFlag(MachineInstr::FrameSetup); } @@ -1436,7 +1500,8 @@ // The runtime cares about this. // MOV64mr %rdx, 16(%rsp) unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr; - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16) + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(MOVmr)), StackPtr, true, + 16) .addReg(Establisher) .setMIFlag(MachineInstr::FrameSetup); MBB.addLiveIn(Establisher); @@ -1447,7 +1512,8 @@ // Calculate required stack adjustment. uint64_t FrameSize = StackSize - SlotSize; - // If required, include space for extra hidden slot for stashing base pointer. + // If required, include space for extra hidden slot for stashing base + // pointer. if (X86FI->getRestoreBasePointer()) FrameSize += SlotSize; @@ -1458,29 +1524,24 @@ NumBytes = alignTo(NumBytes, MaxAlign); // Save EBP/RBP into the appropriate stack slot. - BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) - .addReg(MachineFramePtr, RegState::Kill) - .setMIFlag(MachineInstr::FrameSetup); + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) + .addReg(MachineFramePtr, RegState::Kill) + .setMIFlag(MachineInstr::FrameSetup); if (NeedsDwarfCFI) { // Mark the place where EBP/RBP was saved. // Define the current CFA rule to use the provided offset. assert(StackSize); - BuildCFI(MBB, MBBI, DL, + BuildCFI(MBB, FB.MBBI, FB.DL, MCCFIInstruction::cfiDefCfaOffset(nullptr, -2 * stackGrowth)); // Change the rule for the FramePtr to be an "offset" rule. unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true); - BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset( + BuildCFI(MBB, FB.MBBI, FB.DL, MCCFIInstruction::createOffset( nullptr, DwarfFramePtr, 2 * stackGrowth)); } - if (NeedsWinCFI) { - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)) - .addImm(FramePtr) - .setMIFlag(MachineInstr::FrameSetup); - } + FB.EmitWinCFI(X86::SEH_PushReg, {FramePtr}); if (!IsFunclet) { if (X86FI->hasSwiftAsyncContext()) { @@ -1493,32 +1554,27 @@ // We have an initial context in r14, store it just before the frame // pointer. MBB.addLiveIn(X86::R14); - BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r)) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::PUSH64r)) .addReg(X86::R14) .setMIFlag(MachineInstr::FrameSetup); } else { // No initial context, store null so that there's no pointer that // could be misused. - BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64i8)) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::PUSH64i8)) .addImm(0) .setMIFlag(MachineInstr::FrameSetup); } - if (NeedsWinCFI) { - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)) - .addImm(X86::R14) - .setMIFlag(MachineInstr::FrameSetup); - } + FB.EmitWinCFI(X86::SEH_PushReg, {X86::R14}); - BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::LEA64r), FramePtr) .addUse(X86::RSP) .addImm(1) .addUse(X86::NoRegister) .addImm(8) .addUse(X86::NoRegister) .setMIFlag(MachineInstr::FrameSetup); - BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64ri8), X86::RSP) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::SUB64ri8), X86::RSP) .addUse(X86::RSP) .addImm(8) .setMIFlag(MachineInstr::FrameSetup); @@ -1527,7 +1583,7 @@ if (!IsWin64Prologue && !IsFunclet) { // Update EBP with the new base value. if (!X86FI->hasSwiftAsyncContext()) - BuildMI(MBB, MBBI, DL, + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), FramePtr) .addReg(StackPtr) @@ -1538,18 +1594,13 @@ // Define the current CFA to use the EBP/RBP register. unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true); BuildCFI( - MBB, MBBI, DL, + MBB, FB.MBBI, FB.DL, MCCFIInstruction::createDefCfaRegister(nullptr, DwarfFramePtr)); } - if (NeedsWinFPO) { - // .cv_fpo_setframe $FramePtr - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame)) - .addImm(FramePtr) - .addImm(0) - .setMIFlag(MachineInstr::FrameSetup); - } + // .cv_fpo_setframe $FramePtr + if (FB.ShouldEmitWinFPO) + FB.EmitWinCFI(X86::SEH_SetFrame, {FramePtr, 0}); } } } else { @@ -1576,29 +1627,24 @@ bool PushedRegs = false; int StackOffset = 2 * stackGrowth; - while (MBBI != MBB.end() && - MBBI->getFlag(MachineInstr::FrameSetup) && - (MBBI->getOpcode() == X86::PUSH32r || - MBBI->getOpcode() == X86::PUSH64r)) { + while (FB.MBBI != MBB.end() && + FB.MBBI->getFlag(MachineInstr::FrameSetup) && + (FB.MBBI->getOpcode() == X86::PUSH32r || + FB.MBBI->getOpcode() == X86::PUSH64r)) { PushedRegs = true; - Register Reg = MBBI->getOperand(0).getReg(); - ++MBBI; + Register Reg = FB.MBBI->getOperand(0).getReg(); + ++FB.MBBI; if (!HasFP && NeedsDwarfCFI) { // Mark callee-saved push instruction. // Define the current CFA rule to use the provided offset. assert(StackSize); - BuildCFI(MBB, MBBI, DL, + BuildCFI(MBB, FB.MBBI, FB.DL, MCCFIInstruction::cfiDefCfaOffset(nullptr, -StackOffset)); StackOffset += stackGrowth; } - if (NeedsWinCFI) { - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)) - .addImm(Reg) - .setMIFlag(MachineInstr::FrameSetup); - } + FB.EmitWinCFI(X86::SEH_PushReg, {Reg}); } // Realign stack after we pushed callee-saved registers (so that we'll be @@ -1606,20 +1652,14 @@ // Don't do this for Win64, it needs to realign the stack after the prologue. if (!IsWin64Prologue && !IsFunclet && TRI->hasStackRealignment(MF)) { assert(HasFP && "There should be a frame pointer if stack is realigned."); - BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign); - - if (NeedsWinCFI) { - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlign)) - .addImm(MaxAlign) - .setMIFlag(MachineInstr::FrameSetup); - } + BuildStackAlignAND(MBB, FB.MBBI, FB.DL, StackPtr, MaxAlign); + FB.EmitWinCFI(X86::SEH_StackAlign, {static_cast(MaxAlign)}); } // If there is an SUB32ri of ESP immediately before this instruction, merge // the two. This can be the case when tail call elimination is enabled and // the callee has more arguments then the caller. - NumBytes -= mergeSPUpdates(MBB, MBBI, true); + NumBytes -= mergeSPUpdates(MBB, FB.MBBI, true); // Adjust stack pointer: ESP -= numbytes. @@ -1644,14 +1684,14 @@ if (isEAXAlive) { if (Is64Bit) { // Save RAX - BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r)) - .addReg(X86::RAX, RegState::Kill) - .setMIFlag(MachineInstr::FrameSetup); + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::PUSH64r)) + .addReg(X86::RAX, RegState::Kill) + .setMIFlag(MachineInstr::FrameSetup); } else { // Save EAX - BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r)) - .addReg(X86::EAX, RegState::Kill) - .setMIFlag(MachineInstr::FrameSetup); + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::PUSH32r)) + .addReg(X86::EAX, RegState::Kill) + .setMIFlag(MachineInstr::FrameSetup); } } @@ -1660,51 +1700,47 @@ // Function prologue is responsible for adjusting the stack pointer. int64_t Alloc = isEAXAlive ? NumBytes - 8 : NumBytes; if (isUInt<32>(Alloc)) { - BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV32ri), X86::EAX) .addImm(Alloc) .setMIFlag(MachineInstr::FrameSetup); } else if (isInt<32>(Alloc)) { - BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64ri32), X86::RAX) .addImm(Alloc) .setMIFlag(MachineInstr::FrameSetup); } else { - BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64ri), X86::RAX) .addImm(Alloc) .setMIFlag(MachineInstr::FrameSetup); } } else { // Allocate NumBytes-4 bytes on stack in case of isEAXAlive. // We'll also use 4 already allocated bytes for EAX. - BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV32ri), X86::EAX) .addImm(isEAXAlive ? NumBytes - 4 : NumBytes) .setMIFlag(MachineInstr::FrameSetup); } // Call __chkstk, __chkstk_ms, or __alloca. - emitStackProbe(MF, MBB, MBBI, DL, true); + emitStackProbe(MF, MBB, FB.MBBI, FB.DL, true); if (isEAXAlive) { // Restore RAX/EAX MachineInstr *MI; if (Is64Bit) - MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV64rm), X86::RAX), + MI = addRegOffset(BuildMI(MF, FB.DL, TII.get(X86::MOV64rm), X86::RAX), StackPtr, false, NumBytes - 8); else - MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX), + MI = addRegOffset(BuildMI(MF, FB.DL, TII.get(X86::MOV32rm), X86::EAX), StackPtr, false, NumBytes - 4); MI->setFlag(MachineInstr::FrameSetup); - MBB.insert(MBBI, MI); + MBB.insert(FB.MBBI, MI); } } else if (NumBytes) { - emitSPUpdate(MBB, MBBI, DL, -(int64_t)NumBytes, /*InEpilogue=*/false); + emitSPUpdate(MBB, FB.MBBI, FB.DL, -(int64_t)NumBytes, /*InEpilogue=*/false); } - if (NeedsWinCFI && NumBytes) { - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc)) - .addImm(NumBytes) - .setMIFlag(MachineInstr::FrameSetup); - } + if (NumBytes) + FB.EmitWinCFI(X86::SEH_StackAlloc, {static_cast(NumBytes)}); int SEHFrameOffset = 0; unsigned SPOrEstablisher; @@ -1717,15 +1753,16 @@ unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF); MachinePointerInfo NoInfo; MBB.addLiveIn(Establisher); - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher), - Establisher, false, PSPSlotOffset) + addRegOffset( + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64rm), Establisher), + Establisher, false, PSPSlotOffset) .addMemOperand(MF.getMachineMemOperand( NoInfo, MachineMemOperand::MOLoad, SlotSize, Align(SlotSize))); ; // Save the root establisher back into the current funclet's (mostly // empty) frame, in case a sub-funclet or the GC needs it. - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, - false, PSPSlotOffset) + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64mr)), + StackPtr, false, PSPSlotOffset) .addReg(Establisher) .addMemOperand(MF.getMachineMemOperand( NoInfo, @@ -1743,26 +1780,22 @@ // RSP from the parent frame at the end of the prologue. SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes); if (SEHFrameOffset) - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::LEA64r), FramePtr), SPOrEstablisher, false, SEHFrameOffset); else - BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64rr), FramePtr) .addReg(SPOrEstablisher); // If this is not a funclet, emit the CFI describing our frame pointer. - if (NeedsWinCFI && !IsFunclet) { + if (!IsFunclet) { assert(!NeedsWinFPO && "this setframe incompatible with FPO data"); - HasWinCFI = true; - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame)) - .addImm(FramePtr) - .addImm(SEHFrameOffset) - .setMIFlag(MachineInstr::FrameSetup); + FB.EmitWinCFI(X86::SEH_SetFrame, {FramePtr, SEHFrameOffset}); if (isAsynchronousEHPersonality(Personality)) MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset; } } else if (IsFunclet && STI.is32Bit()) { // Reset EBP / ESI to something good for funclets. - MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL); + FB.MBBI = restoreWin32EHStackPointers(MBB, FB.MBBI, FB.DL); // If we're a catch funclet, we can be returned to via catchret. Save ESP // into the registration node so that the runtime will restore it for us. if (!MBB.isCleanupFuncletEntry()) { @@ -1771,43 +1804,36 @@ int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex; int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg).getFixed(); // ESP is the first field, so no extra displacement is needed. - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg, + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV32mr)), FrameReg, false, EHRegOffset) .addReg(X86::ESP); } } - while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) { - const MachineInstr &FrameInstr = *MBBI; - ++MBBI; - - if (NeedsWinCFI) { - int FI; - if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) { - if (X86::FR64RegClass.contains(Reg)) { - int Offset; - Register IgnoredFrameReg; - if (IsWin64Prologue && IsFunclet) - Offset = getWin64EHFrameIndexRef(MF, FI, IgnoredFrameReg); - else - Offset = - getFrameIndexReference(MF, FI, IgnoredFrameReg).getFixed() + - SEHFrameOffset; - - HasWinCFI = true; - assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data"); - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM)) - .addImm(Reg) - .addImm(Offset) - .setMIFlag(MachineInstr::FrameSetup); - } + while (FB.MBBI != MBB.end() && FB.MBBI->getFlag(MachineInstr::FrameSetup)) { + const MachineInstr &FrameInstr = *FB.MBBI; + ++FB.MBBI; + + int FI; + if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) { + if (X86::FR64RegClass.contains(Reg)) { + int Offset; + Register IgnoredFrameReg; + if (IsWin64Prologue && IsFunclet) + Offset = getWin64EHFrameIndexRef(MF, FI, IgnoredFrameReg); + else + Offset = + getFrameIndexReference(MF, FI, IgnoredFrameReg).getFixed() + + SEHFrameOffset; + + assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data"); + FB.EmitWinCFI(X86::SEH_SaveXMM, {Reg, Offset}); } } } - if (NeedsWinCFI && HasWinCFI) - BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue)) - .setMIFlag(MachineInstr::FrameSetup); + if (FB.HasWinCFI) + FB.EmitWinCFI(X86::SEH_EndPrologue); if (FnHasClrFunclet && !IsFunclet) { // Save the so-called Initial-SP (i.e. the value of the stack pointer @@ -1816,7 +1842,7 @@ unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF); auto PSPInfo = MachinePointerInfo::getFixedStack( MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx); - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false, + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::MOV64mr)), StackPtr, false, PSPSlotOffset) .addReg(StackPtr) .addMemOperand(MF.getMachineMemOperand( @@ -1829,7 +1855,7 @@ // Win64 requires aligning the stack after the prologue. if (IsWin64Prologue && TRI->hasStackRealignment(MF)) { assert(HasFP && "There should be a frame pointer if stack is realigned."); - BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign); + BuildStackAlignAND(MBB, FB.MBBI, FB.DL, SPOrEstablisher, MaxAlign); } // We already dealt with stack realignment and funclets above. @@ -1843,14 +1869,14 @@ if (TRI->hasBasePointer(MF)) { // Update the base pointer with the current stack pointer. unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr; - BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(Opc), BasePtr) .addReg(SPOrEstablisher) .setMIFlag(MachineInstr::FrameSetup); if (X86FI->getRestoreBasePointer()) { // Stash value of base pointer. Saving RSP instead of EBP shortens // dependence chain. Used by SjLj EH. unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr; - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(Opm)), FramePtr, true, X86FI->getRestoreBasePointerOffset()) .addReg(SPOrEstablisher) .setMIFlag(MachineInstr::FrameSetup); @@ -1867,7 +1893,7 @@ getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg) .getFixed(); assert(UsedReg == BasePtr); - addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset) + addRegOffset(BuildMI(MBB, FB.MBBI, FB.DL, TII.get(Opm)), UsedReg, true, Offset) .addReg(FramePtr) .setMIFlag(MachineInstr::FrameSetup); } @@ -1879,12 +1905,12 @@ // Define the current CFA rule to use the provided offset. assert(StackSize); BuildCFI( - MBB, MBBI, DL, + MBB, FB.MBBI, FB.DL, MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize - stackGrowth)); } // Emit DWARF info specifying the offsets of the callee-saved registers. - emitCalleeSavedFrameMoves(MBB, MBBI, DL, true); + emitCalleeSavedFrameMoves(MBB, FB.MBBI, FB.DL, true); } // X86 Interrupt handling function cannot assume anything about the direction @@ -1896,11 +1922,11 @@ // 2. Interrupt handling function calls another function. // if (Fn.getCallingConv() == CallingConv::X86_INTR) - BuildMI(MBB, MBBI, DL, TII.get(X86::CLD)) + BuildMI(MBB, FB.MBBI, FB.DL, TII.get(X86::CLD)) .setMIFlag(MachineInstr::FrameSetup); // At this point we know if the function has WinCFI or not. - MF.setHasWinCFI(HasWinCFI); + MF.setHasWinCFI(FB.HasWinCFI); } bool X86FrameLowering::canUseLEAForSPInEpilogue(