diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def --- a/clang/include/clang/Basic/BuiltinsPPC.def +++ b/clang/include/clang/Basic/BuiltinsPPC.def @@ -45,6 +45,21 @@ BUILTIN(__builtin_ppc_dcbtst, "vv*", "") BUILTIN(__builtin_ppc_dcbz, "vv*", "") BUILTIN(__builtin_ppc_icbt, "vv*", "") +BUILTIN(__builtin_ppc_fric, "dd", "") +BUILTIN(__builtin_ppc_frim, "dd", "") +BUILTIN(__builtin_ppc_frims, "ff", "") +BUILTIN(__builtin_ppc_frin, "dd", "") +BUILTIN(__builtin_ppc_frins, "ff", "") +BUILTIN(__builtin_ppc_frip, "dd", "") +BUILTIN(__builtin_ppc_frips, "ff", "") +BUILTIN(__builtin_ppc_friz, "dd", "") +BUILTIN(__builtin_ppc_frizs, "ff", "") +BUILTIN(__builtin_ppc_fsel, "dddd", "") +BUILTIN(__builtin_ppc_fsels, "ffff", "") +BUILTIN(__builtin_ppc_frsqrte, "dd", "") +BUILTIN(__builtin_ppc_frsqrtes, "ff", "") +BUILTIN(__builtin_ppc_fsqrt, "dd", "") +BUILTIN(__builtin_ppc_fsqrts, "ff", "") BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n") diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -367,6 +367,21 @@ Builder.defineMacro("__dcbtst", "__builtin_ppc_dcbtst"); Builder.defineMacro("__dcbz", "__builtin_ppc_dcbz"); Builder.defineMacro("__icbt", "__builtin_ppc_icbt"); + Builder.defineMacro("__fric", "__builtin_ppc_fric"); + Builder.defineMacro("__frim", "__builtin_ppc_frim"); + Builder.defineMacro("__frims", "__builtin_ppc_frims"); + Builder.defineMacro("__frin", "__builtin_ppc_frin"); + Builder.defineMacro("__frins", "__builtin_ppc_frins"); + Builder.defineMacro("__frip", "__builtin_ppc_frip"); + Builder.defineMacro("__frips", "__builtin_ppc_frips"); + Builder.defineMacro("__friz", "__builtin_ppc_friz"); + Builder.defineMacro("__frizs", "__builtin_ppc_frizs"); + Builder.defineMacro("__fsel", "__builtin_ppc_fsel"); + Builder.defineMacro("__fsels", "__builtin_ppc_fsels"); + Builder.defineMacro("__frsqrte", "__builtin_ppc_frsqrte"); + Builder.defineMacro("__frsqrtes", "__builtin_ppc_frsqrtes"); + Builder.defineMacro("__fsqrt", "__builtin_ppc_fsqrt"); + Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts"); } }; diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -15416,6 +15416,41 @@ Value *Call = Builder.CreateCall(F, CallOps); return Builder.CreateAlignedStore(Call, Ops[0], MaybeAlign(64)); } + case PPC::BI__builtin_ppc_fric: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::rint, + Intrinsic::experimental_constrained_rint)) + .getScalarVal(); + case PPC::BI__builtin_ppc_frim: + case PPC::BI__builtin_ppc_frims: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::floor, + Intrinsic::experimental_constrained_floor)) + .getScalarVal(); + case PPC::BI__builtin_ppc_frin: + case PPC::BI__builtin_ppc_frins: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::round, + Intrinsic::experimental_constrained_round)) + .getScalarVal(); + case PPC::BI__builtin_ppc_frip: + case PPC::BI__builtin_ppc_frips: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::ceil, + Intrinsic::experimental_constrained_ceil)) + .getScalarVal(); + case PPC::BI__builtin_ppc_friz: + case PPC::BI__builtin_ppc_frizs: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::trunc, + Intrinsic::experimental_constrained_trunc)) + .getScalarVal(); + case PPC::BI__builtin_ppc_fsqrt: + case PPC::BI__builtin_ppc_fsqrts: + return RValue::get(emitUnaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::sqrt, + Intrinsic::experimental_constrained_sqrt)) + .getScalarVal(); } } diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-fp.c b/clang/test/CodeGen/builtins-ppc-xlcompat-fp.c new file mode 100644 --- /dev/null +++ b/clang/test/CodeGen/builtins-ppc-xlcompat-fp.c @@ -0,0 +1,249 @@ +// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \ +// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \ +// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64-unknown-aix \ +// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s +// RUN: %clang_cc1 -triple powerpc-unknown-aix \ +// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s + +double test_fric(double a) { +// CHECK-LABEL: @test_fric +// CHECK-NEXT: entry: + + return __fric(a); +// CHECK: %2 = call double @llvm.rint.f64(double %1) +} + +double test_frim(double a) { +// CHECK-LABEL: @test_frim +// CHECK-NEXT: entry: + + return __frim(a); +// CHECK: %2 = call double @llvm.floor.f64(double %1) +} + +float test_frims(float a) { +// CHECK-LABEL: @test_frims +// CHECK-NEXT: entry: + + return __frims(a); +// CHECK: %2 = call float @llvm.floor.f32(float %1) +} + +double test_frin(double a) { +// CHECK-LABEL: @test_frin +// CHECK-NEXT: entry: + + return __frin(a); +// CHECK: %2 = call double @llvm.round.f64(double %1) +} + +float test_frins(float a) { +// CHECK-LABEL: @test_frins +// CHECK-NEXT: entry: + + return __frins(a); +// CHECK: %2 = call float @llvm.round.f32(float %1) +} + +double test_frip(double a) { +// CHECK-LABEL: @test_frip +// CHECK-NEXT: entry: + + return __frip(a); +// CHECK: %2 = call double @llvm.ceil.f64(double %1) +} + +float test_frips(float a) { +// CHECK-LABEL: @test_frips +// CHECK-NEXT: entry: + + return __frips(a); +// CHECK: %2 = call float @llvm.ceil.f32(float %1) +} + +double test_friz(double a) { +// CHECK-LABEL: @test_friz +// CHECK-NEXT: entry: + + return __friz(a); +// CHECK: %2 = call double @llvm.trunc.f64(double %1) +} + +float test_frizs(float a) { +// CHECK-LABEL: @test_frizs +// CHECK-NEXT: entry: + + return __frizs(a); +// CHECK: %2 = call float @llvm.trunc.f32(float %1) +} + +double test_fsel(double a, double b, double c) { +// CHECK-LABEL: @test_fsel +// CHECK-NEXT: entry: + + return __fsel(a, b, c); +// CHECK: %3 = call double @llvm.ppc.fsel(double %0, double %1, double %2) +} + +float test_fsels(float a, float b, float c) { +// CHECK-LABEL: @test_fsels +// CHECK-NEXT: entry: + + return __fsels(a, b, c); +// CHECK: %3 = call float @llvm.ppc.fsels(float %0, float %1, float %2) +} + +double test_frsqrte(double a) { +// CHECK-LABEL: @test_frsqrte +// CHECK-NEXT: entry: + + return __frsqrte(a); +// CHECK: %1 = call double @llvm.ppc.frsqrte(double %0) +} + +float test_frsqrtes(float a) { +// CHECK-LABEL: @test_frsqrtes +// CHECK-NEXT: entry: + + return __frsqrtes(a); +// CHECK: %1 = call float @llvm.ppc.frsqrtes(float %0) +} + +double test_fsqrt(double a) { +// CHECK-LABEL: @test_fsqrt +// CHECK-NEXT: entry: + + return __fsqrt(a); +// CHECK: %2 = call double @llvm.sqrt.f64(double %1) +} + +float test_fsqrts(float a) { +// CHECK-LABEL: @test_fsqrts +// CHECK-NEXT: entry: + + return __fsqrts(a); +// CHECK: %2 = call float @llvm.sqrt.f32(float %1) +} + +double test_builtin_ppc_fric(double a) { +// CHECK-LABEL: @test_builtin_ppc_fric +// CHECK-NEXT: entry: + + return __builtin_ppc_fric(a); +// CHECK: %2 = call double @llvm.rint.f64(double %1) +} + +double test_builtin_ppc_frim(double a) { +// CHECK-LABEL: @test_builtin_ppc_frim +// CHECK-NEXT: entry: + + return __builtin_ppc_frim(a); +// CHECK: %2 = call double @llvm.floor.f64(double %1) +} + +float test_builtin_ppc_frims(float a) { +// CHECK-LABEL: @test_builtin_ppc_frims +// CHECK-NEXT: entry: + + return __builtin_ppc_frims(a); +// CHECK: %2 = call float @llvm.floor.f32(float %1) +} + +double test_builtin_ppc_frin(double a) { +// CHECK-LABEL: @test_builtin_ppc_frin +// CHECK-NEXT: entry: + + return __builtin_ppc_frin(a); +// CHECK: %2 = call double @llvm.round.f64(double %1) +} + +float test_builtin_ppc_frins(float a) { +// CHECK-LABEL: @test_builtin_ppc_frins +// CHECK-NEXT: entry: + + return __builtin_ppc_frins(a); +// CHECK: %2 = call float @llvm.round.f32(float %1) +} + +double test_builtin_ppc_frip(double a) { +// CHECK-LABEL: @test_builtin_ppc_frip +// CHECK-NEXT: entry: + + return __builtin_ppc_frip(a); +// CHECK: %2 = call double @llvm.ceil.f64(double %1) +} + +float test_builtin_ppc_frips(float a) { +// CHECK-LABEL: @test_builtin_ppc_frips +// CHECK-NEXT: entry: + + return __builtin_ppc_frips(a); +// CHECK: %2 = call float @llvm.ceil.f32(float %1) +} + +double test_builtin_ppc_friz(double a) { +// CHECK-LABEL: @test_builtin_ppc_friz +// CHECK-NEXT: entry: + + return __builtin_ppc_friz(a); +// CHECK: %2 = call double @llvm.trunc.f64(double %1) +} + +float test_builtin_ppc_frizs(float a) { +// CHECK-LABEL: @test_builtin_ppc_frizs +// CHECK-NEXT: entry: + + return __builtin_ppc_frizs(a); +// CHECK: %2 = call float @llvm.trunc.f32(float %1) +} + +double test_builtin_ppc_fsel(double a, double b, double c) { +// CHECK-LABEL: @test_builtin_ppc_fsel +// CHECK-NEXT: entry: + + return __builtin_ppc_fsel(a, b, c); +// CHECK: %3 = call double @llvm.ppc.fsel(double %0, double %1, double %2) +} + +float test_builtin_ppc_fsels(float a, float b, float c) { +// CHECK-LABEL: @test_builtin_ppc_fsels +// CHECK-NEXT: entry: + + return __builtin_ppc_fsels(a, b, c); +// CHECK: %3 = call float @llvm.ppc.fsels(float %0, float %1, float %2) +} + +double test_builtin_ppc_frsqrte(double a) { +// CHECK-LABEL: @test_builtin_ppc_frsqrte +// CHECK-NEXT: entry: + + return __builtin_ppc_frsqrte(a); +// CHECK: %1 = call double @llvm.ppc.frsqrte(double %0) +} + +float test_builtin_ppc_frsqrtes(float a) { +// CHECK-LABEL: @test_builtin_ppc_frsqrtes +// CHECK-NEXT: entry: + + return __builtin_ppc_frsqrtes(a); +// CHECK: %1 = call float @llvm.ppc.frsqrtes(float %0) +} + +double test_builtin_ppc_fsqrt(double a) { +// CHECK-LABEL: @test_builtin_ppc_fsqrt +// CHECK-NEXT: entry: + + return __builtin_ppc_fsqrt(a); +// CHECK: %2 = call double @llvm.sqrt.f64(double %1) +} + +float test_builtin_ppc_fsqrts(float a) { +// CHECK-LABEL: @test_builtin_ppc_fsqrts +// CHECK-NEXT: entry: + + return __builtin_ppc_fsqrts(a); +// CHECK: %2 = call float @llvm.sqrt.f32(float %1) +} + diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -1523,5 +1523,16 @@ Intrinsic<[],[],[]>; def int_ppc_iospace_eieio : GCCBuiltin<"__builtin_ppc_iospace_eieio">, Intrinsic<[],[],[]>; + + def int_ppc_fsel : GCCBuiltin<"__builtin_ppc_fsel">, + Intrinsic<[llvm_double_ty], [llvm_double_ty, + llvm_double_ty, llvm_double_ty], [IntrNoMem]>; + def int_ppc_fsels : GCCBuiltin<"__builtin_ppc_fsels">, + Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, + llvm_float_ty], [IntrNoMem]>; + def int_ppc_frsqrte : GCCBuiltin<"__builtin_ppc_frsqrte">, + Intrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>; + def int_ppc_frsqrtes : GCCBuiltin<"__builtin_ppc_frsqrtes">, + Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>; } diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -4987,6 +4987,13 @@ break; case ISD::INTRINSIC_WO_CHAIN: { + + if (N->getConstantOperandVal(0) == Intrinsic::ppc_fsels) { + SDValue ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3)}; + CurDAG->SelectNodeTo(N, PPC::FSELS, MVT::f32, ops); + return; + } + if (!Subtarget->isISA3_1()) break; unsigned Opcode = 0; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -4382,6 +4382,10 @@ def : Pat<(i1 (not (trunc i64:$in))), (ANDI_rec_1_EQ_BIT8 $in)>; +def : Pat<(int_ppc_fsel f8rc:$FRA, f8rc:$FRC, f8rc:$FRB), (FSELD $FRA, $FRC, $FRB)>; +def : Pat<(int_ppc_frsqrte f8rc:$frB), (FRSQRTE $frB)>; +def : Pat<(int_ppc_frsqrtes f4rc:$frB), (FRSQRTES $frB)>; + //===----------------------------------------------------------------------===// // PowerPC Instructions used for assembler/disassembler only // diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -2850,6 +2850,8 @@ def : Pat<(v2i64 (PPCvcmp_rec v2i64:$vA, v2i64:$vB, 199)), (VCMPGTUB_rec DblwdCmp.MRGEQ, (v2i64 (XXLXORz)))>; } // AddedComplexity = 0 + +def : Pat<(int_ppc_frsqrte vsfrc:$XB), (XSRSQRTEDP $XB)>; } // HasVSX // Any big endian VSX subtarget. @@ -3240,6 +3242,8 @@ (v8i16 (COPY_TO_REGCLASS(XXLEQVOnes), VSRC))>; def : Pat<(v16i8 (bitconvert (v16i8 immAllOnesV))), (v16i8 (COPY_TO_REGCLASS(XXLEQVOnes), VSRC))>; + +def : Pat<(int_ppc_frsqrtes vssrc:$XB), (XSRSQRTESP $XB)>; } // HasVSX, HasP8Vector // Any big endian Power8 VSX subtarget. diff --git a/llvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll b/llvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/builtins-ppc-xlcompat-fp.ll @@ -0,0 +1,92 @@ +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \ +; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-PWR7 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \ +; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-PWR8 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ +; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-PWR7 +; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \ +; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-PWR7 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \ +; RUN: -mattr=-vsx -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-NOVSX +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \ +; RUN: -mattr=-vsx -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-NOVSX +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ +; RUN: -mattr=-vsx -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-NOVSX +; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \ +; RUN: -mattr=-vsx -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-NOVSX + +define dso_local double @test_fsel(double %a, double %b, double %c) local_unnamed_addr #0 { +; CHECK-PWR7-LABEL: test_fsel +; CHECK-PWR8-LABEL: test_fsel +; CHECK-NOVSX-LABEL: test_fsel + +entry: + %0 = tail call double @llvm.ppc.fsel(double %a, double %b, double %c) +; CHECK-PWR7: fsel 1, 1, 2, 3 +; CHECK-PWR8: fsel 1, 1, 2, 3 +; CHECK-NOVSX: fsel 1, 1, 2, 3 + + ret double %0 +; CHECK-PWR7: blr +; CHECK-PWR8: blr +; CHECK-NOVSX: blr +} + +declare double @llvm.ppc.fsel(double, double, double) #2 + +define dso_local float @test_fsels(float %a, float %b, float %c) local_unnamed_addr #0 { +; CHECK-PWR7-LABEL: test_fsels +; CHECK-PWR8-LABEL: test_fsels +; CHECK-NOVSX-LABEL: test_fsels + +entry: + %0 = tail call float @llvm.ppc.fsels(float %a, float %b, float %c) +; CHECK-PWR7: fsel 1, 1, 2, 3 +; CHECK-PWR8: fsel 1, 1, 2, 3 +; CHECK-NOVSX: fsel 1, 1, 2, 3 + + ret float %0 +; CHECK-PWR7: blr +; CHECK-PWR8: blr +; CHECK-NOVSX: blr +} + +declare float @llvm.ppc.fsels(float, float, float) #2 + +define dso_local double @test_frsqrte(double %a) local_unnamed_addr #0 { +; CHECK-PWR7-LABEL: test_frsqrte +; CHECK-PWR8-LABEL: test_frsqrte +; CHECK-NOVSX-LABEL: test_frsqrte + +entry: + %0 = tail call double @llvm.ppc.frsqrte(double %a) +; CHECK-PWR7: xsrsqrtedp 1, 1 +; CHECK-PWR8: xsrsqrtedp 1, 1 +; CHECK-NOVSX: frsqrte 1, 1 + + ret double %0 +; CHECK-PWR7: blr +; CHECK-PWR8: blr +; CHECK-NOVSX: blr +} + +declare double @llvm.ppc.frsqrte(double) #2 + +define dso_local float @test_frsqrtes(float %a) local_unnamed_addr #0 { +; CHECK-PWR7-LABEL: test_frsqrtes +; CHECK-PWR8-LABEL: test_frsqrtes +; CHECK-NOVSX-LABEL: test_frsqrtes + +entry: + %0 = tail call float @llvm.ppc.frsqrtes(float %a) +; CHECK-PWR7: frsqrtes 1, 1 +; CHECK-PWR8: xsrsqrtesp 1, 1 +; CHECK-NOVSX: frsqrtes 1, 1 + + ret float %0 +; CHECK-PWR7: blr +; CHECK-PWR8: blr +; CHECK-NOVSX: blr +} + +declare float @llvm.ppc.frsqrtes(float) #2