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[MIPS] Emulation of MIPS64 floating-point branch instructions
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Authored by jaydeep on Jun 9 2015, 11:04 PM.

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Summary
  1. Added emulation of MIPS64 floating-point branch instructions
  2. Updated GetRegisterInfo to recognize floating-point registers
  3. Provided CPU information while creating createMCSubtargetInfo in disassembler
  4. Bug fix in emulation of JIC and JIALC
  5. Correct identification of breakpoint when set in a delay slot of a branch instruction

Diff Detail

Repository
rL LLVM

Event Timeline

jaydeep updated this revision to Diff 27427.Jun 9 2015, 11:04 PM
jaydeep retitled this revision from to [MIPS] Emulation of MIPS64 floating-point branch instructions.
jaydeep updated this object.
jaydeep edited the test plan for this revision. (Show Details)
jaydeep added a reviewer: clayborg.
jaydeep set the repository for this revision to rL LLVM.
jaydeep added subscribers: Unknown Object (MLST), slthakur, mohit.bhakkad and 2 others.

Hi clayborg,

Could you please find some time to review this patch?

Thanks,
Jaydeep

clayborg requested changes to this revision.Jun 15 2015, 3:58 PM
clayborg edited edge metadata.
clayborg added inline comments.
source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
640 ↗(On Diff #27427)

Initialize this with "" for now and then remove the setting to "" in the default. Just in case someone later adds code and doesn't set cpu to something.

source/Plugins/Process/Linux/NativeProcessLinux.cpp
3487–3505 ↗(On Diff #27427)

This should probably be moved somewhere more generic so that this code doesn't get duplicated for each process plug-in.

This revision now requires changes to proceed.Jun 15 2015, 3:58 PM

Thanks for the comments.

source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
640 ↗(On Diff #27427)

We would still need cpu = "" in the default case to avoid -Wswitch warning.

source/Plugins/Process/Linux/NativeProcessLinux.cpp
3487–3505 ↗(On Diff #27427)

We will remove it from this patch and submit a separate patch.

jaydeep updated this revision to Diff 27752.Jun 16 2015, 1:14 AM
jaydeep edited edge metadata.

Addressed review comments

clayborg requested changes to this revision.Jun 16 2015, 2:14 PM
clayborg edited edge metadata.
clayborg added inline comments.
source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
640–678 ↗(On Diff #27752)

Is CPU needed here? We are passing the triple which should contain the CPU name right? Why do we need "cpu" here as a separate thing?

This revision now requires changes to proceed.Jun 16 2015, 2:14 PM
jaydeep added inline comments.Jun 16 2015, 8:59 PM
source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
640–678 ↗(On Diff #27752)

The triple does not contain MIPS ISA revision (like r2, r3, r5, r6 etc.) which is required for disassembly.

clayborg accepted this revision.Jun 17 2015, 10:09 AM
clayborg edited edge metadata.

Ok, thanks for the explanation. Looks good then.

This revision is now accepted and ready to land.Jun 17 2015, 10:09 AM
This revision was automatically updated to reflect the committed changes.