diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -846,6 +846,10 @@
           "This pseudo should only be selected for 32-bit small code model.");
       Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
       TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
+
+      // Print MO for better readability
+      if (isVerbose())
+        OutStreamer->GetCommentOS() << MO << '\n';
       EmitToStreamer(*OutStreamer, TmpInst);
       return;
     }
@@ -912,6 +916,10 @@
     const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, VKExpr, OutContext);
     TmpInst.getOperand(1) = MCOperand::createExpr(
         IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp);
+
+    // Print MO for better readability
+    if (isVerbose() && IsAIX)
+      OutStreamer->GetCommentOS() << MO << '\n';
     EmitToStreamer(*OutStreamer, TmpInst);
     return;
   }
diff --git a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
--- a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
+++ b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
@@ -28,27 +28,27 @@
 print("}")
 
 # 32-bit assembly check
-# ASM32:  lwz 4, L..C0(2)
-# ASM32:  lwz 4, L..C1(2)
+# ASM32:  lwz 4, L..C0(2) # @a0
+# ASM32:  lwz 4, L..C1(2) # @a1
 
-# ASM32:  lwz 4, L..C8191(2)
-# ASM32:  lwz 4, L..C8192-65536(2)
-# ASM32:  lwz 4, L..C8193-65536(2)
+# ASM32:  lwz 4, L..C8191(2) # @a8191
+# ASM32:  lwz 4, L..C8192-65536(2) # @a8192
+# ASM32:  lwz 4, L..C8193-65536(2) # @a8193
 
-# ASM32:  lwz 4, L..C12288-65536(2)
-# ASM32:  lwz 4, L..C12289-65536(2)
+# ASM32:  lwz 4, L..C12288-65536(2) # @a12288
+# ASM32:  lwz 4, L..C12289-65536(2) # @a12289
 
 # 64-bit assembly check
-# ASM64:  ld 4, L..C0(2)
-# ASM64:  ld 4, L..C1(2)
+# ASM64:  ld 4, L..C0(2) # @a0
+# ASM64:  ld 4, L..C1(2) # @a1
 
-# ASM64:  ld 4, L..C4095(2)
-# ASM64:  ld 4, L..C4096-65536(2)
-# ASM64:  ld 4, L..C4097-65536(2)
+# ASM64:  ld 4, L..C4095(2) # @a4095
+# ASM64:  ld 4, L..C4096-65536(2) # @a4096
+# ASM64:  ld 4, L..C4097-65536(2) # @a4097
 
-# ASM64:  ld 4, L..C12287-65536(2)
-# ASM64:  ld 4, L..C12288-131072(2)
-# ASM64:  ld 4, L..C12289-131072(2)
+# ASM64:  ld 4, L..C12287-65536(2) # @a12287
+# ASM64:  ld 4, L..C12288-131072(2) # @a12288
+# ASM64:  ld 4, L..C12289-131072(2) # @a12289
 
 # DIS32:   0: 80 82 00 00   lwz 4, 0(2)
 # DIS32:  00000002:  R_TOC  (idx: 24591) a0[TC]