diff --git a/llvm/test/CodeGen/RISCV/subtarget-features-obj-bug.ll b/llvm/test/CodeGen/RISCV/subtarget-features-obj-bug.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/subtarget-features-obj-bug.ll
@@ -0,0 +1,19 @@
+; RUN: llc -o - < %s | FileCheck %s
+; RUN: llc --filetype=obj -o - < %s | llvm-readelf -A - \
+; RUN:   | FileCheck %s -check-prefix=ATTRIBUTE
+
+; ATTRIBUTE: TagName: arch
+; ATTRIBUTE: Value: rv64i2p0
+
+target triple = "riscv64-unknown-linux-gnu"
+
+; ASM includes F standard extension instructions but arch attribute information is only RV64I base instructions
+
+define float @foo1(i32 %a) nounwind #0 {
+; CHECK: fcvt.s.w        ft0, a0
+; CHECK: fmv.x.w a0, ft0
+  %conv = sitofp i32 %a to float
+  ret float %conv
+}
+
+attributes #0 = { "target-features"="+64bit,+a,+c,+d,+f,+m"}