diff --git a/llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h b/llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h --- a/llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h +++ b/llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h @@ -55,6 +55,14 @@ } // end namespace slpvectorizer +struct SLPVectorizerResult { + bool MadeAnyChange; + bool MadeCFGChange; + + SLPVectorizerResult(bool MadeAnyChange, bool MadeCFGChange) + : MadeAnyChange(MadeAnyChange), MadeCFGChange(MadeCFGChange) {} +}; + struct SLPVectorizerPass : public PassInfoMixin { using StoreList = SmallVector; using StoreListMap = MapVector; @@ -75,10 +83,12 @@ PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); // Glue for old PM. - bool runImpl(Function &F, ScalarEvolution *SE_, TargetTransformInfo *TTI_, - TargetLibraryInfo *TLI_, AAResults *AA_, LoopInfo *LI_, - DominatorTree *DT_, AssumptionCache *AC_, DemandedBits *DB_, - OptimizationRemarkEmitter *ORE_); + SLPVectorizerResult runImpl(Function &F, ScalarEvolution *SE_, + TargetTransformInfo *TTI_, + TargetLibraryInfo *TLI_, AAResults *AA_, + LoopInfo *LI_, DominatorTree *DT_, + AssumptionCache *AC_, DemandedBits *DB_, + OptimizationRemarkEmitter *ORE_); private: /// Collect store and getelementptr instructions and organize them @@ -137,6 +147,11 @@ bool vectorizeStores(ArrayRef Stores, slpvectorizer::BoUpSLP &R); + SLPVectorizerResult + vectorizeBlockWithVersioning(BasicBlock *BB, + const SmallPtrSetImpl &TrackedObjects, + slpvectorizer::BoUpSLP &R); + /// The store instructions in a basic block organized by base pointer. StoreListMap Stores; diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -35,6 +35,7 @@ #include "llvm/Analysis/AssumptionCache.h" #include "llvm/Analysis/CodeMetrics.h" #include "llvm/Analysis/DemandedBits.h" +#include "llvm/Analysis/DomTreeUpdater.h" #include "llvm/Analysis/GlobalsModRef.h" #include "llvm/Analysis/IVDescriptors.h" #include "llvm/Analysis/LoopAccessAnalysis.h" @@ -62,6 +63,7 @@ #include "llvm/IR/Instructions.h" #include "llvm/IR/IntrinsicInst.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/MDBuilder.h" #include "llvm/IR/Module.h" #include "llvm/IR/NoFolder.h" #include "llvm/IR/Operator.h" @@ -85,8 +87,11 @@ #include "llvm/Support/KnownBits.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Transforms/Utils/BasicBlockUtils.h" +#include "llvm/Transforms/Utils/Cloning.h" #include "llvm/Transforms/Utils/InjectTLIMappings.h" #include "llvm/Transforms/Utils/LoopUtils.h" +#include "llvm/Transforms/Utils/ScalarEvolutionExpander.h" #include "llvm/Transforms/Vectorize.h" #include #include @@ -107,6 +112,10 @@ #define DEBUG_TYPE "SLP" STATISTIC(NumVectorInstructions, "Number of vector instructions generated"); +STATISTIC(NumVersioningSuccessful, + "Number of times versioning was tried and beneficial"); +STATISTIC(NumVersioningFailed, + "Number of times versioning was tried but was not beneficial"); cl::opt RunSLPVectorization("vectorize-slp", cl::init(true), cl::Hidden, cl::desc("Run the SLP vectorization passes")); @@ -175,6 +184,10 @@ ViewSLPTree("view-slp-tree", cl::Hidden, cl::desc("Display the SLP trees with Graphviz")); +static cl::opt EnableMemoryVersioning( + "slp-memory-versioning", cl::init(false), cl::Hidden, + cl::desc("Enable memory versioning for SLP vectorization.")); + // Limit the number of alias checks. The limit is chosen so that // it has no negative effect on the llvm benchmarks. static const unsigned AliasedCheckLimit = 10; @@ -581,6 +594,34 @@ return Index; } +static Optional> +getObject(Instruction &I, ScalarEvolution &SE, DominatorTree &DT) { + BasicBlock *BB = I.getParent(); + auto GetPtr = [](Instruction *I) -> Value * { + if (auto *L = dyn_cast(I)) { + if (!L->getType()->isVectorTy()) + return L->getPointerOperand(); + } + if (auto *S = dyn_cast(I)) + if (!S->getValueOperand()->getType()->isVectorTy()) + return S->getPointerOperand(); + return nullptr; + }; + auto *Ptr = GetPtr(&I); + if (!Ptr) + return None; + Value *Obj = getUnderlyingObject(Ptr); + if (!Obj) + return None; + auto *Start = SE.getSCEV(Ptr); + + PHINode *PN = dyn_cast(Obj); + if (!SE.properlyDominates(Start, BB) && + !(PN && DT.dominates(PN->getParent(), BB))) + return None; + return {{Obj, Start}}; +} + namespace slpvectorizer { /// Bottom Up SLP Vectorizer. @@ -589,6 +630,16 @@ struct ScheduleData; public: + // Map of objects to start & end pointers we need to generate runtime checks + // for. + SmallPtrSet TrackedObjects; + /// Cache for alias results. + /// TODO: consider moving this to the AliasAnalysis itself. + using AliasCacheKey = std::pair; + DenseMap> AliasCache; + + bool CollectMemAccess = false; + using ValueList = SmallVector; using InstrList = SmallVector; using ValueSet = SmallPtrSet; @@ -667,6 +718,7 @@ } MinBWs.clear(); InstrElementSize.clear(); + TrackedObjects.clear(); } unsigned getTreeSize() const { return VectorizableTree.size(); } @@ -772,6 +824,24 @@ "All indices must be initialized"); } + void removeDeletedInstructions() { + for (const auto &Pair : DeletedInstructions) { + // Replace operands of ignored instructions with Undefs in case if they + // were marked for deletion. + if (Pair.getSecond()) { + Value *Undef = UndefValue::get(Pair.getFirst()->getType()); + Pair.getFirst()->replaceAllUsesWith(Undef); + } + Pair.getFirst()->dropAllReferences(); + } + for (const auto &Pair : DeletedInstructions) { + assert(Pair.getFirst()->use_empty() && + "trying to erase instruction with users."); + Pair.getFirst()->eraseFromParent(); + } + DeletedInstructions.clear(); + } + /// \return The vector element size in bits to use when vectorizing the /// expression tree ending at \p V. If V is a store, the size is the width of /// the stored value. Otherwise, the size is the width of the largest loaded @@ -1976,11 +2046,6 @@ return aliased; } - using AliasCacheKey = std::pair; - - /// Cache for alias results. - /// TODO: consider moving this to the AliasAnalysis itself. - DenseMap> AliasCache; /// Removes an instruction from its block and eventually deletes it. /// It's like Instruction::eraseFromParent() except that the actual deletion @@ -2565,27 +2630,7 @@ } // end namespace llvm -BoUpSLP::~BoUpSLP() { - for (const auto &Pair : DeletedInstructions) { - // Replace operands of ignored instructions with Undefs in case if they were - // marked for deletion. - if (Pair.getSecond()) { - Value *Undef = UndefValue::get(Pair.getFirst()->getType()); - Pair.getFirst()->replaceAllUsesWith(Undef); - } - Pair.getFirst()->dropAllReferences(); - } - for (const auto &Pair : DeletedInstructions) { - assert(Pair.getFirst()->use_empty() && - "trying to erase instruction with users."); - Pair.getFirst()->eraseFromParent(); - } -#ifdef EXPENSIVE_CHECKS - // If we could guarantee that this call is not extremely slow, we could - // remove the ifdef limitation (see PR47712). - assert(!verifyFunction(*F, &dbgs())); -#endif -} +BoUpSLP::~BoUpSLP() { removeDeletedInstructions(); } void BoUpSLP::eraseInstructions(ArrayRef AV) { for (auto *V : AV) { @@ -6242,6 +6287,7 @@ while (DepDest) { assert(isInSchedulingRegion(DepDest)); + ScheduleData *DestBundle = DepDest->FirstInBundle; // We have two limits to reduce the complexity: // 1) AliasedCheckLimit: It's a small limit to reduce calls to // SLP->isAliased (which is the expensive part in this loop). @@ -6259,9 +6305,37 @@ // balance between reduced runtime and accurate dependencies. numAliased++; + // If this bundle is not scheduled and no versioned code has been + // generated yet, try to collect the bounds of the accesses to + // generate runtime checks. + if (!DestBundle->IsScheduled && SLP->CollectMemAccess) { + // FIXME Naming + auto GetPtr = [](Instruction *I) -> Value * { + if (auto *L = dyn_cast(I)) + return L->getPointerOperand(); + if (auto *S = dyn_cast(I)) + return S->getPointerOperand(); + return nullptr; + }; + auto *Src = GetPtr(SrcInst); + auto *Dst = GetPtr(DepDest->Inst); + + if (SrcInst->getParent() == DepDest->Inst->getParent() && Src && + Dst) { + auto SrcObjAndPtr = getObject(*SrcInst, *SLP->SE, *SLP->DT); + auto DstObjAndPtr = + getObject(*DepDest->Inst, *SLP->SE, *SLP->DT); + if (!SrcObjAndPtr || !DstObjAndPtr || + SrcObjAndPtr->first == DstObjAndPtr->first) + SLP->TrackedObjects.clear(); + else { + SLP->TrackedObjects.insert(SrcObjAndPtr->first); + SLP->TrackedObjects.insert(DstObjAndPtr->first); + } + } + } DepDest->MemoryDependencies.push_back(BundleMember); BundleMember->Dependencies++; - ScheduleData *DestBundle = DepDest->FirstInBundle; if (!DestBundle->IsScheduled) { BundleMember->incrementUnscheduledDeps(1); } @@ -6701,7 +6775,7 @@ auto *DB = &getAnalysis().getDemandedBits(); auto *ORE = &getAnalysis().getORE(); - return Impl.runImpl(F, SE, TTI, TLI, AA, LI, DT, AC, DB, ORE); + return Impl.runImpl(F, SE, TTI, TLI, AA, LI, DT, AC, DB, ORE).MadeAnyChange; } void getAnalysisUsage(AnalysisUsage &AU) const override { @@ -6719,7 +6793,8 @@ AU.addPreserved(); AU.addPreserved(); AU.addPreserved(); - AU.setPreservesCFG(); + if (!EnableMemoryVersioning) + AU.setPreservesCFG(); } }; @@ -6736,23 +6811,286 @@ auto *DB = &AM.getResult(F); auto *ORE = &AM.getResult(F); - bool Changed = runImpl(F, SE, TTI, TLI, AA, LI, DT, AC, DB, ORE); - if (!Changed) + auto Result = runImpl(F, SE, TTI, TLI, AA, LI, DT, AC, DB, ORE); + if (!Result.MadeAnyChange) return PreservedAnalyses::all(); PreservedAnalyses PA; - PA.preserveSet(); + if (!Result.MadeCFGChange) + PA.preserveSet(); + PA.preserve(); + PA.preserve(); return PA; } -bool SLPVectorizerPass::runImpl(Function &F, ScalarEvolution *SE_, - TargetTransformInfo *TTI_, - TargetLibraryInfo *TLI_, AAResults *AA_, - LoopInfo *LI_, DominatorTree *DT_, - AssumptionCache *AC_, DemandedBits *DB_, - OptimizationRemarkEmitter *ORE_) { +SLPVectorizerResult SLPVectorizerPass::vectorizeBlockWithVersioning( + BasicBlock *BB, const SmallPtrSetImpl &TrackedObjects, + slpvectorizer::BoUpSLP &R) { + bool Changed = false; + bool CFGChanged = false; + R.AliasCache.clear(); + + // First, clean up delete instructions, so they are not re-used during SCEV + // expansion. + R.removeDeletedInstructions(); + + // Collect up-to-date memory bounds for tracked objects. Also collect the + // first and last memory instruction using a tracked object. + MapVector MemBounds; + Instruction *FirstTrackedInst = nullptr; + Instruction *LastTrackedInst = nullptr; + for (Instruction &I : *BB) { + auto ObjAndStart = getObject(I, *SE, *DT); + if (!ObjAndStart) + continue; + auto *Obj = ObjAndStart->first; + const auto *Start = ObjAndStart->second; + + unsigned AS = Obj->getType()->getPointerAddressSpace(); + // Runtime checks are generated to ensure this property holds. + auto *End = + SE->getAddExpr(Start, SE->getOne(Obj->getType()), SCEV::FlagNUW); + if (TrackedObjects.find(Obj) != TrackedObjects.end()) + MemBounds.insert({Obj, {0, Start, End, AS}}); + auto BoundsIter = MemBounds.find(Obj); + if (BoundsIter == MemBounds.end()) + continue; + BoundsIter->second.addPointer(0, Start, End, AS, *SE); + if (!FirstTrackedInst) + FirstTrackedInst = &I; + LastTrackedInst = &I; + } + + // Not enough memory access bounds for runtime checks. + if (MemBounds.size() < 2) + return {Changed, CFGChanged}; + + // Check if all uses between the first and last tracked instruction are inside + // the region. If that is not the case, PHIs would need to be added when + // duplicating the block. + auto AllUsesInside = [FirstTrackedInst, LastTrackedInst](BasicBlock *BB) { + return all_of(make_range(FirstTrackedInst->getIterator(), + std::next(LastTrackedInst->getIterator())), + [LastTrackedInst, BB](Instruction &I) { + return all_of(I.users(), [LastTrackedInst, BB](User *U) { + if (auto *UserI = dyn_cast(U)) + return UserI->getParent() == BB && + (UserI->comesBefore(LastTrackedInst) || + UserI == LastTrackedInst); + return true; + }); + }); + }; + if (!AllUsesInside(BB)) + return {Changed, CFGChanged}; + + SmallVector BoundGroups; + for (auto &B : MemBounds) + BoundGroups.emplace_back(&B.second); + + // Create a RuntimePointerCheck for all groups in BoundGroups. + SmallVector PointerChecks; + for (unsigned I = 0, E = BoundGroups.size(); I != E; ++I) + for (unsigned J = I + 1; J != E; ++J) + PointerChecks.emplace_back(&*BoundGroups[I], &*BoundGroups[J]); + + // Duplicate BB now and set up block and branches for memory checks. + std::string OriginalBBName = BB->getName().str(); + IRBuilder<> ChkBuilder(BB->getFirstNonPHI()); + DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Eager); + + BasicBlock *Tail = nullptr; + if (LastTrackedInst->getNextNode() != BB->getTerminator()) + Tail = SplitBlock(BB, LastTrackedInst->getNextNode(), &DTU, LI, nullptr, + OriginalBBName + ".tail"); + auto *CheckBlock = BB; + BB = SplitBlock(BB, FirstTrackedInst, &DTU, LI, nullptr, + OriginalBBName + ".slpmemcheck"); + for (Use &U : make_early_inc_range(BB->uses())) { + BasicBlock *UserBB = cast(U.getUser())->getParent(); + if (UserBB == CheckBlock) + continue; + + U.set(CheckBlock); + DTU.applyUpdates({{DT->Delete, UserBB, BB}}); + DTU.applyUpdates({{DT->Insert, UserBB, CheckBlock}}); + } + CFGChanged = true; + + auto *MergeBlock = BB; + BasicBlock *ScalarBB = + splitBlockBefore(BB, BB->getTerminator(), &DTU, LI, nullptr, + OriginalBBName + ".slpversioned"); + + ValueToValueMapTy VMap; + BasicBlock *VectorBB = CloneBasicBlock(ScalarBB, VMap, "", BB->getParent()); + ScalarBB->setName(OriginalBBName + ".scalar"); + MergeBlock->setName(OriginalBBName + ".merge"); + SmallVector Tmp; + Tmp.push_back(VectorBB); + remapInstructionsInBlocks(Tmp, VMap); + auto *Term = CheckBlock->getTerminator(); + ChkBuilder.SetInsertPoint(CheckBlock->getTerminator()); + ChkBuilder.CreateCondBr(ChkBuilder.getTrue(), ScalarBB, VectorBB); + Term->eraseFromParent(); + DTU.applyUpdates({{DT->Insert, CheckBlock, VectorBB}}); + if (auto *L = LI->getLoopFor(CheckBlock)) + L->addBasicBlockToLoop(VectorBB, *LI); + Changed = true; + + // Add !noalias metadata to memory accesses in the versiond block. + LLVMContext &Ctx = BB->getContext(); + MDBuilder MDB(Ctx); + MDNode *Domain = MDB.createAnonymousAliasScopeDomain("SLPVerDomain"); + + DenseMap GroupToScope; + for (const auto &Group : MemBounds) + GroupToScope[&Group.second] = MDB.createAnonymousAliasScope(Domain); + + for (Instruction &I : *VectorBB) { + auto GetPtr = [](Instruction *I) -> Value * { + if (auto *L = dyn_cast(I)) + return L->getPointerOperand(); + if (auto *S = dyn_cast(I)) + return S->getPointerOperand(); + return nullptr; + }; + auto *Ptr = GetPtr(&I); + if (!Ptr) + continue; + + auto *PtrSCEV = SE->getSCEV(Ptr); + Value *Obj = getUnderlyingObject(Ptr); + if (!Obj) { + if (auto *GEP = dyn_cast(Ptr)) + Obj = GEP->getOperand(0); + else + continue; + } + + auto BoundsIter = MemBounds.find(Obj); + if (BoundsIter == MemBounds.end()) + continue; + auto *LowerBound = BoundsIter->second.Low; + auto *UpperBound = BoundsIter->second.High; + auto *Scope = GroupToScope.find(&BoundsIter->second)->second; + + auto *LowerSub = SE->getMinusSCEV(PtrSCEV, LowerBound); + auto *UpperSub = SE->getMinusSCEV(UpperBound, PtrSCEV); + if (!isa(LowerSub) && + !isa(UpperSub) && + SE->isKnownNonNegative(LowerSub) && SE->isKnownNonNegative(UpperSub)) { + I.setMetadata( + LLVMContext::MD_alias_scope, + MDNode::concatenate(I.getMetadata(LLVMContext::MD_alias_scope), + MDNode::get(Ctx, Scope))); + + SmallVector NonAliasing; + for (auto &KV : GroupToScope) { + if (KV.first == &BoundsIter->second) + continue; + NonAliasing.push_back(KV.second); + } + I.setMetadata(LLVMContext::MD_noalias, + MDNode::concatenate(I.getMetadata(LLVMContext::MD_noalias), + MDNode::get(Ctx, NonAliasing))); + } + } + + DTU.flush(); + DT->updateDFSNumbers(); + collectSeedInstructions(VectorBB); + + // Vectorize trees that end at stores. + assert(!Stores.empty() && "should have stores when versioning"); + LLVM_DEBUG(dbgs() << "SLP: Found stores for " << Stores.size() + << " underlying objects.\n"); + bool AnyVectorized = vectorizeStoreChains(R); + Changed |= AnyVectorized; + + R.removeDeletedInstructions(); + InstructionCost ScalarCost = 0; + for (Instruction &I : *ScalarBB) + ScalarCost += TTI->getInstructionCost(&I, TTI::TCK_RecipThroughput); + InstructionCost SLPCost = 0; + for (Instruction &I : *VectorBB) + SLPCost += TTI->getInstructionCost(&I, TTI::TCK_RecipThroughput); + + // Estimate the size of the runtime checks, consisting of computing lower & + // upper bounds (2), the overlap checks (2) and the AND/OR to combine the + // checks. + SLPCost += 5 * PointerChecks.size() + MemBounds.size(); + if (SLPCost >= ScalarCost) { + // Vectorization not beneficial or possible. Restore original state by + // removing the introduced blocks. + R.getORE()->emit([&]() { + return OptimizationRemarkMissed(SV_NAME, "VersioningNotBeneficial", + &*ScalarBB->begin()) + << "Tried to version block but was not beneficial" + << ore::NV("VectorCost", SLPCost) + << " >= " << ore::NV("ScalarCost", ScalarCost) + << ore::NV("AnyVectorized", AnyVectorized); + }); + + Changed = false; + CFGChanged = false; + CheckBlock->setName(OriginalBBName); + Instruction *OldTerm = CheckBlock->getTerminator(); + OldTerm->eraseFromParent(); + IRBuilder<> Builder(CheckBlock); + Builder.CreateBr(ScalarBB); + DTU.applyUpdates({{DT->Delete, CheckBlock, VectorBB}}); + LI->removeBlock(VectorBB); + DTU.deleteBB(VectorBB); + DTU.applyUpdates({{DT->Delete, VectorBB, MergeBlock}}); + MergeBlockIntoPredecessor(MergeBlock, &DTU, LI); + if (Tail) + MergeBlockIntoPredecessor(Tail, &DTU, LI); + MergeBlockIntoPredecessor(ScalarBB, &DTU, LI); + NumVersioningFailed++; + } else { + R.getORE()->emit( + OptimizationRemark(SV_NAME, "VersioningSuccessful", &*ScalarBB->begin()) + << "SLP vectorization with versioning is beneficial " + << ore::NV("VectorCost", SLPCost) << " < " + << ore::NV("ScalarCost", ScalarCost) + << ore::NV("AnyVectorized", AnyVectorized)); + + ChkBuilder.SetInsertPoint(CheckBlock->getTerminator()); + SCEVExpander Exp(*SE, BB->getParent()->getParent()->getDataLayout(), + "memcheck"); + Value *MemoryOverlap = addRuntimeChecks(CheckBlock->getTerminator(), + nullptr, PointerChecks, Exp) + .second; + assert(MemoryOverlap && + "runtime checks required, but no checks generated in IR?"); + + Value *NoOverflowCheck = MemoryOverlap; + // Emit checks ensuring that computing the upper bound does not overflow. + for (auto &B : MemBounds) { + Type *PtrArithTy = Type::getInt8PtrTy(Ctx, B.second.AddressSpace); + Value *Low = Exp.expandCodeFor(B.second.Low, PtrArithTy); + Value *High = Exp.expandCodeFor(B.second.High, PtrArithTy); + NoOverflowCheck = ChkBuilder.CreateOr( + NoOverflowCheck, ChkBuilder.CreateICmpUGT(Low, High, "wrap"), + "check"); + } + cast(CheckBlock->getTerminator()) + ->setCondition(NoOverflowCheck); + NumVersioningSuccessful++; + } + DTU.flush(); + DT->updateDFSNumbers(); + + return {Changed, CFGChanged}; +} + +SLPVectorizerResult SLPVectorizerPass::runImpl( + Function &F, ScalarEvolution *SE_, TargetTransformInfo *TTI_, + TargetLibraryInfo *TLI_, AAResults *AA_, LoopInfo *LI_, DominatorTree *DT_, + AssumptionCache *AC_, DemandedBits *DB_, OptimizationRemarkEmitter *ORE_) { if (!RunSLPVectorization) - return false; + return {false, false}; SE = SE_; TTI = TTI_; TLI = TLI_; @@ -6766,15 +7104,16 @@ Stores.clear(); GEPs.clear(); bool Changed = false; + bool CFGChanged = false; // If the target claims to have no vector registers don't attempt // vectorization. if (!TTI->getNumberOfRegisters(TTI->getRegisterClassForType(true))) - return false; + return {false, false}; // Don't vectorize when the attribute NoImplicitFloat is used. if (F.hasFnAttribute(Attribute::NoImplicitFloat)) - return false; + return {false, false}; LLVM_DEBUG(dbgs() << "SLP: Analyzing blocks in " << F.getName() << ".\n"); @@ -6788,19 +7127,29 @@ // Update DFS numbers now so that we can use them for ordering. DT->updateDFSNumbers(); + SmallVector BlocksToRetry; + SmallVector, 4> BoundsToUse; // Scan the blocks in the function in post order. for (auto BB : post_order(&F.getEntryBlock())) { collectSeedInstructions(BB); + bool VectorizedBlock = false; // Vectorize trees that end at stores. if (!Stores.empty()) { LLVM_DEBUG(dbgs() << "SLP: Found stores for " << Stores.size() << " underlying objects.\n"); - Changed |= vectorizeStoreChains(R); + R.TrackedObjects.clear(); + + if (EnableMemoryVersioning) + R.CollectMemAccess = BB->size() <= 300; + + VectorizedBlock = vectorizeStoreChains(R); + + R.CollectMemAccess = false; } // Vectorize trees that end at reductions. - Changed |= vectorizeChainsInBlock(BB, R); + VectorizedBlock |= vectorizeChainsInBlock(BB, R); // Vectorize the index computations of getelementptr instructions. This // is primarily intended to catch gather-like idioms ending at @@ -6808,15 +7157,30 @@ if (!GEPs.empty()) { LLVM_DEBUG(dbgs() << "SLP: Found GEPs for " << GEPs.size() << " underlying objects.\n"); - Changed |= vectorizeGEPIndices(BB, R); + VectorizedBlock |= vectorizeGEPIndices(BB, R); + } + + if (!VectorizedBlock && !R.TrackedObjects.empty()) { + BlocksToRetry.push_back(BB); + BoundsToUse.push_back(R.TrackedObjects); } + R.TrackedObjects.clear(); + Changed |= VectorizedBlock; } - if (Changed) { + for (unsigned I = 0; I != BlocksToRetry.size(); I++) { + auto Status = + vectorizeBlockWithVersioning(BlocksToRetry[I], BoundsToUse[I], R); + Changed |= Status.MadeAnyChange; + CFGChanged |= Status.MadeCFGChange; + } + + if (Changed && BlocksToRetry.empty()) { R.optimizeGatherSequence(); LLVM_DEBUG(dbgs() << "SLP: vectorized \"" << F.getName() << "\"\n"); } - return Changed; + + return {Changed, CFGChanged}; } /// Order may have elements assigned special value (size) which is out of diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -slp-vectorizer -mtriple=aarch64--linux-gnu -mcpu=generic < %s | FileCheck %s +; RUN: opt -slp-memory-versioning -scoped-noalias-aa -S -slp-vectorizer -mtriple=aarch64--linux-gnu -mcpu=generic -enable-new-pm=false < %s | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64" @@ -102,7 +102,19 @@ ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[SCALE]], align 16 ; CHECK-NEXT: [[OFFSET:%.*]] = getelementptr inbounds [[STRUCT_WEIGHT_T]], %struct.weight_t* [[W]], i64 0, i32 1 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[OFFSET]], align 4 -; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* [[SRC:%.*]], align 1 +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[SRC:%.*]], i64 4 +; CHECK-NEXT: [[SCEVGEP37:%.*]] = getelementptr i8, i8* [[DST:%.*]], i64 4 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SRC]], [[SCEVGEP37]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[DST]], [[SCEVGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[SRC]], [[SCEVGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP38:%.*]] = icmp ugt i8* [[DST]], [[SCEVGEP37]] +; CHECK-NEXT: [[CHECK39:%.*]] = or i1 [[CHECK]], [[WRAP38]] +; CHECK-NEXT: br i1 [[CHECK39]], label [[ENTRY_SCALAR:%.*]], label [[ENTRY_SLPVERSIONED1:%.*]] +; CHECK: entry.scalar: +; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* [[SRC]], align 1 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP2]] to i32 ; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP0]], [[CONV]] ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[TMP1]] @@ -111,7 +123,7 @@ ; CHECK-NEXT: [[SHR_I:%.*]] = sext i1 [[TMP3]] to i32 ; CHECK-NEXT: [[COND_I:%.*]] = select i1 [[TOBOOL_NOT_I]], i32 [[ADD]], i32 [[SHR_I]] ; CHECK-NEXT: [[CONV_I:%.*]] = trunc i32 [[COND_I]] to i8 -; CHECK-NEXT: store i8 [[CONV_I]], i8* [[DST:%.*]], align 1 +; CHECK-NEXT: store i8 [[CONV_I]], i8* [[DST]], align 1 ; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 1 ; CHECK-NEXT: [[TMP4:%.*]] = load i8, i8* [[ARRAYIDX_1]], align 1 ; CHECK-NEXT: [[CONV_1:%.*]] = zext i8 [[TMP4]] to i32 @@ -148,7 +160,33 @@ ; CHECK-NEXT: [[CONV_I_3:%.*]] = trunc i32 [[COND_I_3]] to i8 ; CHECK-NEXT: [[ARRAYIDX2_3:%.*]] = getelementptr inbounds i8, i8* [[DST]], i64 3 ; CHECK-NEXT: store i8 [[CONV_I_3]], i8* [[ARRAYIDX2_3]], align 1 +; CHECK-NEXT: br label [[ENTRY_MERGE:%.*]] +; CHECK: entry.merge: ; CHECK-NEXT: ret void +; CHECK: entry.slpversioned1: +; CHECK-NEXT: [[ARRAYIDX_19:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 1 +; CHECK-NEXT: [[ARRAYIDX2_117:%.*]] = getelementptr inbounds i8, i8* [[DST]], i64 1 +; CHECK-NEXT: [[ARRAYIDX_218:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 2 +; CHECK-NEXT: [[ARRAYIDX2_226:%.*]] = getelementptr inbounds i8, i8* [[DST]], i64 2 +; CHECK-NEXT: [[ARRAYIDX_327:%.*]] = getelementptr inbounds i8, i8* [[SRC]], i64 3 +; CHECK-NEXT: [[TMP10:%.*]] = bitcast i8* [[SRC]] to <4 x i8>* +; CHECK-NEXT: [[TMP11:%.*]] = load <4 x i8>, <4 x i8>* [[TMP10]], align 1, !alias.scope !0, !noalias !3 +; CHECK-NEXT: [[TMP12:%.*]] = zext <4 x i8> [[TMP11]] to <4 x i32> +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i32 0 +; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP13]], <4 x i32> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP14:%.*]] = mul nsw <4 x i32> [[SHUFFLE]], [[TMP12]] +; CHECK-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1]], i32 0 +; CHECK-NEXT: [[SHUFFLE36:%.*]] = shufflevector <4 x i32> [[TMP15]], <4 x i32> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP16:%.*]] = add nsw <4 x i32> [[TMP14]], [[SHUFFLE36]] +; CHECK-NEXT: [[TMP17:%.*]] = icmp ult <4 x i32> [[TMP16]], +; CHECK-NEXT: [[TMP18:%.*]] = icmp sgt <4 x i32> [[TMP16]], zeroinitializer +; CHECK-NEXT: [[TMP19:%.*]] = sext <4 x i1> [[TMP18]] to <4 x i32> +; CHECK-NEXT: [[TMP20:%.*]] = select <4 x i1> [[TMP17]], <4 x i32> [[TMP16]], <4 x i32> [[TMP19]] +; CHECK-NEXT: [[TMP21:%.*]] = trunc <4 x i32> [[TMP20]] to <4 x i8> +; CHECK-NEXT: [[ARRAYIDX2_335:%.*]] = getelementptr inbounds i8, i8* [[DST]], i64 3 +; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8* [[DST]] to <4 x i8>* +; CHECK-NEXT: store <4 x i8> [[TMP21]], <4 x i8>* [[TMP22]], align 1, !alias.scope !3, !noalias !0 +; CHECK-NEXT: br label [[ENTRY_MERGE]] ; entry: %scale = getelementptr inbounds %struct.weight_t, %struct.weight_t* %w, i64 0, i32 0 diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks-in-loops.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks-in-loops.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks-in-loops.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks-in-loops.ll @@ -1,15 +1,38 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -scoped-noalias-aa -slp-vectorizer -enable-new-pm=false -mtriple=arm64-apple-ios -S %s | FileCheck %s +; RUN: opt -scoped-noalias-aa -slp-vectorizer -slp-memory-versioning -enable-new-pm=false -mtriple=arm64-apple-ios -S %s | FileCheck %s define void @loop1(i32* %A, i32* %B, i64 %N) { ; CHECK-LABEL: @loop1( ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: -; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[IV]] +; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[LOOP_TAIL:%.*]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP_TAIL]] ] +; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[INDVAR]], 4 +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B:%.*]], i64 [[TMP0]] +; CHECK-NEXT: [[SCEVGEP28:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], 3 +; CHECK-NEXT: [[SCEVGEP29:%.*]] = getelementptr i32, i32* [[B]], i64 [[TMP1]] +; CHECK-NEXT: [[SCEVGEP2930:%.*]] = bitcast i32* [[SCEVGEP29]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP2930]], i64 1 +; CHECK-NEXT: [[SCEVGEP31:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[TMP0]] +; CHECK-NEXT: [[SCEVGEP3132:%.*]] = bitcast i32* [[SCEVGEP31]] to i8* +; CHECK-NEXT: [[SCEVGEP33:%.*]] = getelementptr i32, i32* [[A]], i64 [[TMP1]] +; CHECK-NEXT: [[SCEVGEP3334:%.*]] = bitcast i32* [[SCEVGEP33]] to i8* +; CHECK-NEXT: [[UGLYGEP35:%.*]] = getelementptr i8, i8* [[SCEVGEP3334]], i64 1 +; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV]] +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SCEVGEP28]], [[UGLYGEP35]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[SCEVGEP3132]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[SCEVGEP28]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP36:%.*]] = icmp ugt i8* [[SCEVGEP3132]], [[UGLYGEP35]] +; CHECK-NEXT: [[CHECK37:%.*]] = or i1 [[CHECK]], [[WRAP36]] +; CHECK-NEXT: br i1 [[CHECK37]], label [[LOOP_SCALAR:%.*]], label [[LOOP_SLPVERSIONED1:%.*]] +; CHECK: loop.scalar: ; CHECK-NEXT: [[B_0:%.*]] = load i32, i32* [[B_GEP_0]], align 4 -; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IV]] +; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV]] ; CHECK-NEXT: [[A_0:%.*]] = load i32, i32* [[A_GEP_0]], align 4 ; CHECK-NEXT: [[ADD_0:%.*]] = add i32 [[A_0]], 20 ; CHECK-NEXT: [[XOR_0:%.*]] = xor i32 [[ADD_0]], [[B_0]] @@ -38,11 +61,36 @@ ; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[A_3]], 20 ; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[ADD_3]], [[B_3]] ; CHECK-NEXT: store i32 [[XOR_3]], i32* [[A_GEP_3]], align 4 +; CHECK-NEXT: br label [[LOOP_MERGE:%.*]] +; CHECK: loop.merge: +; CHECK-NEXT: br label [[LOOP_TAIL]] +; CHECK: loop.tail: ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 16 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i64 [[IV_NEXT]], [[N:%.*]] +; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void +; CHECK: loop.slpversioned1: +; CHECK-NEXT: [[A_GEP_03:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV]] +; CHECK-NEXT: [[IV_17:%.*]] = or i64 [[IV]], 1 +; CHECK-NEXT: [[B_GEP_18:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_17]] +; CHECK-NEXT: [[A_GEP_110:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_17]] +; CHECK-NEXT: [[IV_214:%.*]] = or i64 [[IV]], 2 +; CHECK-NEXT: [[B_GEP_215:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_214]] +; CHECK-NEXT: [[A_GEP_217:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_214]] +; CHECK-NEXT: [[IV_321:%.*]] = or i64 [[IV]], 3 +; CHECK-NEXT: [[B_GEP_322:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_321]] +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[B_GEP_0]] to <4 x i32>* +; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !alias.scope !0, !noalias !3 +; CHECK-NEXT: [[A_GEP_324:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_321]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[A_GEP_03]] to <4 x i32>* +; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[TMP5]], +; CHECK-NEXT: [[TMP7:%.*]] = xor <4 x i32> [[TMP6]], [[TMP3]] +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32* [[A_GEP_03]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP7]], <4 x i32>* [[TMP8]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: br label [[LOOP_MERGE]] ; entry: br label %loop @@ -91,16 +139,34 @@ define void @loop_iv_update_at_start(float* %src, float* %dst) #0 { ; CHECK-LABEL: @loop_iv_update_at_start( ; CHECK-NEXT: entry: +; CHECK-NEXT: [[SRC26:%.*]] = bitcast float* [[SRC:%.*]] to i8* +; CHECK-NEXT: [[DST28:%.*]] = bitcast float* [[DST:%.*]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr float, float* [[SRC]], i64 4 +; CHECK-NEXT: [[SCEVGEP27:%.*]] = bitcast float* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP27]], i64 1 +; CHECK-NEXT: [[SCEVGEP29:%.*]] = getelementptr float, float* [[DST]], i64 4 +; CHECK-NEXT: [[SCEVGEP2930:%.*]] = bitcast float* [[SCEVGEP29]] to i8* +; CHECK-NEXT: [[UGLYGEP31:%.*]] = getelementptr i8, i8* [[SCEVGEP2930]], i64 1 ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: -; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_MERGE:%.*]] ] ; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[IV]], 2000 -; CHECK-NEXT: [[SRC_GEP_0:%.*]] = getelementptr inbounds float, float* [[SRC:%.*]], i64 0 +; CHECK-NEXT: [[SRC_GEP_0:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 0 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SRC26]], [[UGLYGEP31]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[DST28]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[SRC26]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP32:%.*]] = icmp ugt i8* [[DST28]], [[UGLYGEP31]] +; CHECK-NEXT: [[CHECK33:%.*]] = or i1 [[CHECK]], [[WRAP32]] +; CHECK-NEXT: br i1 [[CHECK33]], label [[LOOP_SCALAR:%.*]], label [[LOOP_SLPVERSIONED1:%.*]] +; CHECK: loop.scalar: ; CHECK-NEXT: [[SRC_0:%.*]] = load float, float* [[SRC_GEP_0]], align 8 ; CHECK-NEXT: [[ADD_0:%.*]] = fadd float [[SRC_0]], 1.000000e+00 ; CHECK-NEXT: [[MUL_0:%.*]] = fmul float [[ADD_0]], [[SRC_0]] -; CHECK-NEXT: [[DST_GEP_0:%.*]] = getelementptr inbounds float, float* [[DST:%.*]], i64 0 +; CHECK-NEXT: [[DST_GEP_0:%.*]] = getelementptr inbounds float, float* [[DST]], i64 0 ; CHECK-NEXT: store float [[MUL_0]], float* [[DST_GEP_0]], align 8 ; CHECK-NEXT: [[SRC_GEP_1:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 1 ; CHECK-NEXT: [[SRC_1:%.*]] = load float, float* [[SRC_GEP_1]], align 8 @@ -126,9 +192,32 @@ ; CHECK-NEXT: [[MUL_4:%.*]] = fmul float [[ADD_4]], [[SRC_4]] ; CHECK-NEXT: [[DST_GEP_4:%.*]] = getelementptr inbounds float, float* [[DST]], i64 4 ; CHECK-NEXT: store float [[MUL_4]], float* [[DST_GEP_4]], align 8 +; CHECK-NEXT: br label [[LOOP_MERGE]] +; CHECK: loop.merge: ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: ret void +; CHECK: loop.slpversioned1: +; CHECK-NEXT: [[DST_GEP_05:%.*]] = getelementptr inbounds float, float* [[DST]], i64 0 +; CHECK-NEXT: [[SRC_GEP_16:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 1 +; CHECK-NEXT: [[DST_GEP_110:%.*]] = getelementptr inbounds float, float* [[DST]], i64 1 +; CHECK-NEXT: [[SRC_GEP_211:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 2 +; CHECK-NEXT: [[DST_GEP_215:%.*]] = getelementptr inbounds float, float* [[DST]], i64 2 +; CHECK-NEXT: [[SRC_GEP_316:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 3 +; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[SRC_GEP_0]] to <4 x float>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[TMP0]], align 8, !alias.scope !5, !noalias !8 +; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP1]], +; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[TMP2]], [[TMP1]] +; CHECK-NEXT: [[DST_GEP_320:%.*]] = getelementptr inbounds float, float* [[DST]], i64 3 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[DST_GEP_05]] to <4 x float>* +; CHECK-NEXT: store <4 x float> [[TMP3]], <4 x float>* [[TMP4]], align 8, !alias.scope !8, !noalias !5 +; CHECK-NEXT: [[SRC_GEP_421:%.*]] = getelementptr inbounds float, float* [[SRC]], i64 4 +; CHECK-NEXT: [[SRC_422:%.*]] = load float, float* [[SRC_GEP_421]], align 8, !alias.scope !5, !noalias !8 +; CHECK-NEXT: [[ADD_423:%.*]] = fadd float [[SRC_422]], 1.000000e+00 +; CHECK-NEXT: [[MUL_424:%.*]] = fmul float [[ADD_423]], [[SRC_422]] +; CHECK-NEXT: [[DST_GEP_425:%.*]] = getelementptr inbounds float, float* [[DST]], i64 4 +; CHECK-NEXT: store float [[MUL_424]], float* [[DST_GEP_425]], align 8, !alias.scope !8, !noalias !5 +; CHECK-NEXT: br label [[LOOP_MERGE]] ; entry: br label %loop diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll --- a/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll +++ b/llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll @@ -1,5 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -scoped-noalias-aa -slp-vectorizer -mtriple=arm64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s +; RUN: opt -scoped-noalias-aa -slp-vectorizer -slp-memory-versioning -mtriple=arm64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s +; RUN: opt -slp-memory-versioning=false -scoped-noalias-aa -slp-vectorizer -mtriple=arm64-apple-darwin -enable-new-pm=false -S %s | FileCheck --check-prefix=NOVERSION %s + +; NOVERSION-NOT: slpversioned define void @needs_versioning_not_profitable(i32* %dst, i32* %src) { ; CHECK-LABEL: @needs_versioning_not_profitable( @@ -29,9 +32,27 @@ define void @needs_versioning_profitable(i32* %dst, i32* %src) { ; CHECK-LABEL: @needs_versioning_profitable( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[SRC_0:%.*]] = load i32, i32* [[SRC:%.*]], align 4 +; CHECK-NEXT: [[SRC16:%.*]] = bitcast i32* [[SRC:%.*]] to i8* +; CHECK-NEXT: [[DST18:%.*]] = bitcast i32* [[DST:%.*]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[SRC]], i64 3 +; CHECK-NEXT: [[SCEVGEP17:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP17]], i64 1 +; CHECK-NEXT: [[SCEVGEP19:%.*]] = getelementptr i32, i32* [[DST]], i64 3 +; CHECK-NEXT: [[SCEVGEP1920:%.*]] = bitcast i32* [[SCEVGEP19]] to i8* +; CHECK-NEXT: [[UGLYGEP21:%.*]] = getelementptr i8, i8* [[SCEVGEP1920]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SRC16]], [[UGLYGEP21]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[DST18]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[SRC16]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP22:%.*]] = icmp ugt i8* [[DST18]], [[UGLYGEP21]] +; CHECK-NEXT: [[CHECK23:%.*]] = or i1 [[CHECK]], [[WRAP22]] +; CHECK-NEXT: br i1 [[CHECK23]], label [[ENTRY_SCALAR:%.*]], label [[ENTRY_SLPVERSIONED1:%.*]] +; CHECK: entry.scalar: +; CHECK-NEXT: [[SRC_0:%.*]] = load i32, i32* [[SRC]], align 4 ; CHECK-NEXT: [[R_0:%.*]] = ashr i32 [[SRC_0]], 16 -; CHECK-NEXT: store i32 [[R_0]], i32* [[DST:%.*]], align 4 +; CHECK-NEXT: store i32 [[R_0]], i32* [[DST]], align 4 ; CHECK-NEXT: [[SRC_GEP_1:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 1 ; CHECK-NEXT: [[SRC_1:%.*]] = load i32, i32* [[SRC_GEP_1]], align 4 ; CHECK-NEXT: [[R_1:%.*]] = ashr i32 [[SRC_1]], 16 @@ -47,7 +68,22 @@ ; CHECK-NEXT: [[R_3:%.*]] = ashr i32 [[SRC_3]], 16 ; CHECK-NEXT: [[DST_GEP_3:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3 ; CHECK-NEXT: store i32 [[R_3]], i32* [[DST_GEP_3]], align 4 +; CHECK-NEXT: br label [[ENTRY_MERGE:%.*]] +; CHECK: entry.merge: ; CHECK-NEXT: ret void +; CHECK: entry.slpversioned1: +; CHECK-NEXT: [[SRC_GEP_14:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 1 +; CHECK-NEXT: [[DST_GEP_17:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 1 +; CHECK-NEXT: [[SRC_GEP_28:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 2 +; CHECK-NEXT: [[DST_GEP_211:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 2 +; CHECK-NEXT: [[SRC_GEP_312:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 3 +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[SRC]] to <4 x i32>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4, !alias.scope !0, !noalias !3 +; CHECK-NEXT: [[TMP2:%.*]] = ashr <4 x i32> [[TMP1]], +; CHECK-NEXT: [[DST_GEP_315:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[DST]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP2]], <4 x i32>* [[TMP3]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: br label [[ENTRY_MERGE]] ; entry: %src.0 = load i32, i32* %src, align 4 @@ -79,12 +115,30 @@ define void @needs_versioning_profitable_split_points(i32* %dst, i32* %src) { ; CHECK-LABEL: @needs_versioning_profitable_split_points( ; CHECK-NEXT: entry: +; CHECK-NEXT: [[SRC16:%.*]] = bitcast i32* [[SRC:%.*]] to i8* +; CHECK-NEXT: [[DST18:%.*]] = bitcast i32* [[DST:%.*]] to i8* ; CHECK-NEXT: call void @bar() ; CHECK-NEXT: call void @bar() ; CHECK-NEXT: call void @bar() -; CHECK-NEXT: [[SRC_0:%.*]] = load i32, i32* [[SRC:%.*]], align 4 +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[SRC]], i64 3 +; CHECK-NEXT: [[SCEVGEP17:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP17]], i64 1 +; CHECK-NEXT: [[SCEVGEP19:%.*]] = getelementptr i32, i32* [[DST]], i64 3 +; CHECK-NEXT: [[SCEVGEP1920:%.*]] = bitcast i32* [[SCEVGEP19]] to i8* +; CHECK-NEXT: [[UGLYGEP21:%.*]] = getelementptr i8, i8* [[SCEVGEP1920]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SRC16]], [[UGLYGEP21]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[DST18]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[SRC16]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP22:%.*]] = icmp ugt i8* [[DST18]], [[UGLYGEP21]] +; CHECK-NEXT: [[CHECK23:%.*]] = or i1 [[CHECK]], [[WRAP22]] +; CHECK-NEXT: br i1 [[CHECK23]], label [[ENTRY_SCALAR:%.*]], label [[ENTRY_SLPVERSIONED1:%.*]] +; CHECK: entry.scalar: +; CHECK-NEXT: [[SRC_0:%.*]] = load i32, i32* [[SRC]], align 4 ; CHECK-NEXT: [[R_0:%.*]] = ashr i32 [[SRC_0]], 16 -; CHECK-NEXT: store i32 [[R_0]], i32* [[DST:%.*]], align 4 +; CHECK-NEXT: store i32 [[R_0]], i32* [[DST]], align 4 ; CHECK-NEXT: [[SRC_GEP_1:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 1 ; CHECK-NEXT: [[SRC_1:%.*]] = load i32, i32* [[SRC_GEP_1]], align 4 ; CHECK-NEXT: [[R_1:%.*]] = ashr i32 [[SRC_1]], 16 @@ -100,8 +154,25 @@ ; CHECK-NEXT: [[R_3:%.*]] = ashr i32 [[SRC_3]], 16 ; CHECK-NEXT: [[DST_GEP_3:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3 ; CHECK-NEXT: store i32 [[R_3]], i32* [[DST_GEP_3]], align 4 +; CHECK-NEXT: br label [[ENTRY_MERGE:%.*]] +; CHECK: entry.merge: +; CHECK-NEXT: br label [[ENTRY_TAIL:%.*]] +; CHECK: entry.tail: ; CHECK-NEXT: call void @bar() ; CHECK-NEXT: ret void +; CHECK: entry.slpversioned1: +; CHECK-NEXT: [[SRC_GEP_14:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 1 +; CHECK-NEXT: [[DST_GEP_17:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 1 +; CHECK-NEXT: [[SRC_GEP_28:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 2 +; CHECK-NEXT: [[DST_GEP_211:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 2 +; CHECK-NEXT: [[SRC_GEP_312:%.*]] = getelementptr inbounds i32, i32* [[SRC]], i64 3 +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[SRC]] to <4 x i32>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4, !alias.scope !5, !noalias !8 +; CHECK-NEXT: [[TMP2:%.*]] = ashr <4 x i32> [[TMP1]], +; CHECK-NEXT: [[DST_GEP_315:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[DST]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP2]], <4 x i32>* [[TMP3]], align 4, !alias.scope !8, !noalias !5 +; CHECK-NEXT: br label [[ENTRY_MERGE]] ; entry: call void @bar() @@ -281,8 +352,26 @@ define void @version_multiple(i32* nocapture %out_block, i32* nocapture readonly %counter) { ; CHECK-LABEL: @version_multiple( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[COUNTER:%.*]], align 4 -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[OUT_BLOCK:%.*]], align 4 +; CHECK-NEXT: [[COUNTER12:%.*]] = bitcast i32* [[COUNTER:%.*]] to i8* +; CHECK-NEXT: [[OUT_BLOCK14:%.*]] = bitcast i32* [[OUT_BLOCK:%.*]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[COUNTER]], i64 3 +; CHECK-NEXT: [[SCEVGEP13:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP13]], i64 1 +; CHECK-NEXT: [[SCEVGEP15:%.*]] = getelementptr i32, i32* [[OUT_BLOCK]], i64 3 +; CHECK-NEXT: [[SCEVGEP1516:%.*]] = bitcast i32* [[SCEVGEP15]] to i8* +; CHECK-NEXT: [[UGLYGEP17:%.*]] = getelementptr i8, i8* [[SCEVGEP1516]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[COUNTER12]], [[UGLYGEP17]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[OUT_BLOCK14]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[COUNTER12]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP18:%.*]] = icmp ugt i8* [[OUT_BLOCK14]], [[UGLYGEP17]] +; CHECK-NEXT: [[CHECK19:%.*]] = or i1 [[CHECK]], [[WRAP18]] +; CHECK-NEXT: br i1 [[CHECK19]], label [[ENTRY_SCALAR:%.*]], label [[ENTRY_SLPVERSIONED1:%.*]] +; CHECK: entry.scalar: +; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[COUNTER]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[OUT_BLOCK]], align 4 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[TMP1]], [[TMP0]] ; CHECK-NEXT: store i32 [[XOR]], i32* [[OUT_BLOCK]], align 4 ; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 1 @@ -303,7 +392,24 @@ ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX2_3]], align 4 ; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[TMP7]], [[TMP6]] ; CHECK-NEXT: store i32 [[XOR_3]], i32* [[ARRAYIDX2_3]], align 4 +; CHECK-NEXT: br label [[ENTRY_MERGE:%.*]] +; CHECK: entry.merge: ; CHECK-NEXT: ret void +; CHECK: entry.slpversioned1: +; CHECK-NEXT: [[ARRAYIDX_13:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 1 +; CHECK-NEXT: [[ARRAYIDX2_14:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 1 +; CHECK-NEXT: [[ARRAYIDX_26:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 2 +; CHECK-NEXT: [[ARRAYIDX2_27:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 2 +; CHECK-NEXT: [[ARRAYIDX_39:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 3 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32* [[COUNTER]] to <4 x i32>* +; CHECK-NEXT: [[TMP9:%.*]] = load <4 x i32>, <4 x i32>* [[TMP8]], align 4, !alias.scope !10, !noalias !13 +; CHECK-NEXT: [[ARRAYIDX2_310:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 3 +; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[OUT_BLOCK]] to <4 x i32>* +; CHECK-NEXT: [[TMP11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP10]], align 4, !alias.scope !13, !noalias !10 +; CHECK-NEXT: [[TMP12:%.*]] = xor <4 x i32> [[TMP11]], [[TMP9]] +; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32* [[OUT_BLOCK]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP12]], <4 x i32>* [[TMP13]], align 4, !alias.scope !13, !noalias !10 +; CHECK-NEXT: br label [[ENTRY_MERGE]] ; entry: %0 = load i32, i32* %counter, align 4 @@ -645,31 +751,67 @@ ; CHECK-NEXT: [[PTR_PHI:%.*]] = phi %struct.2* [ [[A:%.*]], [[BB:%.*]] ], [ null, [[LOOP]] ] ; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]] ; CHECK: exit: +; CHECK-NEXT: [[PTR_PHI_LCSSA:%.*]] = phi %struct.2* [ [[PTR_PHI]], [[LOOP]] ] +; CHECK-NEXT: [[PTR_PHI_LCSSA23:%.*]] = bitcast %struct.2* [[PTR_PHI_LCSSA]] to i8* ; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 0 +; CHECK-NEXT: [[B_GEP_021:%.*]] = bitcast float* [[B_GEP_0]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr float, float* [[B_GEP_0]], i64 3 +; CHECK-NEXT: [[SCEVGEP22:%.*]] = bitcast float* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP22]], i64 1 +; CHECK-NEXT: [[SCEVGEP24:%.*]] = getelementptr [[STRUCT_2:%.*]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i64 3 +; CHECK-NEXT: [[SCEVGEP2425:%.*]] = bitcast float* [[SCEVGEP24]] to i8* +; CHECK-NEXT: [[UGLYGEP26:%.*]] = getelementptr i8, i8* [[SCEVGEP2425]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B_GEP_021]], [[UGLYGEP26]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[PTR_PHI_LCSSA23]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[B_GEP_021]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP27:%.*]] = icmp ugt i8* [[PTR_PHI_LCSSA23]], [[UGLYGEP26]] +; CHECK-NEXT: [[CHECK28:%.*]] = or i1 [[CHECK]], [[WRAP27]] +; CHECK-NEXT: br i1 [[CHECK28]], label [[EXIT_SCALAR:%.*]], label [[EXIT_SLPVERSIONED1:%.*]] +; CHECK: exit.scalar: ; CHECK-NEXT: [[L_0:%.*]] = load float, float* [[B_GEP_0]], align 8 ; CHECK-NEXT: [[ADD_0:%.*]] = fadd float [[L_0]], 1.000000e+01 ; CHECK-NEXT: [[MUL_0:%.*]] = fmul float [[ADD_0]], 3.000000e+01 -; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds [[STRUCT_2:%.*]], %struct.2* [[PTR_PHI]], i64 0, i32 0, i32 0 +; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 0 ; CHECK-NEXT: store float [[MUL_0]], float* [[A_GEP_0]], align 8 ; CHECK-NEXT: [[B_GEP_1:%.*]] = getelementptr inbounds float, float* [[B]], i64 1 ; CHECK-NEXT: [[L_1:%.*]] = load float, float* [[B_GEP_1]], align 8 ; CHECK-NEXT: [[ADD_1:%.*]] = fadd float [[L_1]], 1.000000e+01 ; CHECK-NEXT: [[MUL_1:%.*]] = fmul float [[ADD_1]], 3.000000e+01 -; CHECK-NEXT: [[A_GEP_1:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI]], i64 0, i32 0, i32 1 +; CHECK-NEXT: [[A_GEP_1:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 1 ; CHECK-NEXT: store float [[MUL_1]], float* [[A_GEP_1]], align 8 ; CHECK-NEXT: [[B_GEP_2:%.*]] = getelementptr inbounds float, float* [[B]], i64 2 ; CHECK-NEXT: [[L_2:%.*]] = load float, float* [[B_GEP_2]], align 8 ; CHECK-NEXT: [[ADD_2:%.*]] = fadd float [[L_2]], 1.000000e+01 ; CHECK-NEXT: [[MUL_2:%.*]] = fmul float [[ADD_2]], 3.000000e+01 -; CHECK-NEXT: [[A_GEP_2:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI]], i64 0, i32 0, i32 2 +; CHECK-NEXT: [[A_GEP_2:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 2 ; CHECK-NEXT: store float [[MUL_2]], float* [[A_GEP_2]], align 8 ; CHECK-NEXT: [[B_GEP_3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 ; CHECK-NEXT: [[L_3:%.*]] = load float, float* [[B_GEP_3]], align 8 ; CHECK-NEXT: [[ADD_3:%.*]] = fadd float [[L_3]], 1.000000e+01 ; CHECK-NEXT: [[MUL_3:%.*]] = fmul float [[ADD_3]], 3.000000e+01 -; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI]], i64 0, i32 0, i32 3 +; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 3 ; CHECK-NEXT: store float [[MUL_3]], float* [[A_GEP_3]], align 8 +; CHECK-NEXT: br label [[EXIT_MERGE:%.*]] +; CHECK: exit.merge: ; CHECK-NEXT: ret void +; CHECK: exit.slpversioned1: +; CHECK-NEXT: [[A_GEP_05:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 0 +; CHECK-NEXT: [[B_GEP_16:%.*]] = getelementptr inbounds float, float* [[B]], i64 1 +; CHECK-NEXT: [[A_GEP_110:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 1 +; CHECK-NEXT: [[B_GEP_211:%.*]] = getelementptr inbounds float, float* [[B]], i64 2 +; CHECK-NEXT: [[A_GEP_215:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 2 +; CHECK-NEXT: [[B_GEP_316:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 +; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[B_GEP_0]] to <4 x float>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[TMP0]], align 8, !alias.scope !15, !noalias !18 +; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP1]], +; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[TMP2]], +; CHECK-NEXT: [[A_GEP_320:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 3 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[A_GEP_05]] to <4 x float>* +; CHECK-NEXT: store <4 x float> [[TMP3]], <4 x float>* [[TMP4]], align 8, !alias.scope !18, !noalias !15 +; CHECK-NEXT: br label [[EXIT_MERGE]] ; bb: br label %loop @@ -716,11 +858,29 @@ ; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP]] ; CHECK: exit: ; CHECK-NEXT: [[PTR_PHI_LCSSA:%.*]] = phi %struct.2* [ [[PTR_PHI]], [[LOOP]] ] +; CHECK-NEXT: [[PTR_PHI_LCSSA23:%.*]] = bitcast %struct.2* [[PTR_PHI_LCSSA]] to i8* ; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 0 +; CHECK-NEXT: [[B_GEP_021:%.*]] = bitcast float* [[B_GEP_0]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr float, float* [[B_GEP_0]], i64 3 +; CHECK-NEXT: [[SCEVGEP22:%.*]] = bitcast float* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP22]], i64 1 +; CHECK-NEXT: [[SCEVGEP24:%.*]] = getelementptr [[STRUCT_2:%.*]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i64 3 +; CHECK-NEXT: [[SCEVGEP2425:%.*]] = bitcast float* [[SCEVGEP24]] to i8* +; CHECK-NEXT: [[UGLYGEP26:%.*]] = getelementptr i8, i8* [[SCEVGEP2425]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B_GEP_021]], [[UGLYGEP26]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[PTR_PHI_LCSSA23]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[B_GEP_021]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP27:%.*]] = icmp ugt i8* [[PTR_PHI_LCSSA23]], [[UGLYGEP26]] +; CHECK-NEXT: [[CHECK28:%.*]] = or i1 [[CHECK]], [[WRAP27]] +; CHECK-NEXT: br i1 [[CHECK28]], label [[EXIT_SCALAR:%.*]], label [[EXIT_SLPVERSIONED1:%.*]] +; CHECK: exit.scalar: ; CHECK-NEXT: [[L_0:%.*]] = load float, float* [[B_GEP_0]], align 8 ; CHECK-NEXT: [[ADD_0:%.*]] = fadd float [[L_0]], 1.000000e+01 ; CHECK-NEXT: [[MUL_0:%.*]] = fmul float [[ADD_0]], 3.000000e+01 -; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds [[STRUCT_2:%.*]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 0 +; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 0 ; CHECK-NEXT: store float [[MUL_0]], float* [[A_GEP_0]], align 8 ; CHECK-NEXT: [[B_GEP_1:%.*]] = getelementptr inbounds float, float* [[B]], i64 1 ; CHECK-NEXT: [[L_1:%.*]] = load float, float* [[B_GEP_1]], align 8 @@ -740,7 +900,24 @@ ; CHECK-NEXT: [[MUL_3:%.*]] = fmul float [[ADD_3]], 3.000000e+01 ; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 3 ; CHECK-NEXT: store float [[MUL_3]], float* [[A_GEP_3]], align 8 +; CHECK-NEXT: br label [[EXIT_MERGE:%.*]] +; CHECK: exit.merge: ; CHECK-NEXT: ret void +; CHECK: exit.slpversioned1: +; CHECK-NEXT: [[A_GEP_05:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 0 +; CHECK-NEXT: [[B_GEP_16:%.*]] = getelementptr inbounds float, float* [[B]], i64 1 +; CHECK-NEXT: [[A_GEP_110:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 1 +; CHECK-NEXT: [[B_GEP_211:%.*]] = getelementptr inbounds float, float* [[B]], i64 2 +; CHECK-NEXT: [[A_GEP_215:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 2 +; CHECK-NEXT: [[B_GEP_316:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 +; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[B_GEP_0]] to <4 x float>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[TMP0]], align 8, !alias.scope !20, !noalias !23 +; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP1]], +; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[TMP2]], +; CHECK-NEXT: [[A_GEP_320:%.*]] = getelementptr inbounds [[STRUCT_2]], %struct.2* [[PTR_PHI_LCSSA]], i64 0, i32 0, i32 3 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[A_GEP_05]] to <4 x float>* +; CHECK-NEXT: store <4 x float> [[TMP3]], <4 x float>* [[TMP4]], align 8, !alias.scope !23, !noalias !20 +; CHECK-NEXT: br label [[EXIT_MERGE]] ; bb: br label %loop @@ -1165,6 +1342,7 @@ define void @crash_instructions_deleted(float* %t, i32* %a, i32** noalias %ptr) { ; CHECK-LABEL: @crash_instructions_deleted( ; CHECK-NEXT: bb: +; CHECK-NEXT: [[T42:%.*]] = bitcast float* [[T:%.*]] to i8* ; CHECK-NEXT: [[T15:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 2 ; CHECK-NEXT: [[T16:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[T15]] to <2 x i32>* @@ -1179,10 +1357,25 @@ ; CHECK-NEXT: [[T23:%.*]] = getelementptr inbounds i8, i8* [[T22]], i64 1 ; CHECK-NEXT: [[T24:%.*]] = getelementptr inbounds i8, i8* [[T22]], i64 2 ; CHECK-NEXT: [[T25:%.*]] = getelementptr inbounds i8, i8* [[T22]], i64 3 +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[T17]], i64 2 +; CHECK-NEXT: [[SCEVGEP18:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[SCEVGEP43:%.*]] = getelementptr float, float* [[T]], i64 3 +; CHECK-NEXT: [[SCEVGEP4344:%.*]] = bitcast float* [[SCEVGEP43]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP4344]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[T22]], [[UGLYGEP]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[T42]], [[SCEVGEP18]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[T22]], [[SCEVGEP18]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP45:%.*]] = icmp ugt i8* [[T42]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK46:%.*]] = or i1 [[CHECK]], [[WRAP45]] +; CHECK-NEXT: br i1 [[CHECK46]], label [[BB18_SCALAR:%.*]], label [[BB18_SLPVERSIONED1:%.*]] +; CHECK: bb18.scalar: ; CHECK-NEXT: [[T26:%.*]] = load i8, i8* [[T22]], align 1 ; CHECK-NEXT: [[T27:%.*]] = uitofp i8 [[T26]] to float ; CHECK-NEXT: [[T28:%.*]] = fdiv float [[T27]], 2.550000e+02 -; CHECK-NEXT: [[T29:%.*]] = getelementptr inbounds float, float* [[T:%.*]], i64 0 +; CHECK-NEXT: [[T29:%.*]] = getelementptr inbounds float, float* [[T]], i64 0 ; CHECK-NEXT: store float [[T28]], float* [[T29]], align 8 ; CHECK-NEXT: [[T30:%.*]] = load i8, i8* [[T23]], align 1 ; CHECK-NEXT: [[T31:%.*]] = uitofp i8 [[T30]] to float @@ -1199,7 +1392,21 @@ ; CHECK-NEXT: [[T40:%.*]] = fdiv float [[T39]], 2.550000e+02 ; CHECK-NEXT: [[T41:%.*]] = getelementptr inbounds float, float* [[T]], i64 3 ; CHECK-NEXT: store float [[T40]], float* [[T41]], align 4 +; CHECK-NEXT: br label [[BB18_MERGE:%.*]] +; CHECK: bb18.merge: ; CHECK-NEXT: ret void +; CHECK: bb18.slpversioned1: +; CHECK-NEXT: [[T295:%.*]] = getelementptr inbounds float, float* [[T]], i64 0 +; CHECK-NEXT: [[T339:%.*]] = getelementptr inbounds float, float* [[T]], i64 1 +; CHECK-NEXT: [[T3713:%.*]] = getelementptr inbounds float, float* [[T]], i64 2 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[T22]] to <4 x i8>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i8>, <4 x i8>* [[TMP1]], align 1, !alias.scope !25, !noalias !28 +; CHECK-NEXT: [[TMP3:%.*]] = uitofp <4 x i8> [[TMP2]] to <4 x float> +; CHECK-NEXT: [[TMP4:%.*]] = fdiv <4 x float> [[TMP3]], +; CHECK-NEXT: [[T4117:%.*]] = getelementptr inbounds float, float* [[T]], i64 3 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[T295]] to <4 x float>* +; CHECK-NEXT: store <4 x float> [[TMP4]], <4 x float>* [[TMP5]], align 8, !alias.scope !28, !noalias !25 +; CHECK-NEXT: br label [[BB18_MERGE]] ; bb: %t6 = icmp slt i32 10, 0 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll b/llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll --- a/llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll @@ -1,11 +1,32 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -scoped-noalias-aa -slp-vectorizer -mtriple=x86_64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s +; RUN: opt -slp-memory-versioning -scoped-noalias-aa -slp-vectorizer -mtriple=x86_64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s +; RUN: opt -slp-memory-versioning=false -scoped-noalias-aa -slp-vectorizer -mtriple=x86_64-apple-darwin -enable-new-pm=false -S %s | FileCheck --check-prefix=NOVERSION %s + +; NOVERSION-NOT: memcheck define void @version_multiple(i32* nocapture %out_block, i32* nocapture readonly %counter) { ; CHECK-LABEL: @version_multiple( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[COUNTER:%.*]], align 4 -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[OUT_BLOCK:%.*]], align 4 +; CHECK-NEXT: [[COUNTER12:%.*]] = bitcast i32* [[COUNTER:%.*]] to i8* +; CHECK-NEXT: [[OUT_BLOCK14:%.*]] = bitcast i32* [[OUT_BLOCK:%.*]] to i8* +; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[COUNTER]], i64 3 +; CHECK-NEXT: [[SCEVGEP13:%.*]] = bitcast i32* [[SCEVGEP]] to i8* +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP13]], i64 1 +; CHECK-NEXT: [[SCEVGEP15:%.*]] = getelementptr i32, i32* [[OUT_BLOCK]], i64 3 +; CHECK-NEXT: [[SCEVGEP1516:%.*]] = bitcast i32* [[SCEVGEP15]] to i8* +; CHECK-NEXT: [[UGLYGEP17:%.*]] = getelementptr i8, i8* [[SCEVGEP1516]], i64 1 +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[COUNTER12]], [[UGLYGEP17]] +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[OUT_BLOCK14]], [[UGLYGEP]] +; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] +; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true +; CHECK-NEXT: [[WRAP:%.*]] = icmp ugt i8* [[COUNTER12]], [[UGLYGEP]] +; CHECK-NEXT: [[CHECK:%.*]] = or i1 [[MEMCHECK_CONFLICT]], [[WRAP]] +; CHECK-NEXT: [[WRAP18:%.*]] = icmp ugt i8* [[OUT_BLOCK14]], [[UGLYGEP17]] +; CHECK-NEXT: [[CHECK19:%.*]] = or i1 [[CHECK]], [[WRAP18]] +; CHECK-NEXT: br i1 [[CHECK19]], label [[ENTRY_SCALAR:%.*]], label [[ENTRY_SLPVERSIONED1:%.*]] +; CHECK: entry.scalar: +; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[COUNTER]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[OUT_BLOCK]], align 4 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[TMP1]], [[TMP0]] ; CHECK-NEXT: store i32 [[XOR]], i32* [[OUT_BLOCK]], align 4 ; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 1 @@ -26,7 +47,24 @@ ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX2_3]], align 4 ; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[TMP7]], [[TMP6]] ; CHECK-NEXT: store i32 [[XOR_3]], i32* [[ARRAYIDX2_3]], align 4 +; CHECK-NEXT: br label [[ENTRY_MERGE:%.*]] +; CHECK: entry.merge: ; CHECK-NEXT: ret void +; CHECK: entry.slpversioned1: +; CHECK-NEXT: [[ARRAYIDX_13:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 1 +; CHECK-NEXT: [[ARRAYIDX2_14:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 1 +; CHECK-NEXT: [[ARRAYIDX_26:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 2 +; CHECK-NEXT: [[ARRAYIDX2_27:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 2 +; CHECK-NEXT: [[ARRAYIDX_39:%.*]] = getelementptr inbounds i32, i32* [[COUNTER]], i64 3 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32* [[COUNTER]] to <4 x i32>* +; CHECK-NEXT: [[TMP9:%.*]] = load <4 x i32>, <4 x i32>* [[TMP8]], align 4, !alias.scope !0, !noalias !3 +; CHECK-NEXT: [[ARRAYIDX2_310:%.*]] = getelementptr inbounds i32, i32* [[OUT_BLOCK]], i64 3 +; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[OUT_BLOCK]] to <4 x i32>* +; CHECK-NEXT: [[TMP11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP10]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: [[TMP12:%.*]] = xor <4 x i32> [[TMP11]], [[TMP9]] +; CHECK-NEXT: [[TMP13:%.*]] = bitcast i32* [[OUT_BLOCK]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP12]], <4 x i32>* [[TMP13]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: br label [[ENTRY_MERGE]] ; entry: %0 = load i32, i32* %counter, align 4