diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -91,17 +91,25 @@ // creation will depend on the TM and the code generation flags on the // function that reside in TargetOptions. resetTargetOptions(F); - auto ABIName = Options.MCOptions.getABIName(); - if (const MDString *ModuleTargetABI = dyn_cast_or_null( + + // The taget-abi option should equal to target-abi module flag because + // the different ABI has its corresponding datalayout and IR alignment + // information. In addition, the IR parser need to have datalayout + // information before it gets the ABI info from module. It does not make + // sense to update the module's datalayout and alignment information after + // IR parsing. + StringRef OptABIName = Options.MCOptions.getABIName(); + if (const MDString *MDModuleABI = dyn_cast_or_null( F.getParent()->getModuleFlag("target-abi"))) { - auto TargetABI = RISCVABI::getTargetABI(ABIName); - if (TargetABI != RISCVABI::ABI_Unknown && - ModuleTargetABI->getString() != ABIName) { - report_fatal_error("-target-abi option != target-abi module flag"); - } - ABIName = ModuleTargetABI->getString(); + StringRef ModuleABIName = MDModuleABI->getString(); + if (OptABIName != ModuleABIName) + errs() << "Inconsistent ABI string representation. -target-abi option " + "is '" + + OptABIName + "' but IR target-abi module flag is '" + + ModuleABIName + "'.\n"; } - I = std::make_unique(TargetTriple, CPU, TuneCPU, FS, ABIName, *this); + I = std::make_unique(TargetTriple, CPU, TuneCPU, FS, + OptABIName, *this); } return I.get(); } diff --git a/llvm/test/CodeGen/RISCV/module-target-abi.ll b/llvm/test/CodeGen/RISCV/module-target-abi.ll --- a/llvm/test/CodeGen/RISCV/module-target-abi.ll +++ b/llvm/test/CodeGen/RISCV/module-target-abi.ll @@ -1,20 +1,13 @@ -; RUN: llc -mtriple=riscv32 < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=DEFAULT %s -; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s -; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s -; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s +; Need to specific -target-abi option although the rv32 default ABI is +; ilp32 which eqaul to target-abi module flag. +; RUN: llc -mtriple=riscv32 < %s -o /dev/null 2>&1 | FileCheck %s +; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s -o /dev/null 2>&1 \ +; RUN: | FileCheck -check-prefix=MISMATCH %s -; RV32IF-ILP32F: -target-abi option != target-abi module flag - -; FLAGS: Flags: 0x0 +; CHECK: Inconsistent ABI string representation. -target-abi option is '' but IR target-abi module flag is 'ilp32'. +; MISMATCH: Inconsistent ABI string representation. -target-abi option is 'ilp32f' but IR target-abi module flag is 'ilp32'. define float @foo(i32 %a) nounwind #0 { -; DEFAULT: # %bb.0: -; DEFAULT: fmv.x.w a0, ft0 -; RV32IF-ILP32: # %bb.0: -; RV32IF-ILP32: fmv.x.w a0, ft0 %conv = sitofp i32 %a to float ret float %conv } diff --git a/llvm/test/CodeGen/RISCV/module-target-abi2.ll b/llvm/test/CodeGen/RISCV/module-target-abi2.ll --- a/llvm/test/CodeGen/RISCV/module-target-abi2.ll +++ b/llvm/test/CodeGen/RISCV/module-target-abi2.ll @@ -1,23 +1,12 @@ -; RUN: llc -mtriple=riscv32 < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=DEFAULT %s -; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s -; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ -; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s -; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s +; Need to specific -target-abi option because target-abi module flag is not empty +; RUN: llc -mtriple=riscv32 < %s -o /dev/null 2>&1 | FileCheck %s +; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s -o /dev/null 2>&1 \ +; RUN: | FileCheck -check-prefix=MISMATCH %s -; RV32IF-ILP32: -target-abi option != target-abi module flag - -; FLAGS: Flags: 0x0 -; // this should be "Flags :0x2, single-float ABI", it will be fixed later. +; CHECK: Inconsistent ABI string representation. -target-abi option is '' but IR target-abi module flag is 'ilp32f'. +; MISMATCH: Inconsistent ABI string representation. -target-abi option is 'ilp32' but IR target-abi module flag is 'ilp32f'. define float @foo(i32 %a) nounwind #0 { -; DEFAULT: # %bb.0: -; DEFAULT-NEXT: fcvt.s.w fa0, a0 -; DEFAULT-NEXT: ret -; RV32IF-ILP32F: # %bb.0: -; RV32IF-ILP32F: fcvt.s.w fa0, a0 -; RV32IF-ILP32F: ret %conv = sitofp i32 %a to float ret float %conv }