This is an archive of the discontinued LLVM Phabricator instance.

[RISCV] Allow passing fixed-length vectors via the stack
ClosedPublic

Authored by frasercrmck on May 13 2021, 10:14 AM.

Details

Summary

The vector calling convention dictates that when the vector argument
registers are exhaused, GPRs are used to pass the address via the stack.
When the GPRs themselves are exhausted, at best we would previously
crash with an assertion, and at worst we'd generate incorrect code.

This patch addresses this issue by passing fixed-length vectors via the
stack with their full fixed-length size and aligned to their element
type size. Since the calling convention lowering can't yet handle
scalable vector types, this patch adds a fatal error to make it clear
that we are lacking in this regard.

Diff Detail

Event Timeline

frasercrmck created this revision.May 13 2021, 10:14 AM
frasercrmck requested review of this revision.May 13 2021, 10:14 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 13 2021, 10:14 AM
  • rebase
  • fix zero alignment for small mask vectors
This revision is now accepted and ready to land.May 26 2021, 2:01 AM
  • rebase
  • (hopefully) fix windows build
  • rebase again to try and get some windows testing
  • rebase on top of test changes
  • simpler way of expressing alignment
This revision was landed with ongoing or failed builds.May 27 2021, 6:22 AM
This revision was automatically updated to reflect the committed changes.