Index: llvm/lib/Target/AArch64/AArch64InstrFormats.td =================================================================== --- llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -1483,7 +1483,7 @@ // "bti" is an alias to "hint" only for certain values of CRm:Op2 fields. if (!MCOp.isImm()) return false; - return AArch64BTIHint::lookupBTIByEncoding((MCOp.getImm() ^ 32) >> 1) != nullptr; + return AArch64BTIHint::lookupBTIByEncoding(MCOp.getImm() ^ 32) != nullptr; }]; } Index: llvm/lib/Target/AArch64/AArch64SystemOperands.td =================================================================== --- llvm/lib/Target/AArch64/AArch64SystemOperands.td +++ llvm/lib/Target/AArch64/AArch64SystemOperands.td @@ -387,18 +387,18 @@ // BTI instruction options. //===----------------------------------------------------------------------===// -class BTI encoding> : SearchableTable { +class BTI encoding> : SearchableTable { let SearchableFields = ["Name", "Encoding"]; let EnumValueField = "Encoding"; string Name = name; - bits<2> Encoding; + bits<3> Encoding; let Encoding = encoding; } -def : BTI<"c", 0b01>; -def : BTI<"j", 0b10>; -def : BTI<"jc", 0b11>; +def : BTI<"c", 0b010>; +def : BTI<"j", 0b100>; +def : BTI<"jc", 0b110>; //===----------------------------------------------------------------------===// // TLBI (translation lookaside buffer invalidate) instruction options. Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -2046,7 +2046,7 @@ SMLoc S, MCContext &Ctx) { auto Op = std::make_unique(k_BTIHint, Ctx); - Op->BTIHint.Val = Val << 1 | 32; + Op->BTIHint.Val = Val | 32; Op->BTIHint.Data = Str.data(); Op->BTIHint.Length = Str.size(); Op->StartLoc = S; Index: llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp =================================================================== --- llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp +++ llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp @@ -1152,7 +1152,7 @@ void AArch64InstPrinter::printBTIHintOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) { - unsigned btihintop = (MI->getOperand(OpNum).getImm() ^ 32) >> 1; + unsigned btihintop = MI->getOperand(OpNum).getImm() ^ 32; auto BTI = AArch64BTIHint::lookupBTIByEncoding(btihintop); if (BTI) O << BTI->Name; Index: llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt =================================================================== --- llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt +++ llvm/test/MC/Disassembler/AArch64/armv8.5a-bti.txt @@ -7,12 +7,27 @@ [0x9f 0x24 0x03 0xd5] [0xdf 0x24 0x03 0xd5] +[0x3f 0x24 0x03 0xd5] +[0x7f 0x24 0x03 0xd5] +[0xbf 0x24 0x03 0xd5] +[0xff 0x24 0x03 0xd5] + # CHECK: bti # CHECK: bti c # CHECK: bti j # CHECK: bti jc +# CHECK: hint #33 +# CHECK: hint #35 +# CHECK: hint #37 +# CHECK: hint #39 + # NOBTI: hint #32 # NOBTI: hint #34 # NOBTI: hint #36 # NOBTI: hint #38 + +# NOBTI: hint #33 +# NOBTI: hint #35 +# NOBTI: hint #37 +# NOBTI: hint #39