Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17916,8 +17916,10 @@
   if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Value)) {
     if (Ld->getBasePtr() == Ptr && ST->getMemoryVT() == Ld->getMemoryVT() &&
         ST->isUnindexed() && ST->isSimple() &&
+       Ld->getAddressSpace() ==
+            ST->getAddressSpace() &&
         // There can't be any side effects between the load and store, such as
-        // a call or store.
+       // a call or store.
         Chain.reachesChainWithoutSideEffects(SDValue(Ld, 1))) {
       // The store is dead, remove it.
       return Chain;
@@ -17929,7 +17931,9 @@
     if (ST->isUnindexed() && ST->isSimple() &&
         ST1->isUnindexed() && ST1->isSimple()) {
       if (ST1->getBasePtr() == Ptr && ST1->getValue() == Value &&
-          ST->getMemoryVT() == ST1->getMemoryVT()) {
+          ST->getMemoryVT() == ST1->getMemoryVT() &&
+          ST->getAddressSpace() ==
+              ST1->getAddressSpace()) {
         // If this is a store followed by a store with the same value to the
         // same location, then the store is dead/noop.
         return Chain;
@@ -17940,7 +17944,9 @@
           // BaseIndexOffset and the code below requires knowing the size
           // of a vector, so bail out if MemoryVT is scalable.
           !ST->getMemoryVT().isScalableVector() &&
-          !ST1->getMemoryVT().isScalableVector()) {
+          !ST1->getMemoryVT().isScalableVector() &&
+          ST->getAddressSpace() ==
+              ST1->getAddressSpace()) {
         const BaseIndexOffset STBase = BaseIndexOffset::match(ST, DAG);
         const BaseIndexOffset ChainBase = BaseIndexOffset::match(ST1, DAG);
         unsigned STBitSize = ST->getMemoryVT().getFixedSizeInBits();
Index: llvm/test/CodeGen/X86/dagcombine-dead-store.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/dagcombine-dead-store.ll
@@ -0,0 +1,87 @@
+; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+
+; Checks that the stores aren't eliminated by the DAG combiner, because the address
+; spaces are different. In X86, we're checking this for two non-zero address spaces,
+; one for :fs and one for :gs. The test's 'same' and 'diff' notation depicts the
+; pointer value exposing bugs hitting corner cases where the case where the pointer
+; value is either the same, or different.
+
+; CHECK-LABEL: copy_fs_same:
+; CHECK: movl 1, %eax
+; CHECK-NEXT: movl %eax, %fs:1
+define i32 @copy_fs_same() {
+entry:
+   %0 = load i32, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %0, i32 addrspace(257)* inttoptr (i64 1 to i32 addrspace(257)*), align 4
+  ret i32 %0
+}
+
+; CHECK-LABEL: copy_fs_diff:
+; CHECK: movl 1, %eax
+; CHECK-NEXT: movl %eax, %fs:2
+define i32 @copy_fs_diff() {
+entry:
+   %0 = load i32, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %0, i32 addrspace(257)* inttoptr (i64 2 to i32 addrspace(257)*), align 4
+  ret i32 %0
+}
+
+; CHECK-LABEL: copy_gs_same:
+; CHECK: movl 1, %eax
+; CHECK-NEXT: movl %eax, %gs:1
+define i32 @copy_gs_same() {
+entry:
+   %0 = load i32, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %0, i32 addrspace(256)* inttoptr (i64 1 to i32 addrspace(256)*), align 4
+  ret i32 %0
+}
+
+; CHECK-LABEL: copy_gs_diff:
+; CHECK: movl 1, %eax
+; CHECK-NEXT: movl %eax, %gs:2
+define i32 @copy_gs_diff() {
+entry:
+   %0 = load i32, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %0, i32 addrspace(256)* inttoptr (i64 2 to i32 addrspace(256)*), align 4
+  ret i32 %0
+}
+
+; CHECK-LABEL: output_fs_same:
+; CHECK: movl %eax, 1
+; CHECK-NEXT: movl %eax, %fs:1
+define void @output_fs_same(i32 %v) {
+entry:
+  store i32 %v, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %v, i32 addrspace(257)* inttoptr (i64 1 to i32 addrspace(257)*), align 4
+  ret void
+}
+
+; CHECK-LABEL: output_fs_diff:
+; CHECK: movl %eax, 1
+; CHECK-NEXT: movl %eax, %fs:2
+define void @output_fs_diff(i32 %v) {
+entry:
+  store i32 %v, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %v, i32 addrspace(257)* inttoptr (i64 2 to i32 addrspace(257)*), align 4
+  ret void
+}
+
+; CHECK-LABEL: output_gs_same:
+; CHECK: movl %eax, 1
+; CHECK-NEXT: movl %eax, %gs:1
+define void @output_gs_same(i32 %v) {
+entry:
+  store i32 %v, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %v, i32 addrspace(256)* inttoptr (i64 1 to i32 addrspace(256)*), align 4
+  ret void
+}
+
+; CHECK-LABEL: output_gs_diff:
+; CHECK: movl %eax, 1
+; CHECK-NEXT: movl %eax, %gs:2
+define void @output_gs_diff(i32 %v) {
+entry:
+  store i32 %v, i32* inttoptr (i64 1 to i32*), align 4
+  store i32 %v, i32 addrspace(256)* inttoptr (i64 2 to i32 addrspace(256)*), align 4
+  ret void
+}