diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll @@ -24,7 +24,7 @@ %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %cmp = icmp slt i32 %1, %3, !dbg !29 - br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 + br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond %4 = bitcast i32* %i to i8*, !dbg !31 @@ -171,3 +171,4 @@ !58 = distinct !{!58, !52, !59} !59 = !DILocation(line: 10, column: 12, scope: !43) !60 = !DILocation(line: 11, column: 1, scope: !39) +!61 = !{!"branch_weights", i32 1, i32 1048575} diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected @@ -25,25 +25,25 @@ ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -61,7 +61,7 @@ %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %cmp = icmp slt i32 %1, %3, !dbg !29 - br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 + br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond %4 = bitcast i32* %i to i8*, !dbg !31 @@ -102,36 +102,36 @@ ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -244,3 +244,4 @@ !58 = distinct !{!58, !52, !59} !59 = !DILocation(line: 10, column: 12, scope: !43) !60 = !DILocation(line: 11, column: 1, scope: !39) +!61 = !{!"branch_weights", i32 1, i32 1048575} diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected @@ -26,25 +26,25 @@ ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -62,7 +62,7 @@ %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %cmp = icmp slt i32 %1, %3, !dbg !29 - br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 + br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond %4 = bitcast i32* %i to i8*, !dbg !31 @@ -99,41 +99,41 @@ ; Function Attrs: nounwind uwtable define dso_local void @bar(i32* %A) #0 !dbg !39 { ; CHECK-LABEL: define {{[^@]+}}@bar -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG39:![0-9]+]] { +; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -246,3 +246,4 @@ !58 = distinct !{!58, !52, !59} !59 = !DILocation(line: 10, column: 12, scope: !43) !60 = !DILocation(line: 11, column: 1, scope: !39) +!61 = !{!"branch_weights", i32 1, i32 1048575} diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected --- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected +++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected @@ -26,25 +26,25 @@ ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -62,7 +62,7 @@ %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %cmp = icmp slt i32 %1, %3, !dbg !29 - br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 + br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61 for.cond.cleanup: ; preds = %for.cond %4 = bitcast i32* %i to i8*, !dbg !31 @@ -99,41 +99,41 @@ ; Function Attrs: nounwind uwtable define dso_local void @bar(i32* %A) #0 !dbg !39 { ; CHECK-LABEL: define {{[^@]+}}@bar -; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG39:![0-9]+]] { +; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] -; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] -; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] -; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]] +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]] +; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]] ; CHECK: for.cond: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]] ; CHECK: for.cond.cleanup: -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] -; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]] +; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] -; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]] +; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]] +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]] +; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]] ; CHECK: for.inc: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] -; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] -; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] -; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]] +; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]] +; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]] +; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]] ; CHECK: for.end: -; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] +; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]] ; entry: %A.addr = alloca i32*, align 8 @@ -246,6 +246,7 @@ !58 = distinct !{!58, !52, !59} !59 = !DILocation(line: 10, column: 12, scope: !43) !60 = !DILocation(line: 11, column: 1, scope: !39) +!61 = !{!"branch_weights", i32 1, i32 1048575} ;. ; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } @@ -283,34 +284,35 @@ ; CHECK: [[DBG28]] = !DILocation(line: 3, column: 23, scope: !26) ; CHECK: [[DBG29]] = !DILocation(line: 3, column: 21, scope: !26) ; CHECK: [[DBG30]] = !DILocation(line: 3, column: 3, scope: !15) -; CHECK: [[DBG31]] = !DILocation(line: 3, column: 3, scope: !26) -; CHECK: [[DBG32]] = !DILocation(line: 4, column: 5, scope: !26) -; CHECK: [[DBG33]] = !DILocation(line: 4, column: 7, scope: !26) -; CHECK: [[DBG34]] = !DILocation(line: 4, column: 10, scope: !26) -; CHECK: [[DBG35]] = !DILocation(line: 3, column: 27, scope: !26) -; CHECK: [[LOOP36]] = distinct !{!36, !30, !37} -; CHECK: [[META37:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15) -; CHECK: [[DBG38]] = !DILocation(line: 5, column: 1, scope: !7) -; CHECK: [[DBG39]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !40) -; CHECK: [[META40:![0-9]+]] = !{!41, !42} -; CHECK: [[META41]] = !DILocalVariable(name: "A", arg: 1, scope: !39, file: !1, line: 7, type: !10) -; CHECK: [[META42]] = !DILocalVariable(name: "i", scope: !43, file: !1, line: 9, type: !11) -; CHECK: [[META43:![0-9]+]] = distinct !DILexicalBlock(scope: !39, file: !1, line: 9, column: 3) -; CHECK: [[DBG44]] = !DILocation(line: 7, column: 15, scope: !39) -; CHECK: [[DBG45]] = !DILocation(line: 9, column: 8, scope: !43) -; CHECK: [[DBG46]] = !DILocation(line: 9, column: 12, scope: !43) -; CHECK: [[DBG47]] = !DILocation(line: 9, column: 19, scope: !48) -; CHECK: [[META48:![0-9]+]] = distinct !DILexicalBlock(scope: !43, file: !1, line: 9, column: 3) -; CHECK: [[DBG49]] = !DILocation(line: 9, column: 24, scope: !48) -; CHECK: [[DBG50]] = !DILocation(line: 9, column: 23, scope: !48) -; CHECK: [[DBG51]] = !DILocation(line: 9, column: 21, scope: !48) -; CHECK: [[DBG52]] = !DILocation(line: 9, column: 3, scope: !43) -; CHECK: [[DBG53]] = !DILocation(line: 9, column: 3, scope: !48) -; CHECK: [[DBG54]] = !DILocation(line: 10, column: 5, scope: !48) -; CHECK: [[DBG55]] = !DILocation(line: 10, column: 7, scope: !48) -; CHECK: [[DBG56]] = !DILocation(line: 10, column: 10, scope: !48) -; CHECK: [[DBG57]] = !DILocation(line: 9, column: 27, scope: !48) -; CHECK: [[LOOP58]] = distinct !{!58, !52, !59} -; CHECK: [[META59:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !43) -; CHECK: [[DBG60]] = !DILocation(line: 11, column: 1, scope: !39) +; CHECK: [[PROF31]] = !{!"branch_weights", i32 1, i32 1048575} +; CHECK: [[DBG32]] = !DILocation(line: 3, column: 3, scope: !26) +; CHECK: [[DBG33]] = !DILocation(line: 4, column: 5, scope: !26) +; CHECK: [[DBG34]] = !DILocation(line: 4, column: 7, scope: !26) +; CHECK: [[DBG35]] = !DILocation(line: 4, column: 10, scope: !26) +; CHECK: [[DBG36]] = !DILocation(line: 3, column: 27, scope: !26) +; CHECK: [[LOOP37]] = distinct !{!37, !30, !38} +; CHECK: [[META38:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15) +; CHECK: [[DBG39]] = !DILocation(line: 5, column: 1, scope: !7) +; CHECK: [[DBG40]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !41) +; CHECK: [[META41:![0-9]+]] = !{!42, !43} +; CHECK: [[META42]] = !DILocalVariable(name: "A", arg: 1, scope: !40, file: !1, line: 7, type: !10) +; CHECK: [[META43]] = !DILocalVariable(name: "i", scope: !44, file: !1, line: 9, type: !11) +; CHECK: [[META44:![0-9]+]] = distinct !DILexicalBlock(scope: !40, file: !1, line: 9, column: 3) +; CHECK: [[DBG45]] = !DILocation(line: 7, column: 15, scope: !40) +; CHECK: [[DBG46]] = !DILocation(line: 9, column: 8, scope: !44) +; CHECK: [[DBG47]] = !DILocation(line: 9, column: 12, scope: !44) +; CHECK: [[DBG48]] = !DILocation(line: 9, column: 19, scope: !49) +; CHECK: [[META49:![0-9]+]] = distinct !DILexicalBlock(scope: !44, file: !1, line: 9, column: 3) +; CHECK: [[DBG50]] = !DILocation(line: 9, column: 24, scope: !49) +; CHECK: [[DBG51]] = !DILocation(line: 9, column: 23, scope: !49) +; CHECK: [[DBG52]] = !DILocation(line: 9, column: 21, scope: !49) +; CHECK: [[DBG53]] = !DILocation(line: 9, column: 3, scope: !44) +; CHECK: [[DBG54]] = !DILocation(line: 9, column: 3, scope: !49) +; CHECK: [[DBG55]] = !DILocation(line: 10, column: 5, scope: !49) +; CHECK: [[DBG56]] = !DILocation(line: 10, column: 7, scope: !49) +; CHECK: [[DBG57]] = !DILocation(line: 10, column: 10, scope: !49) +; CHECK: [[DBG58]] = !DILocation(line: 9, column: 27, scope: !49) +; CHECK: [[LOOP59]] = distinct !{!59, !53, !60} +; CHECK: [[META60:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !44) +; CHECK: [[DBG61]] = !DILocation(line: 11, column: 1, scope: !40) ;. diff --git a/llvm/utils/UpdateTestChecks/common.py b/llvm/utils/UpdateTestChecks/common.py --- a/llvm/utils/UpdateTestChecks/common.py +++ b/llvm/utils/UpdateTestChecks/common.py @@ -438,6 +438,7 @@ NamelessValue(r'GLOB' , '@' , r'@' , None , None , r'[0-9]+' , None , False) , NamelessValue(r'GLOB' , '@' , None , r'@' , r'[a-zA-Z0-9_$"\\.-]+' , None , r'.+' , True) , NamelessValue(r'DBG' , '!' , r'!dbg ' , None , None , r'![0-9]+' , None , False) , + NamelessValue(r'PROF' , '!' , r'!prof ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'TBAA' , '!' , r'!tbaa ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'RNG' , '!' , r'!range ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'LOOP' , '!' , r'!llvm.loop ' , None , None , r'![0-9]+' , None , False) ,