diff --git a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp --- a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp +++ b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp @@ -349,8 +349,7 @@ MF.RenumberBlocks(); for (MachineBasicBlock &MBB : MF) { - MachineBasicBlock::iterator MBBE = MBB.getFirstTerminator(); - MachineBasicBlock::iterator TermI = MBBE; + MachineBasicBlock::iterator TermI = MBB.getFirstTerminator(); // Check first terminator for branches to optimize if (TermI != MBB.end()) { MachineInstr &MI = *TermI; @@ -358,11 +357,9 @@ case AMDGPU::S_CBRANCH_VCCZ: case AMDGPU::S_CBRANCH_VCCNZ: Changed |= optimizeVccBranch(MI); - continue; + break; case AMDGPU::S_CBRANCH_EXECZ: Changed |= removeExeczBranch(MI, MBB); - continue; - default: break; } } @@ -378,11 +375,8 @@ // and limit the distance to 20 instructions for compile time purposes. // Note: this needs to work on bundles as S_SET_GPR_IDX* instructions // may be bundled with the instructions they modify. - for (MachineBasicBlock::instr_iterator MBBI = MBB.instr_begin(); - MBBI != MBBE;) { - MachineInstr &MI = *MBBI; - ++MBBI; - + for (auto &MI : + make_early_inc_range(make_range(MBB.instr_begin(), MBB.instr_end()))) { if (Count == Threshold) SetGPRMI = nullptr; else diff --git a/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir b/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir --- a/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir +++ b/llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir @@ -475,7 +475,6 @@ } ... -# FIXME: remove S_SET_GPR_IDX_* despite the branch at the end of the block --- name: simple_cbranch_vccz body: | @@ -484,8 +483,6 @@ ; GCN: successors: %bb.1(0x80000000) ; GCN: S_SET_GPR_IDX_ON $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0 ; GCN: $vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0 - ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode - ; GCN: S_SET_GPR_IDX_ON killed $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0 ; GCN: $vgpr15 = V_MOV_B32_e32 undef $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0 ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode ; GCN: S_CBRANCH_VCCZ %bb.1, implicit $vcc @@ -501,7 +498,6 @@ bb.1: ... -# FIXME: remove S_SET_GPR_IDX_* despite the branch at the end of the block --- name: simple_cbranch_execz body: | @@ -510,8 +506,6 @@ ; GCN: successors: ; GCN: S_SET_GPR_IDX_ON $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0 ; GCN: $vgpr16 = V_MOV_B32_e32 undef $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0 - ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode - ; GCN: S_SET_GPR_IDX_ON killed $sgpr2, 1, implicit-def $mode, implicit-def $m0, implicit $mode, implicit undef $m0 ; GCN: $vgpr15 = V_MOV_B32_e32 undef $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $m0 ; GCN: S_SET_GPR_IDX_OFF implicit-def $mode, implicit $mode ; GCN: bb.1: