Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRI.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRI.mir
+++ /dev/null
@@ -1,41 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=XOR16DI,XOR32DI
-
-#------------------------------------------------------------------------------
-# MxBiArOp_RFRI class used for binary arithmetic operations and operates on
-# register and immediate data. It uses MxArithImmEncoding class. This is special
-# case for XOR.
-#------------------------------------------------------------------------------
-
-
-#               -------------------------------+-------+-----------+-----------
-#                F   E   D   C   B   A   9   8 | 7   6 | 5   4   3 | 2   1   0
-#               -------------------------------+-------+-----------+-----------
-#                x   x   x   x   x   x   x   x |  SIZE |    MODE   |    REG
-#               -------------------------------+-------+-----------+-----------
-# XOR16DI:       0   0   0   0   1   0   1   0 . 0   1   0   0   0   0   0   0
-# XOR16DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-#               -------------------------------+-------------------------------
-# XOR16DI-SAME:  0   0   0   0   1   0   1   0 . 0   1   0   0   0   0   1   1
-# XOR16DI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-#               -------------------------------+-------------------------------
-# XOR32DI-SAME:  0   0   0   0   1   0   1   0 . 1   0   0   0   0   0   0   0
-# XOR32DI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-# XOR32DI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-#               -------------------------------+-------------------------------
-# XOR32DI-SAME:  0   0   0   0   1   0   1   0 . 1   0   0   0   0   0   0   0
-# XOR32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   1
-# XOR32DI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-#               -------------------------------+-------------------------------
-# XOR32DI-SAME:  0   0   0   0   1   0   1   0 . 1   0   0   0   0   1   1   1
-# XOR32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   1   1   1
-# XOR32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-name: MxBiArOp_RFRI
-body: |
-  bb.0:
-    $wd0 = XOR16di $wd0, 0,      implicit-def $ccr
-    $wd3 = XOR16di $wd3, -1,     implicit-def $ccr
-    $d0  = XOR32di  $d0, -1,     implicit-def $ccr
-    $d0  = XOR32di  $d0, 131071, implicit-def $ccr
-    $d7  = XOR32di  $d7, 458752, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRRF.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRRF.mir
+++ /dev/null
@@ -1,27 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=ADDX16DD,ADDX32DD
-
-#------------------------------------------------------------------------------
-# MxBiArOp_RFRRF class used for carry-aware binary arithmetic operations and
-# operates on both data and address registers only. It uses MxArithXEncoding
-# encoding class and either MxOpModeNdEA or MxOpModeNrEA opmode classes.
-#------------------------------------------------------------------------------
-
-
-#               ---------------------------------------------------------------
-#                F   E   D   C | B   A   9 | 8 | 7   6 | 5   4 | 3 | 2   1   0
-#               ---------------+-----------+---+-------+-------+---+-----------
-#                x   x   x   x |   REG Rx  | 1 |  SIZE | 0   0 | M |  REG Ry
-#               ---------------+-----------+---+-------+-------+---+-----------
-# ADDX16DD:      1   1   0   1   0   0   0   1 . 0   1   0   0   0   0   0   1
-# ADDX16DD-SAME: 1   1   0   1   0   1   1   1 . 0   1   0   0   0   0   1   0
-# ADDX32DD-SAME: 1   1   0   1   0   0   0   1 . 1   0   0   0   0   0   0   1
-# ADDX32DD-SAME: 1   1   0   1   1   1   1   1 . 1   0   0   0   0   0   0   1
-name: MxBiArOp_RFRRF
-body: |
-  bb.0:
-    $wd0 = ADDX16dd $wd0, $wd1, implicit $ccr, implicit-def $ccr
-    $wd3 = ADDX16dd $wd3, $wd2, implicit $ccr, implicit-def $ccr
-    $d0  = ADDX32dd  $d0,  $d1, implicit $ccr, implicit-def $ccr
-    $d7  = ADDX32dd  $d7,  $d1, implicit $ccr, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRR_EAd.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRR_EAd.mir
+++ /dev/null
@@ -1,26 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=XOR16DD,XOR32DD
-
-#------------------------------------------------------------------------------
-# MxBiArOp_RFRR_EAd class used for binary arithmetic operations and operates on
-# both data and address registers only. It uses MxArithEncoding encoding class
-# and MxOpModeEAd opmode class. This is a special case for XOR(EOR).
-#------------------------------------------------------------------------------
-
-
-#               ---------------+-----------+-----------+-----------+-----------
-#                F   E   D   C | B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#               ---------------+-----------+-----------+-----------+-----------
-#                x   x   x   x |    REG    |   OPMODE  |    MODE   |    REG
-# XOR16DD:       1   0   1   1   0   0   1   1 . 0   1   0   0   0   0   0   0
-# XOR16DD-SAME:  1   0   1   1   0   1   0   1 . 0   1   0   0   0   0   1   1
-# XOR32DD-SAME:  1   0   1   1   0   0   1   1 . 1   0   0   0   0   0   0   0
-# XOR32DD-SAME:  1   0   1   1   0   0   1   1 . 1   0   0   0   0   1   1   1
-name: MxBiArOp_RFRR_EAd
-body: |
-  bb.0:
-    $wd0 = XOR16dd $wd0, $wd1, implicit-def $ccr
-    $wd3 = XOR16dd $wd3, $wd2, implicit-def $ccr
-    $d0  = XOR32dd  $d0,  $d1, implicit-def $ccr
-    $d7  = XOR32dd  $d7,  $d1, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RI.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RI.mir
+++ /dev/null
@@ -1,36 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=CMP8DI,CMP32DI
-
-#------------------------------------------------------------------------------
-# MxCMP_RI class used for compare operations and operates on data registers and
-# immediate data. It uses MxArithImmEncoding encoding class.
-# NOTE: CMP is calculated by subtracting LHS(Imm) from RHS(Dn)
-#------------------------------------------------------------------------------
-
-
-#               -------------------------------+-------+-----------+-----------
-#                F   E   D   C   B   A   9   8 | 7   6 | 5   4   3 | 2   1   0
-#               -------------------------------+-------+-----------+-----------
-#                0   0   0   0   1   1   0   0 |  SIZE |    MODE   |    REG
-#               -------------------------------+-------+-----------+-----------
-# CMP8DI:        0   0   0   0   1   1   0   0 . 0   0   0   0   0   0   0   1
-# CMP8DI-SAME:   0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-#               -------------------------------+-------+-----------+-----------
-# CMP8DI-SAME:   0   0   0   0   1   1   0   0 . 0   0   0   0   0   0   0   0
-# CMP8DI-SAME:   0   0   0   0   0   0   0   0 . 1   1   1   1   1   1   1   1
-#               -------------------------------+-------+-----------+-----------
-# CMP32DI-SAME:  0   0   0   0   1   1   0   0 . 1   0   0   0   0   1   1   1
-# CMP32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-# CMP32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   1   1   0   1
-#               -------------------------------+-------+-----------+-----------
-# CMP32DI-SAME:  0   0   0   0   1   1   0   0 . 1   0   0   0   0   0   0   1
-# CMP32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-# CMP32DI-SAME:  0   0   0   0   0   0   0   0 . 0   0   1   0   1   0   1   0
-name: MxCMP_RI
-body: |
-  bb.0:
-    CMP8di   0, $bd1, implicit-def $ccr
-    CMP8di  -1, $bd0, implicit-def $ccr
-    CMP32di 13,  $d7, implicit-def $ccr
-    CMP32di 42,  $d1, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RR.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RR.mir
+++ /dev/null
@@ -1,27 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=CMP8DD,CMP32DD
-
-#------------------------------------------------------------------------------
-# MxCMP_RR class used for compare operations and operates on data registers only.
-# It uses MxArithEncoding encoding class and MxOpModeNdEA opmode class.
-# NOTE: CMP is calculated by subtracting LHS(EA) from RHS(Dn)
-#------------------------------------------------------------------------------
-
-
-#               ---------------+-----------+-----------+-----------+-----------
-#                F   E   D   C | B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#               ---------------+-----------+-----------+-----------+-----------
-#                x   x   x   x |    REG    |   OPMODE  |    MODE   |    REG
-#               ---------------+-----------+-----------+-----------+-----------
-# CMP8DD:        1   0   1   1   0   0   1   0 . 0   0   0   0   0   0   0   0
-# CMP8DD-SAME:   1   0   1   1   0   1   0   0 . 0   0   0   0   0   0   1   1
-# CMP32DD-SAME:  1   0   1   1   0   0   1   0 . 1   0   0   0   0   0   0   0
-# CMP32DD-SAME:  1   0   1   1   0   0   1   0 . 1   0   0   0   0   1   1   1
-name: MxCMP_RR
-body: |
-  bb.0:
-    CMP8dd  $bd0, $bd1, implicit-def $ccr
-    CMP8dd  $bd3, $bd2, implicit-def $ccr
-    CMP32dd  $d0,  $d1, implicit-def $ccr
-    CMP32dd  $d7,  $d1, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxDiMu.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxDiMu.mir
+++ /dev/null
@@ -1,48 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=SDIVD32D16,UDIVD32D16,SMULD32D16,UMULD32D16
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=SDIVD32I16,UDIVD32I16,SMULD32I16,UMULD32I16
-
-#------------------------------------------------------------------------------
-# MxDiMu is used for sign/unsigned division/multiply of word size data
-#------------------------------------------------------------------------------
-
-
-#                  ---------------------------------------------------------------
-#                   F   E   D   C | B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#                  ---------------------------------------------------------------
-#                   x   x   x   x |    REG    |   OPMODE  |    MODE   |    REG
-#                  ---------------------------------------------------------------
-# SDIVD32D16:       1   0   0   0   0   0   0   1 . 1   1   0   0   0   0   0   1
-#                  ---------------------------------------------------------------
-# UDIVD32D16-SAME:  1   0   0   0   0   0   0   0 . 1   1   0   0   0   0   0   1
-#                  ---------------------------------------------------------------
-# SDIVD32I16:       1   0   0   0   0   0   0   1 . 1   1   1   1   1   1   0   0
-# SDIVD32I16-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-#                  ---------------------------------------------------------------
-# UDIVD32I16-SAME:  1   0   0   0   0   0   0   0 . 1   1   1   1   1   1   0   0
-# UDIVD32I16-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-#                  ---------------------------------------------------------------
-# SMULD32D16-SAME:  1   1   0   0   0   0   0   1 . 1   1   0   0   0   0   0   1
-#                  ---------------------------------------------------------------
-# UMULD32D16-SAME:  1   1   0   0   0   0   0   0 . 1   1   0   0   0   0   0   1
-#                  ---------------------------------------------------------------
-# SMULD32I16-SAME:  1   1   0   0   0   0   0   1 . 1   1   1   1   1   1   0   0
-# SMULD32I16-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-#                  ---------------------------------------------------------------
-# UMULD32I16-SAME:  1   1   0   0   0   0   0   0 . 1   1   1   1   1   1   0   0
-# UMULD32I16-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-#                  ---------------------------------------------------------------
-name: MxDiMu
-body: |
-  bb.0:
-    $d0 = SDIVd32d16 $d0, $wd1, implicit-def $ccr
-    $d0 = UDIVd32d16 $d0, $wd1, implicit-def $ccr
-    $d0 = SDIVd32i16 $d0,    0, implicit-def $ccr
-    $d0 = UDIVd32i16 $d0,   -1, implicit-def $ccr
-    $d0 = SMULd32d16 $d0, $wd1, implicit-def $ccr
-    $d0 = UMULd32d16 $d0, $wd1, implicit-def $ccr
-    $d0 = SMULd32i16 $d0,    0, implicit-def $ccr
-    $d0 = UMULd32i16 $d0,   -1, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxExt.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxExt.mir
+++ /dev/null
@@ -1,25 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=EXT16,EXT32
-
-#------------------------------------------------------------------------------
-# MxExt sign extends data inside a register
-#------------------------------------------------------------------------------
-
-
-#               ---------------------------------------------------------------
-#                F   E   D   C   B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------------------------------
-#                0   1   0   0   1   0   0 |   OPMODE  | 0   0   0 |    REG
-#               ---------------------------------------------------------------
-# EXT16:         0   1   0   0   1   0   0   0 . 1   0   0   0   0   0   0   0
-# EXT16-SAME:    0   1   0   0   1   0   0   0 . 1   0   0   0   0   0   1   1
-# EXT32-SAME:    0   1   0   0   1   0   0   0 . 1   1   0   0   0   0   0   0
-# EXT32-SAME:    0   1   0   0   1   0   0   0 . 1   1   0   0   0   1   1   1
-name: MxEXT
-body: |
-  bb.0:
-    $wd0 = EXT16 $wd0, implicit-def $ccr
-    $wd3 = EXT16 $wd3, implicit-def $ccr
-    $d0 =  EXT32 $d0,  implicit-def $ccr
-    $d7 =  EXT32 $d7,  implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxNEG.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxNEG.mir
+++ /dev/null
@@ -1,39 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=NEG8D,NEG32D,NEGX8D,NEGX32D
-
-#------------------------------------------------------------------------------
-# MxNEG is used to negate a number
-#------------------------------------------------------------------------------
-
-
---- # NEG
-#               ---------------+---------------+-------+-----------+-----------
-#                F   E   D   C | B   A   9   8 | 7   6 | 5   4   3 | 2   1   0
-#               ---------------+---------------+-------+-----------------------
-#                0   1   0   0 | x   x   x   x | SIZE  |    MODE   |    REG
-#               ---------------+---------------+-------+-----------+-----------
-# NEG8D:         0   1   0   0   0   1   0   0 . 0   0   0   0   0   0   0   0
-# NEG32D-SAME:   0   1   0   0   0   1   0   0 . 1   0   0   0   0   0   0   0
-name: MxNEG
-body: |
-  bb.0:
-    $bd0 = NEG8d  $bd0, implicit-def $ccr
-    $d0  = NEG32d  $d0, implicit-def $ccr
-
-...
---- # NEGX
-#               ---------------+---------------+-------+-----------+-----------
-#                F   E   D   C | B   A   9   8 | 7   6 | 5   4   3 | 2   1   0
-#               ---------------+---------------+-------+-----------------------
-#                0   1   0   0 | x   x   x   x | SIZE  |    MODE   |    REG
-#               ---------------+---------------+-------+-----------+-----------
-# NEGX8D-SAME:   0   1   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-# NEGX32D-SAME:  0   1   0   0   0   0   0   0 . 1   0   0   0   0   0   0   0
-name: MxNEGX
-body: |
-  bb.0:
-    $bd0 = NEGX8d  $bd0, implicit $ccr, implicit-def $ccr
-    $d0  = NEGX32d  $d0, implicit $ccr, implicit-def $ccr
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RI.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RI.mir
+++ /dev/null
@@ -1,25 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=BTST32DI
-
-#------------------------------------------------------------------------------
-# MxBTST_RI class used for BTST operations, the source is in a data register and
-# the bit number is a immediate. This instruction can only operate on 32 bits
-#------------------------------------------------------------------------------
-
-
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------------------+-----------
-#                0   0   0   0   1   0   0   0   0   0 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# BTST32DI:      0   0   0   0   1   0   0   0 . 0   0   0   0   0   0   0   0
-# BTST32DI:      0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   1
-#               ---------------------------------------------------------------
-# BTST32DI:      0   0   0   0   1   0   0   0 . 0   0   0   0   0   0   1   1
-# BTST32DI:      0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-name: MxBTST_RI
-body: |
-  bb.0:
-    BTST32di $d0, 1, implicit-def $ccr
-    BTST32di $d3, 0, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RR.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RR.mir
+++ /dev/null
@@ -1,22 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=BTST32DD
-
-#------------------------------------------------------------------------------
-# MxBTST_RR class used for BTST operations, where both the source and bit number
-# are in registers. This instruction can only operate on 32 bits
-#------------------------------------------------------------------------------
-
-
-#               ---------------+-----------+-----------+-----------+-----------
-#                F   E   D   C | B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#               ---------------+-----------+-----------+-----------+-----------
-#                0   0   0   0 |    REG    | 1   0   0 |    MODE   |    REG
-#               ---------------+-----------+-----------+-----------+-----------
-# BTST32DD:      0   0   0   0   0   0   1   1 . 0   0   0   0   0   0   0   0
-# BTST32DD:      0   0   0   0   0   0   0   1 . 0   0   0   0   0   0   1   1
-name: MxBTST_RR
-body: |
-  bb.0:
-    BTST32dd $d0, $d1, implicit-def $ccr
-    BTST32dd $d3, $d0, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxJMP.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxJMP.mir
+++ /dev/null
@@ -1,21 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=JMP32J
-
-#------------------------------------------------------------------------------
-# MxJMP encodes unconditional jump
-#------------------------------------------------------------------------------
-
---- # MxJMP_ARI
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------+-----------+-----------
-#                0   1   0   0   1   1   1   0   1   1 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# JMP32J:        0   1   0   0   1   1   1   0 . 1   1   0   1   0   0   0   0
-name: MxJMP_ARI
-body: |
-  bb.0:
-      JMP32j $a0
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxNOP.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxNOP.mir
+++ /dev/null
@@ -1,16 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=NOP
-
-#------------------------------------------------------------------------------
-# MxNOP
-#------------------------------------------------------------------------------
-
-#               ---------------------------------------------------------------
-#                F   E   D   C   B   A   9   8   7   6   5   4   3   2   1   0
-#               ---------------------------------------------------------------
-# NOP:           0   1   0   0   1   1   1   0 . 0   1   1   1   0   0   0   1
-name: MxNOP
-body: |
-  bb.0:
-     NOP
Index: llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxRTS.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxRTS.mir
+++ /dev/null
@@ -1,16 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=RTS
-
-#------------------------------------------------------------------------------
-# MxRTS pops return address from the stack and jumps there
-#------------------------------------------------------------------------------
-
-#               ---------------------------------------------------------------
-#                F   E   D   C   B   A   9   8   7   6   5   4   3   2   1   0
-#               ---------------------------------------------------------------
-# RTS:           0   1   0   0   1   1   1   0 . 0   1   1   1   0   1   0   1
-name: MxRTS
-body: |
-  bb.0:
-     RTS
Index: llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RI.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RI.mir
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=MOV8DI,MOV32RI
-
-#------------------------------------------------------------------------------
-# MxMove_RI is used for moving immediate to register
-#------------------------------------------------------------------------------
-
-#               ---------------------------+-----------+-----------+-----------
-#                F   E | D   C | B   A   9 | 8   7   6 | 5   4   3 | 2   1   0
-#               -------+-------+-----------+-----------+-----------+-----------
-#                      |       |      DESTINATION      |         SOURCE
-#                0   0 | SIZE  |    REG    |    MODE   |    MODE   |    REG
-#               -------+-------+-----------+-----------+-----------+-----------
-# MOV8DI:        0   0   0   1   0   0   0   0 . 0   0   1   1   1   1   0   0
-# MOV8DI-SAME:   0   0   0   0   0   0   0   0 . 1   1   1   1   1   1   1   1
-#               ---------------------------------------------------------------
-# MOV32RI-SAME:  0   0   1   0   0   0   1   0 . 0   1   1   1   1   1   0   0
-# MOV32RI-SAME:  0   0   0   0   0   0   0   0 . 0   0   0   0   0   0   0   0
-# MOV32RI-SAME:  0   0   0   0   0   0   0   0 . 0   0   1   0   1   0   1   0
-#               ---------------------------------------------------------------
-# MOV32RI-SAME:  0   0   1   0   0   0   1   0 . 0   1   1   1   1   1   0   0
-# MOV32RI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-# MOV32RI-SAME:  1   1   1   1   1   1   1   1 . 1   1   1   1   1   1   1   1
-name: MxMove_RI
-body: |
-  bb.0:
-    $bd0 = MOV8di  -1, implicit-def $ccr
-    $a1  = MOV32ri 42, implicit-def $ccr
-    $a1  = MOV32ri -1, implicit-def $ccr
-
Index: llvm/test/CodeGen/M68k/Encoding/Relocations/data-abs.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Relocations/data-abs.mir
+++ /dev/null
@@ -1,24 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN:  -code-model=small -relocation-model=pic -o - \
-# RUN:   | llvm-readobj -relocations -elf-output-style=GNU - \
-# RUN:   | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Test ABS relocation
-#------------------------------------------------------------------------------
-
---- |
-
-  @dst = external global i32
-
-  define void @DATA() { entry: ret void }
-...
---- # DATA
-#        Offset    Info           Type         Sym. Value  Sym S Addend
-# CHECK: 00000002  {{[0-9a-f]+}}  R_68K_32  {{[0-9]*}}  dst + 0
-name: DATA
-body: |
-  bb.0:
-    $d0 = MOV32rb @dst, implicit-def $ccr
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotoff.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotoff.mir
+++ /dev/null
@@ -1,28 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN:  -code-model=small -relocation-model=pic -o - \
-# RUN:   | llvm-readobj -relocations -elf-output-style=GNU - \
-# RUN:   | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Test GOTOFF relocation
-#------------------------------------------------------------------------------
-
---- |
-
-  @dst = external global i32
-
-  define void @DATA() { entry: ret void }
-...
---- # DATA
-#        Offset    Info           Type                 Sym. Value  Sym                    S  Addend
-# CHECK: 00000002  {{[0-9a-f]+}}  R_68K_GOTPCREL16  {{[0-9]*}}  _GLOBAL_OFFSET_TABLE_  +  0
-# CHECK: 00000007  {{[0-9a-f]+}}  R_68K_GOTOFF8     {{[0-9]*}}  dst                    +  0
-# CHECK: 0000000a  {{[0-9a-f]+}}  R_68K_GOTOFF16    {{[0-9]*}}  dst                    +  0
-name: DATA
-body: |
-  bb.0:
-    $a5 = LEA32q target-flags(m68k-gotpcrel) &_GLOBAL_OFFSET_TABLE_
-    $d0 = MOV32rf target-flags(m68k-gotoff) @dst, $a5, $d0, implicit-def $ccr
-    $d0 = MOV32rp target-flags(m68k-gotoff) @dst, $a5,      implicit-def $ccr
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotpcrel.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotpcrel.mir
+++ /dev/null
@@ -1,26 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN:  -code-model=small -relocation-model=pic -o - \
-# RUN:   | llvm-readobj -relocations -elf-output-style=GNU - \
-# RUN:   | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Test GOTPCREL relocation
-#------------------------------------------------------------------------------
-
---- |
-
-  @dst = external global i32
-
-  define void @DATA() { entry: ret void }
-...
---- # DATA
-#            Offset    Info        Type                  Sym. Value  Sym  S  Addend
-# CHECK:     00000003  {{[0-9]+}}  R_68K_GOTPCREL8    {{[0-9]*}}  dst  +  1
-# CHECK:     00000006  {{[0-9]+}}  R_68K_GOTPCREL16   {{[0-9]*}}  dst  +  0
-name: DATA
-body: |
-  bb.0:
-    $a0 = MOV32rk target-flags(m68k-gotpcrel) @dst, $d0, implicit-def $ccr
-    $a0 = MOV32rq target-flags(m68k-gotpcrel) @dst,      implicit-def $ccr
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Relocations/data-pc-rel.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Relocations/data-pc-rel.mir
+++ /dev/null
@@ -1,29 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN:  -code-model=small -relocation-model=pic -o - \
-# RUN:   | llvm-readobj -relocations -elf-output-style=GNU - \
-# RUN:   | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Tests PC-Relative data relocations
-#------------------------------------------------------------------------------
-
---- |
-
-  @dst = external global i32
-
-  define void @DATA() { entry: ret void }
-...
---- # DATA
-#            Offset    Info        Type           Sym. Value  Sym  S  Addend
-# CHECK:     00000003  {{[0-9]+}}  R_68K_PC8   {{[0-9]*}}  dst  +  1
-# CHECK:     00000006  {{[0-9]+}}  R_68K_PC16  {{[0-9]*}}  dst  +  0
-# No need for relocation here
-# CHECK-NOT: 0000000a  {{[0-9]+}}  R_68K_PC16              0
-name: DATA
-body: |
-  bb.0:
-    $a0 = MOV32rk @dst, $a0, implicit-def $ccr
-    $a0 = MOV32rq @dst,      implicit-def $ccr
-    $a0 = MOV32rq 0,         implicit-def $ccr
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/Relocations/text-plt.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/Relocations/text-plt.mir
+++ /dev/null
@@ -1,23 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN:  -code-model=small -relocation-model=pic -o - \
-# RUN:   | llvm-readobj -relocations -elf-output-style=GNU - \
-# RUN:   | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Test PLT relocation
-#------------------------------------------------------------------------------
-
---- |
-
-  declare void @TARGET()
-  define void @TEXT()   { entry: ret void }
-...
---- # TEXT
-#        Offset    Info           Type            Sym. Value  Sym     S  Addend
-# CHECK: 00000002  {{[0-9a-f]+}}  R_68K_PLT16  {{[0-9]*}}  TARGET  +  0
-name: TEXT
-body: |
-  bb.0:
-    CALLq target-flags(m68k-plt) @TARGET
-
-...
Index: llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DD.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DD.mir
+++ /dev/null
@@ -1,43 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=SHL8DD,SHL32DD,LSR8DD,LSR32DD,ASR8DD,ASR32DD
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=ROL8DD,ROL32DD,ROR8DD,ROR32DD
-
-#------------------------------------------------------------------------------
-# MxSR_DD encodes shift or rotate instructions; shift count is in register
-#------------------------------------------------------------------------------
-
-#               ---------------+-----------+---+-------+---+-------+-----------
-#                F   E   D   C | B   A   9 | 8 | 7   6 | 5 | 4   3 | 2   1   0
-#               ---------------+-----------+---+-------+---+-------+-----------
-#                1   1   1   0 |     Dx    | D |  SIZE | 1 |  OP   |    Dy
-#               ---------------+-----------+---+-------+---+-------+-----------
-# SHL8DD:        1   1   1   0   0   0   0   1 . 0   0   1   0   1   0   0   1
-# SHL32DD-SAME:  1   1   1   0   0   0   1   1 . 1   0   1   0   1   0   1   0
-#               ---------------+-----------+---+-------+---+-------+-----------
-# LSR8DD-SAME:   1   1   1   0   0   1   0   0 . 0   0   1   0   1   0   1   1
-# LSR32DD-SAME:  1   1   1   0   0   1   1   0 . 1   0   1   0   1   1   0   0
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ASR8DD-SAME:   1   1   1   0   1   0   0   0 . 0   0   1   0   0   1   0   1
-# ASR32DD-SAME:  1   1   1   0   1   0   1   0 . 1   0   1   0   0   1   1   0
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ROL8DD:        1   1   1   0   1   1   0   1 . 0   0   1   1   1   1   1   1
-# ROL32DD-SAME:  1   1   1   0   1   1   1   1 . 1   0   1   1   1   0   0   1
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ROR8DD-SAME:   1   1   1   0   0   0   0   0 . 0   0   1   1   1   0   0   1
-# ROR32DD-SAME:  1   1   1   0   0   0   0   0 . 1   0   1   1   1   0   0   1
-name: MxSR_DD
-body: |
-  bb.0:
-     $bd1 = SHL8dd  $bd1, $bd0, implicit-def $ccr
-     $d2  = SHL32dd  $d2,  $d1, implicit-def $ccr
-     $bd3 = LSR8dd  $bd3, $bd2, implicit-def $ccr
-     $d4  = LSR32dd  $d4,  $d3, implicit-def $ccr
-     $bd5 = ASR8dd  $bd5, $bd4, implicit-def $ccr
-     $d6  = ASR32dd  $d6,  $d5, implicit-def $ccr
-     $bd7 = ROL8dd  $bd7, $bd6, implicit-def $ccr
-     $d1  = ROL32dd  $d1,  $d7, implicit-def $ccr
-     $bd1 = ROR8dd  $bd1, $bd0, implicit-def $ccr
-     $d1  = ROR32dd  $d1,  $d0, implicit-def $ccr
Index: llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DI.mir
===================================================================
--- llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DI.mir
+++ /dev/null
@@ -1,58 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=SHL8DI,SHL32DI,LSR8DI,LSR32DI,ASR8DI,ASR32DI
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=ROL8DI,ROL32DI,ROR8DI,ROR32DI
-
-#------------------------------------------------------------------------------
-# MxSR_DI encodes shift or rotate instructions; shift count is encoded into
-# the instruction
-#------------------------------------------------------------------------------
-
-#               ---------------+-----------+---+-------+---+-------+-----------
-#                F   E   D   C | B   A   9 | 8 | 7   6 | 5 | 4   3 | 2   1   0
-#               ---------------+-----------+---+-------+---+-------+-----------
-#                1   1   1   0 |     Dx    | D |  SIZE | 0 |  OP   |    Dy
-#               ---------------+-----------+---+-------+---+-------+-----------
-# SHL8DI:        1   1   1   0   0   0   1   1 . 0   0   0   0   1   0   0   1
-# SHL32DI-SAME:  1   1   1   0   0   0   1   1 . 1   0   0   0   1   0   0   1
-#               ---------------+-----------+---+-------+---+-------+-----------
-# LSR8DI-SAME:   1   1   1   0   0   0   1   0 . 0   0   0   0   1   0   0   1
-# LSR32DI-SAME:  1   1   1   0   0   0   1   0 . 1   0   0   0   1   0   0   1
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ASR8DI-SAME:   1   1   1   0   0   0   1   0 . 0   0   0   0   0   0   0   1
-# ASR32DI-SAME:  1   1   1   0   0   0   1   0 . 1   0   0   0   0   0   0   1
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ROL8DI:        1   1   1   0   0   0   1   1 . 0   0   0   1   1   0   0   1
-# ROL32DI-SAME:  1   1   1   0   0   0   1   1 . 1   0   0   1   1   0   0   1
-#               ---------------+-----------+---+-------+---+-------+-----------
-# ROR8DI-SAME:   1   1   1   0   0   0   1   0 . 0   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   0   0   1   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   0   1   0   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   0   1   1   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   1   0   0   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   1   0   1   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   1   1   0   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   1   1   1   0 . 1   0   0   1   1   0   0   1
-# ROR32DI-SAME:  1   1   1   0   0   0   0   0 . 1   0   0   1   1   0   0   1
-name: MxSR_DI
-body: |
-  bb.0:
-     $bd1 = SHL8di  $bd1, 1, implicit-def $ccr
-     $d1  = SHL32di  $d1, 1, implicit-def $ccr
-     $bd1 = LSR8di  $bd1, 1, implicit-def $ccr
-     $d1  = LSR32di  $d1, 1, implicit-def $ccr
-     $bd1 = ASR8di  $bd1, 1, implicit-def $ccr
-     $d1  = ASR32di  $d1, 1, implicit-def $ccr
-     $bd1 = ROL8di  $bd1, 1, implicit-def $ccr
-     $d1  = ROL32di  $d1, 1, implicit-def $ccr
-     $bd1 = ROR8di  $bd1, 1, implicit-def $ccr
-     $d1  = ROR32di  $d1, 1, implicit-def $ccr
-     $d1  = ROR32di  $d1, 2, implicit-def $ccr
-     $d1  = ROR32di  $d1, 3, implicit-def $ccr
-     $d1  = ROR32di  $d1, 4, implicit-def $ccr
-     $d1  = ROR32di  $d1, 5, implicit-def $ccr
-     $d1  = ROR32di  $d1, 6, implicit-def $ccr
-     $d1  = ROR32di  $d1, 7, implicit-def $ccr
-     $d1  = ROR32di  $d1, 8, implicit-def $ccr
Index: llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRI.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRI.s
@@ -0,0 +1,18 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      eori.w  #0, %d0
+; CHECK-SAME: encoding: [0x0a,0x40,0x00,0x00]
+eori.w	#0, %d0
+; CHECK:      eori.w  #-1, %d3
+; CHECK-SAME: encoding: [0x0a,0x43,0xff,0xff]
+eori.w	#-1, %d3
+; CHECK:      eori.l  #-1, %d0
+; CHECK-SAME: encoding: [0x0a,0x80,0xff,0xff,0xff,0xff]
+eori.l	#-1, %d0
+; CHECK:      eori.l  #131071, %d0
+; CHECK-SAME: encoding: [0x0a,0x80,0x00,0x01,0xff,0xff]
+eori.l	#131071, %d0
+; CHECK:      eori.l  #458752, %d7
+; CHECK-SAME: encoding: [0x0a,0x87,0x00,0x07,0x00,0x00]
+eori.l	#458752, %d7
+
Index: llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRRF.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRRF.s
@@ -0,0 +1,15 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      addx.w  %d1, %d0
+; CHECK-SAME: encoding: [0xd1,0x41]
+addx.w	%d1, %d0
+; CHECK:      addx.w  %d2, %d3
+; CHECK-SAME: encoding: [0xd7,0x42]
+addx.w	%d2, %d3
+; CHECK:      addx.l  %d1, %d0
+; CHECK-SAME: encoding: [0xd1,0x81]
+addx.l	%d1, %d0
+; CHECK:      addx.l  %d1, %d7
+; CHECK-SAME: encoding: [0xdf,0x81]
+addx.l	%d1, %d7
+
Index: llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRR_EAd.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRR_EAd.s
@@ -0,0 +1,15 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      eor.w  %d1, %d0
+; CHECK-SAME: encoding: [0xb3,0x40]
+eor.w	%d1, %d0
+; CHECK:      eor.w  %d2, %d3
+; CHECK-SAME: encoding: [0xb5,0x43]
+eor.w	%d2, %d3
+; CHECK:      eor.l  %d1, %d0
+; CHECK-SAME: encoding: [0xb3,0x80]
+eor.l	%d1, %d0
+; CHECK:      eor.l  %d1, %d7
+; CHECK-SAME: encoding: [0xb3,0x87]
+eor.l	%d1, %d7
+
Index: llvm/test/MC/M68k/Arith/Classes/MxCMP_RI.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxCMP_RI.s
@@ -0,0 +1,15 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      cmpi.b  #0, %d1
+; CHECK-SAME: encoding: [0x0c,0x01,0x00,0x00]
+cmpi.b	#0, %d1
+; CHECK:      cmpi.b  #-1, %d0
+; CHECK-SAME: encoding: [0x0c,0x00,0x00,0xff]
+cmpi.b	#-1, %d0
+; CHECK:      cmpi.l  #13, %d7
+; CHECK-SAME: encoding: [0x0c,0x87,0x00,0x00,0x00,0x0d]
+cmpi.l	#13, %d7
+; CHECK:      cmpi.l  #42, %d1
+; CHECK-SAME: encoding: [0x0c,0x81,0x00,0x00,0x00,0x2a]
+cmpi.l	#42, %d1
+
Index: llvm/test/MC/M68k/Arith/Classes/MxCMP_RR.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxCMP_RR.s
@@ -0,0 +1,15 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      cmp.b  %d0, %d1
+; CHECK-SAME: encoding: [0xb2,0x00]
+cmp.b	%d0, %d1
+; CHECK:      cmp.b  %d3, %d2
+; CHECK-SAME: encoding: [0xb4,0x03]
+cmp.b	%d3, %d2
+; CHECK:      cmp.l  %d0, %d1
+; CHECK-SAME: encoding: [0xb2,0x80]
+cmp.l	%d0, %d1
+; CHECK:      cmp.l  %d7, %d1
+; CHECK-SAME: encoding: [0xb2,0x87]
+cmp.l	%d7, %d1
+
Index: llvm/test/MC/M68k/Arith/Classes/MxDiMu.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxDiMu.s
@@ -0,0 +1,27 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      divs  %d1, %d0
+; CHECK-SAME: encoding: [0x81,0xc1]
+divs	%d1, %d0
+; CHECK:      divu  %d1, %d0
+; CHECK-SAME: encoding: [0x80,0xc1]
+divu	%d1, %d0
+; CHECK:      divs  #0, %d0
+; CHECK-SAME: encoding: [0x81,0xfc,0x00,0x00]
+divs	#0, %d0
+; CHECK:      divu  #-1, %d0
+; CHECK-SAME: encoding: [0x80,0xfc,0xff,0xff]
+divu	#-1, %d0
+; CHECK:      muls  %d1, %d0
+; CHECK-SAME: encoding: [0xc1,0xc1]
+muls	%d1, %d0
+; CHECK:      mulu  %d1, %d0
+; CHECK-SAME: encoding: [0xc0,0xc1]
+mulu	%d1, %d0
+; CHECK:      muls  #0, %d0
+; CHECK-SAME: encoding: [0xc1,0xfc,0x00,0x00]
+muls	#0, %d0
+; CHECK:      mulu  #-1, %d0
+; CHECK-SAME: encoding: [0xc0,0xfc,0xff,0xff]
+mulu	#-1, %d0
+
Index: llvm/test/MC/M68k/Arith/Classes/MxExt.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxExt.s
@@ -0,0 +1,15 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      ext.w  %d0
+; CHECK-SAME: encoding: [0x48,0x80]
+ext.w	%d0
+; CHECK:      ext.w  %d3
+; CHECK-SAME: encoding: [0x48,0x83]
+ext.w	%d3
+; CHECK:      ext.l  %d0
+; CHECK-SAME: encoding: [0x48,0xc0]
+ext.l	%d0
+; CHECK:      ext.l  %d7
+; CHECK-SAME: encoding: [0x48,0xc7]
+ext.l	%d7
+
Index: llvm/test/MC/M68k/Arith/Classes/MxNEG.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Arith/Classes/MxNEG.s
@@ -0,0 +1,20 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK-LABEL: MxNEG:
+MxNEG:
+	; CHECK:      neg.b  %d0
+	; CHECK-SAME: encoding: [0x44,0x00]
+	neg.b	%d0
+	; CHECK:      neg.l  %d0
+	; CHECK-SAME: encoding: [0x44,0x80]
+	neg.l	%d0
+
+; CHECK-LABEL: MxNEGX:
+MxNEGX:
+	; CHECK:      negx.b  %d0
+	; CHECK-SAME: encoding: [0x40,0x00]
+	negx.b	%d0
+	; CHECK:      negx.l  %d0
+	; CHECK-SAME: encoding: [0x40,0x80]
+	negx.l	%d0
+
Index: llvm/test/MC/M68k/Bits/Classes/MxBTST_RI.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Bits/Classes/MxBTST_RI.s
@@ -0,0 +1,9 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      btst  #1, %d0
+; CHECK-SAME: encoding: [0x08,0x00,0x00,0x01]
+btst	#1, %d0
+; CHECK:      btst  #0, %d3
+; CHECK-SAME: encoding: [0x08,0x03,0x00,0x00]
+btst	#0, %d3
+
Index: llvm/test/MC/M68k/Bits/Classes/MxBTST_RR.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Bits/Classes/MxBTST_RR.s
@@ -0,0 +1,9 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      btst  %d1, %d0
+; CHECK-SAME: encoding: [0x03,0x00]
+btst	%d1, %d0
+; CHECK:      btst  %d0, %d3
+; CHECK-SAME: encoding: [0x01,0x03]
+btst	%d0, %d3
+
Index: llvm/test/MC/M68k/Control/Classes/MxJMP.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Control/Classes/MxJMP.s
@@ -0,0 +1,6 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      jmp  (%a0)
+; CHECK-SAME: encoding: [0x4e,0xd0]
+jmp	(%a0)
+
Index: llvm/test/MC/M68k/Control/Classes/MxNOP.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Control/Classes/MxNOP.s
@@ -0,0 +1,6 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      nop
+; CHECK-SAME: encoding: [0x4e,0x71]
+nop
+
Index: llvm/test/MC/M68k/Control/Classes/MxRTS.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Control/Classes/MxRTS.s
@@ -0,0 +1,6 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      rts
+; CHECK-SAME: encoding: [0x4e,0x75]
+rts
+
Index: llvm/test/MC/M68k/Data/Classes/MxMove_RI.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Data/Classes/MxMove_RI.s
@@ -0,0 +1,12 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      move.b  #-1, %d0
+; CHECK-SAME: encoding: [0x10,0x3c,0x00,0xff]
+move.b	#-1, %d0
+; CHECK:      move.l  #42, %a1
+; CHECK-SAME: encoding: [0x22,0x7c,0x00,0x00,0x00,0x2a]
+move.l	#42, %a1
+; CHECK:      move.l  #-1, %a1
+; CHECK-SAME: encoding: [0x22,0x7c,0xff,0xff,0xff,0xff]
+move.l	#-1, %a1
+
Index: llvm/test/MC/M68k/Relocations/data-abs.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Relocations/data-abs.s
@@ -0,0 +1,9 @@
+; RUN: llvm-mc -triple m68k -filetype=obj %s -o - \
+; RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+; RUN: llvm-mc -triple m68k -show-encoding %s -o - \
+; RUN:   | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
+
+; RELOC: R_68K_32 dst 0x0
+; INSTR: move.l dst, %d0
+; FIXUP: fixup A - offset: 2, value: dst, kind: FK_Data_4
+move.l	dst, %d0
Index: llvm/test/MC/M68k/Relocations/data-gotoff.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Relocations/data-gotoff.s
@@ -0,0 +1,20 @@
+; RUN: llvm-mc -triple m68k -filetype=obj %s -o - \
+; RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+; RUN: llvm-mc -triple m68k -show-encoding %s -o - \
+; RUN:   | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
+
+; RELOC: R_68K_GOTOFF8 dst1 0x0
+; INSTR: move.l  (dst1@GOTOFF,%a5,%d0), %d0
+; FIXUP: fixup A - offset: 3, value: dst1@GOTOFF, kind: FK_Data_1
+move.l	(dst1@GOTOFF,%a5,%d0), %d0
+
+; RELOC: R_68K_GOTOFF16 dst2 0x0
+; INSTR: move.l  (dst2@GOTOFF,%a5), %d0
+; FIXUP: fixup A - offset: 2, value: dst2@GOTOFF, kind: FK_Data_2
+move.l	(dst2@GOTOFF,%a5), %d0
+
+; RELOC: R_68K_GOTPCREL16 dst3 0x0
+; INSTR: lea     (dst3@GOTPCREL,%pc), %a5
+; FIXUP: fixup A - offset: 2, value: dst3@GOTPCREL, kind: FK_PCRel_2
+lea	(dst3@GOTPCREL,%pc), %a5
+
Index: llvm/test/MC/M68k/Relocations/data-gotpcrel.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Relocations/data-gotpcrel.s
@@ -0,0 +1,14 @@
+; RUN: llvm-mc -triple m68k -filetype=obj %s -o - \
+; RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+; RUN: llvm-mc -triple m68k -show-encoding %s -o - \
+; RUN:   | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
+
+; RELOC: R_68K_GOTPCREL8 dst1 0x1
+; INSTR: move.l  (dst1@GOTPCREL,%pc,%d0), %a0
+; FIXUP: fixup A - offset: 3, value: dst1@GOTPCREL+1, kind: FK_PCRel_1
+move.l	(dst1@GOTPCREL,%pc,%d0), %a0
+
+; RELOC: R_68K_GOTPCREL16 dst2 0x0
+; INSTR: move.l  (dst2@GOTPCREL,%pc), %a0
+; FIXUP: fixup A - offset: 2, value: dst2@GOTPCREL, kind: FK_PCRel_2
+move.l	(dst2@GOTPCREL,%pc), %a0
Index: llvm/test/MC/M68k/Relocations/data-pc-rel.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Relocations/data-pc-rel.s
@@ -0,0 +1,20 @@
+; RUN: llvm-mc -triple m68k -filetype=obj %s -o - \
+; RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+; RUN: llvm-mc -triple m68k -show-encoding %s -o - \
+; RUN:   | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
+
+; RELOC: R_68K_PC8 dst1 0x1
+; INSTR: move.l  (dst1,%pc,%a0), %a0
+; FIXUP: fixup A - offset: 3, value: dst1+1, kind: FK_PCRel_1
+move.l	(dst1,%pc,%a0), %a0
+
+; RELOC: R_68K_PC16 dst2 0x0
+; INSTR: move.l  (dst2,%pc), %a0
+; FIXUP: fixup A - offset: 2, value: dst2, kind: FK_PCRel_2
+move.l	(dst2,%pc), %a0
+
+; Shouldn't have any relocation
+; RELOC-NOT: R_68K_PC
+; INSTR: move.l  (0,%pc), %a0
+; FIXUP-NOT: fixup
+move.l	(0,%pc), %a0
Index: llvm/test/MC/M68k/Relocations/text-plt.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/Relocations/text-plt.s
@@ -0,0 +1,9 @@
+; RUN: llvm-mc -triple m68k -filetype=obj %s -o - \
+; RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
+; RUN: llvm-mc -triple m68k -show-encoding %s -o - \
+; RUN:   | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
+
+; RELOC: R_68K_PLT16 target 0x0
+; INSTR: jsr     (target@PLT,%pc)
+; FIXUP: fixup A - offset: 2, value: target@PLT, kind: FK_PCRel_2
+jsr	(target@PLT,%pc)
Index: llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DD.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DD.s
@@ -0,0 +1,33 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      lsl.b  %d0, %d1
+; CHECK-SAME: encoding: [0xe1,0x29]
+lsl.b	%d0, %d1
+; CHECK:      lsl.l  %d1, %d2
+; CHECK-SAME: encoding: [0xe3,0xaa]
+lsl.l	%d1, %d2
+; CHECK:      lsr.b  %d2, %d3
+; CHECK-SAME: encoding: [0xe4,0x2b]
+lsr.b	%d2, %d3
+; CHECK:      lsr.l  %d3, %d4
+; CHECK-SAME: encoding: [0xe6,0xac]
+lsr.l	%d3, %d4
+; CHECK:      asr.b  %d4, %d5
+; CHECK-SAME: encoding: [0xe8,0x25]
+asr.b	%d4, %d5
+; CHECK:      asr.l  %d5, %d6
+; CHECK-SAME: encoding: [0xea,0xa6]
+asr.l	%d5, %d6
+; CHECK:      rol.b  %d6, %d7
+; CHECK-SAME: encoding: [0xed,0x3f]
+rol.b	%d6, %d7
+; CHECK:      rol.l  %d7, %d1
+; CHECK-SAME: encoding: [0xef,0xb9]
+rol.l	%d7, %d1
+; CHECK:      ror.b  %d0, %d1
+; CHECK-SAME: encoding: [0xe0,0x39]
+ror.b	%d0, %d1
+; CHECK:      ror.l  %d0, %d1
+; CHECK-SAME: encoding: [0xe0,0xb9]
+ror.l	%d0, %d1
+
Index: llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DI.s
===================================================================
--- /dev/null
+++ llvm/test/MC/M68k/ShiftRotate/Classes/MxSR_DI.s
@@ -0,0 +1,54 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+; CHECK:      lsl.b  #1, %d1
+; CHECK-SAME: encoding: [0xe3,0x09]
+lsl.b	#1, %d1
+; CHECK:      lsl.l  #1, %d1
+; CHECK-SAME: encoding: [0xe3,0x89]
+lsl.l	#1, %d1
+; CHECK:      lsr.b  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x09]
+lsr.b	#1, %d1
+; CHECK:      lsr.l  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x89]
+lsr.l	#1, %d1
+; CHECK:      asr.b  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x01]
+asr.b	#1, %d1
+; CHECK:      asr.l  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x81]
+asr.l	#1, %d1
+; CHECK:      rol.b  #1, %d1
+; CHECK-SAME: encoding: [0xe3,0x19]
+rol.b	#1, %d1
+; CHECK:      rol.l  #1, %d1
+; CHECK-SAME: encoding: [0xe3,0x99]
+rol.l	#1, %d1
+; CHECK:      ror.b  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x19]
+ror.b	#1, %d1
+; CHECK:      ror.l  #1, %d1
+; CHECK-SAME: encoding: [0xe2,0x99]
+ror.l	#1, %d1
+; CHECK:      ror.l  #2, %d1
+; CHECK-SAME: encoding: [0xe4,0x99]
+ror.l	#2, %d1
+; CHECK:      ror.l  #3, %d1
+; CHECK-SAME: encoding: [0xe6,0x99]
+ror.l	#3, %d1
+; CHECK:      ror.l  #4, %d1
+; CHECK-SAME: encoding: [0xe8,0x99]
+ror.l	#4, %d1
+; CHECK:      ror.l  #5, %d1
+; CHECK-SAME: encoding: [0xea,0x99]
+ror.l	#5, %d1
+; CHECK:      ror.l  #6, %d1
+; CHECK-SAME: encoding: [0xec,0x99]
+ror.l	#6, %d1
+; CHECK:      ror.l  #7, %d1
+; CHECK-SAME: encoding: [0xee,0x99]
+ror.l	#7, %d1
+; CHECK:      ror.l  #8, %d1
+; CHECK-SAME: encoding: [0xe0,0x99]
+ror.l	#8, %d1
+