diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -733,6 +733,22 @@ if (stackUpdateCanBeMoved(MF)) { const std::vector &Info = MFI.getCalleeSavedInfo(); for (CalleeSavedInfo CSI : Info) { + // If the callee saved register is spilled to a register instead of the + // stack then the spill no longer uses the stack pointer. + // This can lead to two consequences: + // 1) We no longer need to update the stack because the function does not + // spill any callee saved registers to stack. + // 2) We have a situation where we still have to update the stack pointer + // even though some registers are spilled to other registers. In + // this case the current code moves the stack update to an incorrect + // position. + // In either case we should abort moving the stack update operation. + if (CSI.isSpilledToReg()) { + StackUpdateLoc = MBBI; + MovingStackUpdateDown = false; + break; + } + int FrIdx = CSI.getFrameIdx(); // If the frame index is not negative the callee saved info belongs to a // stack object that is not a fixed stack object. We ignore non-fixed @@ -1621,6 +1637,12 @@ if (stackUpdateCanBeMoved(MF)) { const std::vector & Info = MFI.getCalleeSavedInfo(); for (CalleeSavedInfo CSI : Info) { + // If the callee saved register is spilled to another register abort the + // stack update movement. + if (CSI.isSpilledToReg()) { + StackUpdateLoc = MBBI; + break; + } int FrIdx = CSI.getFrameIdx(); // If the frame index is not negative the callee saved info belongs to a // stack object that is not a fixed stack object. We ignore non-fixed diff --git a/llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir b/llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/stack_pointer_vec_spills.mir @@ -0,0 +1,41 @@ +# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \ +# RUN: -start-before=prologepilog -ppc-enable-pe-vector-spills \ +# RUN: -ppc-asm-full-reg-names -verify-machineinstrs %s -o - | FileCheck %s + +--- +name: MixedSpill +alignment: 16 +tracksRegLiveness: true +liveins: +body: | + bb.0.entry: + $r14 = IMPLICIT_DEF + $f14 = IMPLICIT_DEF + $lr8 = IMPLICIT_DEF + BLR8 implicit undef $lr8, implicit undef $rm + +# CHECK-LABEL: MixedSpill +# CHECK: stdu r1, -176(r1) +# CHECK: stfd f14, 32(r1) +# CHECK: mtvsrd vs32, r14 +# CHECK: lfd f14, 32(r1) +# CHECK: addi r1, r1, 176 +# CHECK: blr +... +--- +name: NoStackUpdate +alignment: 16 +tracksRegLiveness: true +liveins: +body: | + bb.0.entry: + $r14 = IMPLICIT_DEF + $f14 = IMPLICIT_DEF + BLR8 implicit undef $lr8, implicit undef $rm + +# CHECK-LABEL: NoStackUpdate +# CHECK-NOT: stdu +# CHECK: mtvsrd vs32, r14 +# CHECK: mfvsrd r14, vs32 +# CHECK: blr +...