Index: llvm/docs/GlobalISel/GenericOpcode.rst
===================================================================
--- llvm/docs/GlobalISel/GenericOpcode.rst
+++ llvm/docs/GlobalISel/GenericOpcode.rst
@@ -187,7 +187,7 @@
 register banks have been selected.
 
 .. code-block:: none
-  %res = G_EXTRACT <1 x i32> %vec, i32 0
+  %3:_(s32) = G_EXTRACT %2, 32
 
 G_INSERT
 ^^^^^^^^
@@ -195,7 +195,7 @@
 Insert a smaller register into a larger one at the specified bit-index.
 
 .. code-block:: none
-%vec = G_INSERT <1 x i32> undef, i32 %elt, i32 0
+%5:_(s192) = G_INSERT %4, %3, 0
 
 G_MERGE_VALUES
 ^^^^^^^^^^^^^^