diff --git a/clang/lib/Headers/amxintrin.h b/clang/lib/Headers/amxintrin.h --- a/clang/lib/Headers/amxintrin.h +++ b/clang/lib/Headers/amxintrin.h @@ -30,7 +30,7 @@ /// config and the tile data, and the tiles are zeroed. Any invalid /// configurations will result in #GP fault. /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the LDTILECFG instruction. /// @@ -46,7 +46,7 @@ /// palette, the number of bytes per row, and the number of rows. If tiles /// are not configured, all zeroes will be stored to memory. /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the STTILECFG instruction. /// @@ -60,7 +60,7 @@ /// Release the tile configuration to return to the init state, which /// releases all storage it currently holds. /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TILERELEASE instruction. static __inline__ void __DEFAULT_FN_ATTRS_TILE _tile_release(void) { @@ -71,7 +71,7 @@ /// destination tile "dst" using the tile configuration previously configured /// via "_tile_loadconfig". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TILELOADD instruction. /// @@ -91,7 +91,7 @@ /// that the data will likely not be reused in the near future and the data /// caching can be optimized accordingly. /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TILELOADDT1 instruction. /// @@ -109,7 +109,7 @@ /// "stride" using the tile configuration previously configured via /// "_tile_loadconfig". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TILESTORED instruction. /// @@ -124,7 +124,7 @@ /// Zero the tile specified by "tdest". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TILEZERO instruction. /// @@ -138,7 +138,7 @@ /// results. Sum these 4 results with the corresponding 32-bit integer in "dst", /// and store the 32-bit result back to tile "dst". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TDPBSSD instruction. /// @@ -157,7 +157,7 @@ /// 32-bit results. Sum these 4 results with the corresponding 32-bit integer /// in "dst", and store the 32-bit result back to tile "dst". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TDPBSUD instruction. /// @@ -176,7 +176,7 @@ /// results. Sum these 4 results with the corresponding 32-bit integer in "dst", /// and store the 32-bit result back to tile "dst". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TDPBUSD instruction. /// @@ -195,7 +195,7 @@ /// 32-bit results. Sum these 4 results with the corresponding 32-bit integer in /// "dst", and store the 32-bit result back to tile "dst". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TDPBUUD instruction. /// @@ -213,7 +213,7 @@ /// elements with elements in "dst", and store the 32-bit result back to tile /// "dst". /// -/// \headerfile +/// \headerfile /// /// This intrinsic corresponds to the TDPBF16PS instruction. /// @@ -226,8 +226,12 @@ #define _tile_dpbf16ps(dst, src0, src1) \ __builtin_ia32_tdpbf16ps((dst), (src0), (src1)) +/// AMX tile register size can be configured, the maximum size is 16x64=1024 +/// bytes. Since there is no 2D type in llvm IR, we use vector type to +/// represent 2D tile and the fixed size is maximum amx tile register size. typedef int _tile1024i __attribute__((__vector_size__(1024), __aligned__(64))); +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8 _tile_loadd_internal(unsigned short m, unsigned short n, const void *base, __SIZE_TYPE__ stride) { @@ -235,30 +239,35 @@ (__SIZE_TYPE__)(stride)); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8 _tile_dpbssd_internal(unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, _tile1024i src1, _tile1024i src2) { return __builtin_ia32_tdpbssd_internal(m, n, k, dst, src1, src2); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8 _tile_dpbsud_internal(unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, _tile1024i src1, _tile1024i src2) { return __builtin_ia32_tdpbsud_internal(m, n, k, dst, src1, src2); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8 _tile_dpbusd_internal(unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, _tile1024i src1, _tile1024i src2) { return __builtin_ia32_tdpbusd_internal(m, n, k, dst, src1, src2); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8 _tile_dpbuud_internal(unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, _tile1024i src1, _tile1024i src2) { return __builtin_ia32_tdpbuud_internal(m, n, k, dst, src1, src2); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ void __DEFAULT_FN_ATTRS_INT8 _tile_stored_internal(unsigned short m, unsigned short n, void *base, __SIZE_TYPE__ stride, _tile1024i tile) { @@ -266,67 +275,185 @@ (__SIZE_TYPE__)(stride), tile); } +/// This is internal intrinsic. C/C++ user should avoid calling it directly. static __inline__ _tile1024i __DEFAULT_FN_ATTRS_BF16 _tile_dpbf16ps_internal(unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, _tile1024i src1, _tile1024i src2) { return __builtin_ia32_tdpbf16ps_internal(m, n, k, dst, src1, src2); } +/// This struct pack the shape and tile data together for user. We suggest +/// initializing the struct as early as possible, because compiler depends +/// on the shape information to do configure. The constant value is preferred +/// for optimization by compiler. typedef struct __tile1024i_str { const unsigned short row; const unsigned short col; _tile1024i tile; } __tile1024i; +/// Load tile rows from memory specifieid by "base" address and "stride" into +/// destination tile "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TILELOADD instruction. +/// +/// \param dst +/// A destination tile. Max size is 1024 Bytes. +/// \param base +/// A pointer to base address. +/// \param stride +/// The stride between the rows' data to be loaded in memory. __DEFAULT_FN_ATTRS_TILE static void __tile_loadd(__tile1024i *dst, const void *base, __SIZE_TYPE__ stride) { dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride); } +/// Compute dot-product of bytes in tiles with a source/destination accumulator. +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with +/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit +/// results. Sum these 4 results with the corresponding 32-bit integer in "dst", +/// and store the 32-bit result back to tile "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TDPBSSD instruction. +/// +/// \param dst +/// The destination tile. Max size is 1024 Bytes. +/// \param src0 +/// The 1st source tile. Max size is 1024 Bytes. +/// \param src1 +/// The 2nd source tile. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_INT8 -static void __tile_dpbssd(__tile1024i *dst, __tile1024i src1, - __tile1024i src2) { - dst->tile = _tile_dpbssd_internal(src1.row, src2.col, src1.col, dst->tile, - src1.tile, src2.tile); +static void __tile_dpbssd(__tile1024i *dst, __tile1024i src0, + __tile1024i src1) { + dst->tile = _tile_dpbssd_internal(src0.row, src1.col, src0.col, dst->tile, + src0.tile, src1.tile); } +/// Compute dot-product of bytes in tiles with a source/destination accumulator. +/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with +/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate +/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer +/// in "dst", and store the 32-bit result back to tile "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TDPBSUD instruction. +/// +/// \param dst +/// The destination tile. Max size is 1024 Bytes. +/// \param src0 +/// The 1st source tile. Max size is 1024 Bytes. +/// \param src1 +/// The 2nd source tile. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_INT8 -static void __tile_dpbsud(__tile1024i *dst, __tile1024i src1, - __tile1024i src2) { - dst->tile = _tile_dpbsud_internal(src1.row, src2.col, src1.col, dst->tile, - src1.tile, src2.tile); +static void __tile_dpbsud(__tile1024i *dst, __tile1024i src0, + __tile1024i src1) { + dst->tile = _tile_dpbsud_internal(src0.row, src1.col, src0.col, dst->tile, + src0.tile, src1.tile); } +/// Compute dot-product of bytes in tiles with a source/destination accumulator. +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with +/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit +/// results. Sum these 4 results with the corresponding 32-bit integer in "dst", +/// and store the 32-bit result back to tile "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TDPBUSD instruction. +/// +/// \param dst +/// The destination tile. Max size is 1024 Bytes. +/// \param src0 +/// The 1st source tile. Max size is 1024 Bytes. +/// \param src1 +/// The 2nd source tile. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_INT8 -static void __tile_dpbusd(__tile1024i *dst, __tile1024i src1, - __tile1024i src2) { - dst->tile = _tile_dpbusd_internal(src1.row, src2.col, src1.col, dst->tile, - src1.tile, src2.tile); +static void __tile_dpbusd(__tile1024i *dst, __tile1024i src0, + __tile1024i src1) { + dst->tile = _tile_dpbusd_internal(src0.row, src1.col, src0.col, dst->tile, + src0.tile, src1.tile); } +/// Compute dot-product of bytes in tiles with a source/destination accumulator. +/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with +/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate +/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer in +/// "dst", and store the 32-bit result back to tile "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TDPBUUD instruction. +/// +/// \param dst +/// The destination tile. Max size is 1024 Bytes. +/// \param src0 +/// The 1st source tile. Max size is 1024 Bytes. +/// \param src1 +/// The 2nd source tile. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_INT8 -static void __tile_dpbuud(__tile1024i *dst, __tile1024i src1, - __tile1024i src2) { - dst->tile = _tile_dpbuud_internal(src1.row, src2.col, src1.col, dst->tile, - src1.tile, src2.tile); +static void __tile_dpbuud(__tile1024i *dst, __tile1024i src0, + __tile1024i src1) { + dst->tile = _tile_dpbuud_internal(src0.row, src1.col, src0.col, dst->tile, + src0.tile, src1.tile); } +/// Store the tile specified by "src" to memory specifieid by "base" address and +/// "stride". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TILESTORED instruction. +/// +/// \param dst +/// A destination tile. Max size is 1024 Bytes. +/// \param base +/// A pointer to base address. +/// \param stride +/// The stride between the rows' data to be stored in memory. __DEFAULT_FN_ATTRS_TILE static void __tile_stored(void *base, __SIZE_TYPE__ stride, __tile1024i src) { _tile_stored_internal(src.row, src.col, base, stride, src.tile); } +/// Zero the tile specified by "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TILEZERO instruction. +/// +/// \param dst +/// The destination tile to be zero. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_TILE static void __tile_zero(__tile1024i *dst) { dst->tile = __builtin_ia32_tilezero_internal(dst->row, dst->col); } +/// Compute dot-product of BF16 (16-bit) floating-point pairs in tiles src0 and +/// src1, accumulating the intermediate single-precision (32-bit) floating-point +/// elements with elements in "dst", and store the 32-bit result back to tile +/// "dst". +/// +/// \headerfile +/// +/// This intrinsic corresponds to the TDPBF16PS instruction. +/// +/// \param dst +/// The destination tile. Max size is 1024 Bytes. +/// \param src0 +/// The 1st source tile. Max size is 1024 Bytes. +/// \param src1 +/// The 2nd source tile. Max size is 1024 Bytes. __DEFAULT_FN_ATTRS_BF16 -static void __tile_dpbf16ps(__tile1024i *dst, __tile1024i src1, - __tile1024i src2) { - dst->tile = _tile_dpbf16ps_internal(src1.row, src2.col, src1.col, dst->tile, - src1.tile, src2.tile); +static void __tile_dpbf16ps(__tile1024i *dst, __tile1024i src0, + __tile1024i src1) { + dst->tile = _tile_dpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile, + src0.tile, src1.tile); } #undef __DEFAULT_FN_ATTRS_TILE