diff --git a/llvm/include/llvm/MC/MCExpr.h b/llvm/include/llvm/MC/MCExpr.h --- a/llvm/include/llvm/MC/MCExpr.h +++ b/llvm/include/llvm/MC/MCExpr.h @@ -296,6 +296,8 @@ VK_PPC_GOT_TLSGD_HI, // symbol@got@tlsgd@h VK_PPC_GOT_TLSGD_HA, // symbol@got@tlsgd@ha VK_PPC_TLSGD, // symbol@tlsgd + VK_PPC_AIX_TLSGD, // symbol@gd + VK_PPC_AIX_TLSGDM, // symbol@m VK_PPC_GOT_TLSLD, // symbol@got@tlsld VK_PPC_GOT_TLSLD_LO, // symbol@got@tlsld@l VK_PPC_GOT_TLSLD_HI, // symbol@got@tlsld@h diff --git a/llvm/lib/MC/MCExpr.cpp b/llvm/lib/MC/MCExpr.cpp --- a/llvm/lib/MC/MCExpr.cpp +++ b/llvm/lib/MC/MCExpr.cpp @@ -322,6 +322,10 @@ case VK_PPC_GOT_TLSGD_HI: return "got@tlsgd@h"; case VK_PPC_GOT_TLSGD_HA: return "got@tlsgd@ha"; case VK_PPC_TLSGD: return "tlsgd"; + case VK_PPC_AIX_TLSGD: + return "gd"; + case VK_PPC_AIX_TLSGDM: + return "m"; case VK_PPC_GOT_TLSLD: return "got@tlsld"; case VK_PPC_GOT_TLSLD_LO: return "got@tlsld@l"; case VK_PPC_GOT_TLSLD_HI: return "got@tlsld@h"; diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -136,11 +136,13 @@ MCSymbolXCOFF *TCSym = cast(Streamer.getCurrentSectionOnly()) ->getQualNameSymbol(); - // If the variant kind is TLSGD the entry represents the region handle for - // the symbol, we prefix the name with a dot and we add the @m - // relocation specifier. - if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_TLSGD) - OS << "\t.tc ." << TCSym->getName() << "," << XSym->getName() << "@m\n"; + // If the variant kind is VK_PPC_AIX_TLSGDM/VK_PPC_AIX_TLSGD the entry + // represents the region handle/variable offset for the symbol, we add + // the relocation specifier @m/@gd. + if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD || + Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM) + OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@" + << MCSymbolRefExpr::getVariantKindName(Kind) << '\n'; else OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << '\n'; diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h --- a/llvm/lib/Target/PowerPC/PPC.h +++ b/llvm/lib/Target/PowerPC/PPC.h @@ -116,7 +116,8 @@ MO_PCREL_OPT_FLAG = 16, /// MO_TLSGD_FLAG - If this bit is set the symbol reference is relative to - /// TLS General Dynamic model. + /// TLS General Dynamic model for Linux and the variable offset of TLS + /// General Dynamic model for AIX. MO_TLSGD_FLAG = 32, /// MO_TPREL_FLAG - If this bit is set the symbol reference is relative to @@ -127,6 +128,10 @@ /// TLS Local Dynamic model. MO_TLSLD_FLAG = 128, + /// MO_TLSGDM_FLAG - If this bit is set the symbol reference is relative + /// to the region handle of TLS General Dynamic model for AIX. + MO_TLSGDM_FLAG = 256, + /// MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set /// they should produce the relocation @got@tlsgd@pcrel. /// Fix up is VK_PPC_GOT_TLSGD_PCREL diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -558,7 +558,12 @@ assert(MI->getOperand(2).isReg() && MI->getOperand(2).getReg() == VarOffsetReg && "GETtls[ld]ADDR[32] must read GPR4"); - MCSymbol *TlsGetAddrA = OutContext.getOrCreateSymbol(Name); + MCSymbol *TlsGetAddrA = + OutContext + .getXCOFFSection( + Name, SectionKind::getText(), + XCOFF::CsectProperties(XCOFF::XMC_PR, XCOFF::XTY_ER)) + ->getQualNameSymbol(); const MCExpr *TlsRef = MCSymbolRefExpr::create( TlsGetAddrA, MCSymbolRefExpr::VK_None, OutContext); EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BLA).addExpr(TlsRef)); @@ -673,10 +678,12 @@ }; auto GetVKForMO = [&](const MachineOperand &MO) { // For GD TLS access on AIX, we have two TOC entries for the symbol (one for - // the offset and the other for the region handle). They are differentiated - // by the presence of the PPCII::MO_TLSGD_FLAG. - if (IsAIX && (MO.getTargetFlags() & PPCII::MO_TLSGD_FLAG)) - return MCSymbolRefExpr::VariantKind::VK_PPC_TLSGD; + // the variable offset and the other for the region handle). They are + // differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG. + if (MO.getTargetFlags() & PPCII::MO_TLSGDM_FLAG) + return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM; + if (MO.getTargetFlags() & PPCII::MO_TLSGD_FLAG) + return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD; return MCSymbolRefExpr::VariantKind::VK_None; }; @@ -2232,9 +2239,22 @@ static_cast(OutStreamer->getTargetStreamer()); for (auto &I : TOC) { - // Setup the csect for the current TC entry. - MCSectionXCOFF *TCEntry = cast( - getObjFileLowering().getSectionForTOCEntry(I.first.first, TM)); + MCSectionXCOFF *TCEntry; + // Setup the csect for the current TC entry. If the variant kind is + // VK_PPC_AIX_TLSGDM the entry represents the region handle, we create a + // new symbol to prefix the name with a dot. + if (I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM) { + SmallString<128> Name; + StringRef Prefix = "."; + Name += Prefix; + Name += I.first.first->getName(); + MCSymbol *S = OutContext.getOrCreateSymbol(Name); + TCEntry = cast( + getObjFileLowering().getSectionForTOCEntry(S, TM)); + } else { + TCEntry = cast( + getObjFileLowering().getSectionForTOCEntry(I.first.first, TM)); + } OutStreamer->SwitchSection(TCEntry); OutStreamer->emitLabel(I.second); @@ -2317,7 +2337,12 @@ case PPC::GETtlsADDR32AIX: { // The reference to .__tls_get_addr is unknown to the assembler // so we need to emit an external symbol reference. - MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(".__tls_get_addr"); + MCSymbol *TlsGetAddr = + OutContext + .getXCOFFSection( + ".__tls_get_addr", SectionKind::getText(), + XCOFF::CsectProperties(XCOFF::XMC_PR, XCOFF::XTY_ER)) + ->getQualNameSymbol(); ExtSymSDNodeSymbols.insert(TlsGetAddr); break; } diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3138,11 +3138,12 @@ // all the GlobalTLSAddress nodes are lowered with this model. // We need to generate two TOC entries, one for the variable offset, one for // the region handle. The global address for the TOC entry of the region - // handle is created with the MO_TLSGD_FLAG flag so we can easily identify - // this entry and add the right relocation. - SDValue VariableOffsetTGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0); - SDValue RegionHandleTGA = + // handle is created with the MO_TLSGDM_FLAG flag and the global address + // for the TOC entry of the variable offset is created with MO_TLSGD_FLAG. + SDValue VariableOffsetTGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, PPCII::MO_TLSGD_FLAG); + SDValue RegionHandleTGA = + DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, PPCII::MO_TLSGDM_FLAG); SDValue VariableOffset = getTOCEntry(DAG, dl, VariableOffsetTGA); SDValue RegionHandle = getTOCEntry(DAG, dl, RegionHandleTGA); return DAG.getNode(PPCISD::TLSGD_AIX, dl, PtrVT, VariableOffset, diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -2893,6 +2893,7 @@ {MO_TLSGD_FLAG, "ppc-tlsgd"}, {MO_TLSLD_FLAG, "ppc-tlsld"}, {MO_TPREL_FLAG, "ppc-tprel"}, + {MO_TLSGDM_FLAG, "ppc-tlsgdm"}, {MO_GOT_TLSGD_PCREL_FLAG, "ppc-got-tlsgd-pcrel"}, {MO_GOT_TLSLD_PCREL_FLAG, "ppc-got-tlsld-pcrel"}, {MO_GOT_TPREL_PCREL_FLAG, "ppc-got-tprel-pcrel"}}; diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll @@ -615,19 +615,19 @@ ; SMALL32-LABEL: L..C0: ; SMALL32-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m ; SMALL32-LABEL: L..C1: -; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL] +; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd ; SMALL32-LABEL: L..C2: ; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL32-LABEL: L..C3: -; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL32-LABEL: L..C4: ; SMALL32-NEXT: .tc .TIInit[TC],TIInit[TL]@m ; SMALL32-LABEL: L..C5: -; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL] +; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@gd ; SMALL32-LABEL: L..C6: ; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m ; SMALL32-LABEL: L..C7: -; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL] +; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL]@gd ; SMALL32-LABEL: L..C8: ; SMALL32-NEXT: .tc GInit[TC],GInit[RW] @@ -635,19 +635,19 @@ ; LARGE32-LABEL: L..C0: ; LARGE32-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m ; LARGE32-LABEL: L..C1: -; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL] +; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd ; LARGE32-LABEL: L..C2: ; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE32-LABEL: L..C3: -; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE32-LABEL: L..C4: ; LARGE32-NEXT: .tc .TIInit[TE],TIInit[TL]@m ; LARGE32-LABEL: L..C5: -; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL] +; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@gd ; LARGE32-LABEL: L..C6: ; LARGE32-NEXT: .tc .TWInit[TE],TWInit[TL]@m ; LARGE32-LABEL: L..C7: -; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL] +; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL]@gd ; LARGE32-LABEL: L..C8: ; LARGE32-NEXT: .tc GInit[TE],GInit[RW] @@ -655,19 +655,19 @@ ; SMALL64-LABEL: L..C0: ; SMALL64-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m ; SMALL64-LABEL: L..C1: -; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL] +; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd ; SMALL64-LABEL: L..C2: ; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL64-LABEL: L..C3: -; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL64-LABEL: L..C4: ; SMALL64-NEXT: .tc .TIInit[TC],TIInit[TL]@m ; SMALL64-LABEL: L..C5: -; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL] +; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@gd ; SMALL64-LABEL: L..C6: ; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m ; SMALL64-LABEL: L..C7: -; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL] +; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL]@gd ; SMALL64-LABEL: L..C8: ; SMALL64-NEXT: .tc GInit[TC],GInit[RW] @@ -675,19 +675,19 @@ ; LARGE64-LABEL: L..C0: ; LARGE64-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m ; LARGE64-LABEL: L..C1: -; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL] +; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd ; LARGE64-LABEL: L..C2: ; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE64-LABEL: L..C3: -; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE64-LABEL: L..C4: ; LARGE64-NEXT: .tc .TIInit[TE],TIInit[TL]@m ; LARGE64-LABEL: L..C5: -; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL] +; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@gd ; LARGE64-LABEL: L..C6: ; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m ; LARGE64-LABEL: L..C7: -; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL] +; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL]@gd ; LARGE64-LABEL: L..C8: ; LARGE64-NEXT: .tc GInit[TE],GInit[RW] diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll @@ -631,19 +631,19 @@ ; SMALL32-LABEL: L..C0: ; SMALL32-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m ; SMALL32-LABEL: L..C1: -; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL] +; SMALL32-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd ; SMALL32-LABEL: L..C2: ; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL32-LABEL: L..C3: -; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL32-LABEL: L..C4: ; SMALL32-NEXT: .tc .TIUninit[TC],TIUninit[UL]@m ; SMALL32-LABEL: L..C5: -; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL] +; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@gd ; SMALL32-LABEL: L..C6: ; SMALL32-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m ; SMALL32-LABEL: L..C7: -; SMALL32-NEXT: .tc TWUninit[TC],TWUninit[TL] +; SMALL32-NEXT: .tc TWUninit[TC],TWUninit[TL]@gd ; SMALL32-LABEL: L..C8: ; SMALL32-NEXT: .tc GInit[TC],GInit[RW] @@ -651,19 +651,19 @@ ; LARGE32-LABEL: L..C0: ; LARGE32-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m ; LARGE32-LABEL: L..C1: -; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL] +; LARGE32-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd ; LARGE32-LABEL: L..C2: ; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE32-LABEL: L..C3: -; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE32-LABEL: L..C4: ; LARGE32-NEXT: .tc .TIUninit[TE],TIUninit[UL]@m ; LARGE32-LABEL: L..C5: -; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL] +; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@gd ; LARGE32-LABEL: L..C6: ; LARGE32-NEXT: .tc .TWUninit[TE],TWUninit[TL]@m ; LARGE32-LABEL: L..C7: -; LARGE32-NEXT: .tc TWUninit[TE],TWUninit[TL] +; LARGE32-NEXT: .tc TWUninit[TE],TWUninit[TL]@gd ; LARGE32-LABEL: L..C8: ; LARGE32-NEXT: .tc GInit[TE],GInit[RW] @@ -671,19 +671,19 @@ ; SMALL64-LABEL: L..C0: ; SMALL64-NEXT: .tc .TGUninit[TC],TGUninit[TL]@m ; SMALL64-LABEL: L..C1: -; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL] +; SMALL64-NEXT: .tc TGUninit[TC],TGUninit[TL]@gd ; SMALL64-LABEL: L..C2: ; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL64-LABEL: L..C3: -; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL64-LABEL: L..C4: ; SMALL64-NEXT: .tc .TIUninit[TC],TIUninit[UL]@m ; SMALL64-LABEL: L..C5: -; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL] +; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@gd ; SMALL64-LABEL: L..C6: ; SMALL64-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m ; SMALL64-LABEL: L..C7: -; SMALL64-NEXT: .tc TWUninit[TC],TWUninit[TL] +; SMALL64-NEXT: .tc TWUninit[TC],TWUninit[TL]@gd ; SMALL64-LABEL: L..C8: ; SMALL64-NEXT: .tc GInit[TC],GInit[RW] @@ -691,19 +691,19 @@ ; LARGE64-LABEL: L..C0: ; LARGE64-NEXT: .tc .TGUninit[TE],TGUninit[TL]@m ; LARGE64-LABEL: L..C1: -; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL] +; LARGE64-NEXT: .tc TGUninit[TE],TGUninit[TL]@gd ; LARGE64-LABEL: L..C2: ; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE64-LABEL: L..C3: -; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE64-LABEL: L..C4: ; LARGE64-NEXT: .tc .TIUninit[TE],TIUninit[UL]@m ; LARGE64-LABEL: L..C5: -; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL] +; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@gd ; LARGE64-LABEL: L..C6: ; LARGE64-NEXT: .tc .TWUninit[TE],TWUninit[TL]@m ; LARGE64-LABEL: L..C7: -; LARGE64-NEXT: .tc TWUninit[TE],TWUninit[TL] +; LARGE64-NEXT: .tc TWUninit[TE],TWUninit[TL]@gd ; LARGE64-LABEL: L..C8: ; LARGE64-NEXT: .tc GInit[TE],GInit[RW] diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll --- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll +++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll @@ -671,19 +671,19 @@ ; SMALL32-LABEL: L..C0: ; SMALL32-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL32-LABEL: L..C1: -; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL32-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL32-LABEL: L..C2: ; SMALL32-NEXT: .tc .TIUninit[TC],TIUninit[UL]@m ; SMALL32-LABEL: L..C3: -; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL] +; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@gd ; SMALL32-LABEL: L..C4: ; SMALL32-NEXT: .tc .TIInit[TC],TIInit[TL]@m ; SMALL32-LABEL: L..C5: -; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL] +; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@gd ; SMALL32-LABEL: L..C6: ; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m ; SMALL32-LABEL: L..C7: -; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL] +; SMALL32-NEXT: .tc TWInit[TC],TWInit[TL]@gd ; SMALL32-LABEL: L..C8: ; SMALL32-NEXT: .tc GInit[TC],GInit[RW] @@ -691,19 +691,19 @@ ; LARGE32-LABEL: L..C0: ; LARGE32-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE32-LABEL: L..C1: -; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE32-LABEL: L..C2: ; LARGE32-NEXT: .tc .TIUninit[TE],TIUninit[UL]@m ; LARGE32-LABEL: L..C3: -; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL] +; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@gd ; LARGE32-LABEL: L..C4: ; LARGE32-NEXT: .tc .TIInit[TE],TIInit[TL]@m ; LARGE32-LABEL: L..C5: -; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL] +; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@gd ; LARGE32-LABEL: L..C6: ; LARGE32-NEXT: .tc .TWInit[TE],TWInit[TL]@m ; LARGE32-LABEL: L..C7: -; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL] +; LARGE32-NEXT: .tc TWInit[TE],TWInit[TL]@gd ; LARGE32-LABEL: L..C8: ; LARGE32-NEXT: .tc GInit[TE],GInit[RW] @@ -711,19 +711,19 @@ ; SMALL64-LABEL: L..C0: ; SMALL64-NEXT: .tc .TGInit[TC],TGInit[TL]@m ; SMALL64-LABEL: L..C1: -; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL] +; SMALL64-NEXT: .tc TGInit[TC],TGInit[TL]@gd ; SMALL64-LABEL: L..C2: ; SMALL64-NEXT: .tc .TIUninit[TC],TIUninit[UL]@m ; SMALL64-LABEL: L..C3: -; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL] +; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@gd ; SMALL64-LABEL: L..C4: ; SMALL64-NEXT: .tc .TIInit[TC],TIInit[TL]@m ; SMALL64-LABEL: L..C5: -; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL] +; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@gd ; SMALL64-LABEL: L..C6: ; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m ; SMALL64-LABEL: L..C7: -; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL] +; SMALL64-NEXT: .tc TWInit[TC],TWInit[TL]@gd ; SMALL64-LABEL: L..C8: ; SMALL64-NEXT: .tc GInit[TC],GInit[RW] @@ -731,19 +731,19 @@ ; LARGE64-LABEL: L..C0: ; LARGE64-NEXT: .tc .TGInit[TE],TGInit[TL]@m ; LARGE64-LABEL: L..C1: -; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL] +; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@gd ; LARGE64-LABEL: L..C2: ; LARGE64-NEXT: .tc .TIUninit[TE],TIUninit[UL]@m ; LARGE64-LABEL: L..C3: -; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL] +; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@gd ; LARGE64-LABEL: L..C4: ; LARGE64-NEXT: .tc .TIInit[TE],TIInit[TL]@m ; LARGE64-LABEL: L..C5: -; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL] +; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@gd ; LARGE64-LABEL: L..C6: ; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m ; LARGE64-LABEL: L..C7: -; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL] +; LARGE64-NEXT: .tc TWInit[TE],TWInit[TL]@gd ; LARGE64-LABEL: L..C8: ; LARGE64-NEXT: .tc GInit[TE],GInit[RW]