diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h --- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h +++ b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h @@ -90,6 +90,9 @@ MachineModuleInfo *MMI, MCStreamer &Streamer) const override; + /// Return the appropriate section type based on name and kind + unsigned getELFSectionType(StringRef Name, SectionKind K) const; + // The symbol that gets passed to .cfi_personality. MCSymbol *getCFIPersonalitySymbol(const GlobalValue *GV, const TargetMachine &TM, diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h --- a/llvm/include/llvm/MC/MCContext.h +++ b/llvm/include/llvm/MC/MCContext.h @@ -351,29 +351,32 @@ /// Map of currently defined macros. StringMap MacroMap; - struct ELFEntrySizeKey { + struct ELFSectionUniqueKey { std::string SectionName; unsigned Flags; unsigned EntrySize; - ELFEntrySizeKey(StringRef SectionName, unsigned Flags, unsigned EntrySize) + ELFSectionUniqueKey(StringRef SectionName, unsigned Flags, + unsigned EntrySize) : SectionName(SectionName), Flags(Flags), EntrySize(EntrySize) {} - bool operator<(const ELFEntrySizeKey &Other) const { + bool operator<(const ELFSectionUniqueKey &Other) const { if (SectionName != Other.SectionName) return SectionName < Other.SectionName; if ((Flags & ELF::SHF_STRINGS) != (Other.Flags & ELF::SHF_STRINGS)) return Other.Flags & ELF::SHF_STRINGS; + if (Flags != Other.Flags) + return Flags < Other.Flags; return EntrySize < Other.EntrySize; } }; - // Symbols must be assigned to a section with a compatible entry - // size. This map is used to assign unique IDs to sections to - // distinguish between sections with identical names but incompatible entry - // sizes. This can occur when a symbol is explicitly assigned to a - // section, e.g. via __attribute__((section("myname"))). - std::map ELFEntrySizeMap; + // Symbols must be assigned to a section with a compatible entry size and + // flags. This map is used to assign unique IDs to sections to distinguish + // between sections with identical names but incompatible entry sizes and/or + // flags. This can occur when a symbol is explicitly assigned to a section, + // e.g. via __attribute__((section("myname"))). + std::map ELFSectionUniqueMap; // This set is used to record the generic mergeable section names seen. // These are sections that are created as mergeable e.g. .debug_str. We need @@ -571,9 +574,9 @@ bool isELFImplicitMergeableSectionNamePrefix(StringRef Name); - bool isELFGenericMergeableSection(StringRef Name); - - Optional getELFUniqueIDForEntsize(StringRef SectionName, + /// Return the unique ID of the section with the given name, flags and entry + /// size, if it exists. + Optional getELFUniqueIDForSection(StringRef SectionName, unsigned Flags, unsigned EntrySize); diff --git a/llvm/include/llvm/MC/MCObjectFileInfo.h b/llvm/include/llvm/MC/MCObjectFileInfo.h --- a/llvm/include/llvm/MC/MCObjectFileInfo.h +++ b/llvm/include/llvm/MC/MCObjectFileInfo.h @@ -48,6 +48,9 @@ /// its target unsigned FDECFIEncoding = 0; + /// Section type for .eh_frame section, target dependent + unsigned EHSectionType; + /// Compact unwind encoding indicating that we should emit only an EH frame. unsigned CompactUnwindDwarfEHFrameOnly = 0; @@ -247,6 +250,8 @@ unsigned getFDEEncoding() const { return FDECFIEncoding; } + unsigned getEHSectionType() const { return EHSectionType; } + unsigned getCompactUnwindDwarfEHFrameOnly() const { return CompactUnwindDwarfEHFrameOnly; } diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp --- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp @@ -476,7 +476,8 @@ return K; } -static unsigned getELFSectionType(StringRef Name, SectionKind K) { +unsigned TargetLoweringObjectFileELF::getELFSectionType(StringRef Name, + SectionKind K) const { // Use SHT_NOTE for section whose name starts with ".note" to allow // emitting ELF notes from C variable declaration. // See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77609 @@ -492,6 +493,9 @@ if (Name == ".preinit_array") return ELF::SHT_PREINIT_ARRAY; + if (Name == ".eh_frame") + return getEHSectionType(); + if (K.isBSS() || K.isThreadBSS()) return ELF::SHT_NOBITS; @@ -710,32 +714,23 @@ // Symbols must be placed into sections with compatible entry // sizes. Generate unique sections for symbols that have not // been assigned to compatible sections. - if (Flags & ELF::SHF_MERGE) { - auto maybeID = getContext().getELFUniqueIDForEntsize(SectionName, Flags, - EntrySize); - if (maybeID) - UniqueID = *maybeID; - else { - // If the user has specified the same section name as would be created - // implicitly for this symbol e.g. .rodata.str1.1, then we don't need - // to unique the section as the entry size for this symbol will be - // compatible with implicitly created sections. - SmallString<128> ImplicitSectionNameStem = getELFSectionNameForGlobal( - GO, Kind, getMangler(), TM, EntrySize, false); - if (!(getContext().isELFImplicitMergeableSectionNamePrefix( - SectionName) && - SectionName.startswith(ImplicitSectionNameStem))) - UniqueID = NextUniqueID++; - } + auto maybeID = + getContext().getELFUniqueIDForSection(SectionName, Flags, EntrySize); + if (maybeID) { + UniqueID = *maybeID; + } else if (Flags & ELF::SHF_MERGE) { + // If the user has specified the same section name as would be created + // implicitly for this symbol e.g. .rodata.str1.1, then we don't need + // to unique the section as the entry size for this symbol will be + // compatible with implicitly created sections. + SmallString<128> ImplicitSectionNameStem = getELFSectionNameForGlobal( + GO, Kind, getMangler(), TM, EntrySize, false); + if (!(getContext().isELFImplicitMergeableSectionNamePrefix( + SectionName) && + SectionName.startswith(ImplicitSectionNameStem))) + UniqueID = NextUniqueID++; } else { - // We need to unique the section if the user has explicity - // assigned a non-mergeable symbol to a section name for - // a generic mergeable section. - if (getContext().isELFGenericMergeableSection(SectionName)) { - auto maybeID = getContext().getELFUniqueIDForEntsize( - SectionName, Flags, EntrySize); - UniqueID = maybeID ? *maybeID : NextUniqueID++; - } + UniqueID = NextUniqueID++; } } else { // If two symbols with differing sizes end up in the same mergeable @@ -809,7 +804,10 @@ // Use 0 as the unique ID for execute-only text. if (Kind.isExecuteOnly()) UniqueID = 0; - return Ctx.getELFSection(Name, getELFSectionType(Name, Kind), Flags, + + const auto *OFI = + (const TargetLoweringObjectFileELF *)(Ctx.getObjectFileInfo()); + return Ctx.getELFSection(Name, OFI->getELFSectionType(Name, Kind), Flags, EntrySize, Group, IsComdat, UniqueID, AssociatedSymbol); } diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp --- a/llvm/lib/MC/MCContext.cpp +++ b/llvm/lib/MC/MCContext.cpp @@ -130,7 +130,7 @@ WasmUniquingMap.clear(); XCOFFUniquingMap.clear(); - ELFEntrySizeMap.clear(); + ELFSectionUniqueMap.clear(); ELFSeenGenericMergeableSections.clear(); NextID.clear(); @@ -537,6 +537,15 @@ recordELFMergeableSectionInfo(Result->getName(), Result->getFlags(), Result->getUniqueID(), Result->getEntrySize()); + // Record the Unique ID into the ELFSectionUniqueMap so that compatible + // globals can be assigned to the same section. Don't record "generic" or + // non-unique IDs in the map, e.g. those created by default. + if (Result->getUniqueID() != GenericSectionID) { + ELFSectionUniqueKey K{Result->getName(), Result->getFlags(), + Result->getEntrySize()}; + ELFSectionUniqueMap.insert({K, Result->getUniqueID()}); + } + return Result; } @@ -553,14 +562,6 @@ bool IsMergeable = Flags & ELF::SHF_MERGE; if (IsMergeable && (UniqueID == GenericSectionID)) ELFSeenGenericMergeableSections.insert(SectionName); - - // For mergeable sections or non-mergeable sections with a generic mergeable - // section name we enter their Unique ID into the ELFEntrySizeMap so that - // compatible globals can be assigned to the same section. - if (IsMergeable || isELFGenericMergeableSection(SectionName)) { - ELFEntrySizeMap.insert(std::make_pair( - ELFEntrySizeKey{SectionName, Flags, EntrySize}, UniqueID)); - } } bool MCContext::isELFImplicitMergeableSectionNamePrefix(StringRef SectionName) { @@ -568,17 +569,13 @@ SectionName.startswith(".rodata.cst"); } -bool MCContext::isELFGenericMergeableSection(StringRef SectionName) { - return isELFImplicitMergeableSectionNamePrefix(SectionName) || - ELFSeenGenericMergeableSections.count(SectionName); -} - -Optional MCContext::getELFUniqueIDForEntsize(StringRef SectionName, +Optional MCContext::getELFUniqueIDForSection(StringRef SectionName, unsigned Flags, unsigned EntrySize) { - auto I = ELFEntrySizeMap.find( - MCContext::ELFEntrySizeKey{SectionName, Flags, EntrySize}); - return (I != ELFEntrySizeMap.end()) ? Optional(I->second) : None; + auto I = ELFSectionUniqueMap.find( + MCContext::ELFSectionUniqueKey{SectionName, Flags, EntrySize}); + return (I != ELFSectionUniqueMap.end()) ? Optional(I->second) + : None; } MCSectionCOFF *MCContext::getCOFFSection(StringRef Section, diff --git a/llvm/lib/MC/MCObjectFileInfo.cpp b/llvm/lib/MC/MCObjectFileInfo.cpp --- a/llvm/lib/MC/MCObjectFileInfo.cpp +++ b/llvm/lib/MC/MCObjectFileInfo.cpp @@ -336,9 +336,8 @@ break; } - unsigned EHSectionType = T.getArch() == Triple::x86_64 - ? ELF::SHT_X86_64_UNWIND - : ELF::SHT_PROGBITS; + EHSectionType = T.getArch() == Triple::x86_64 ? ELF::SHT_X86_64_UNWIND + : ELF::SHT_PROGBITS; // Solaris requires different flags for .eh_frame to seemingly every other // platform. @@ -494,7 +493,7 @@ Ctx->getELFSection(".llvm_faultmaps", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); EHFrameSection = - Ctx->getELFSection(".eh_frame", EHSectionType, EHSectionFlags); + Ctx->getELFSection(".eh_frame", getEHSectionType(), EHSectionFlags); StackSizesSection = Ctx->getELFSection(".stack_sizes", ELF::SHT_PROGBITS, 0); diff --git a/llvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll b/llvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll @@ -0,0 +1,85 @@ +; Test that global values with the same specified section produces multiple +; sections with different sets of flags, depending on the properties (mutable, +; executable) of the global value. + +; RUN: llc < %s | FileCheck %s +target triple="aarch64-none-eabi" + +; Normal function goes in text +define i32 @fn_text() { + entry: + ret i32 0 +} +; CHECK: .section .text,"ax",@progbits,unique,[[#UNIQUE_S2a:]] +; CHECK-NEXT: .globl fn_text + +; Functions in user defined executable sections +define i32 @fn_s1() section "s1" { + entry: + ret i32 0 +} +; CHECK: .section s1,"ax",@progbits,unique,[[#UNIQUE_S1a:]] +; CHECK-NEXT: .globl fn_s1 +define i32 @fn_s2() section "s2" { + entry: + ret i32 0 +} +; CHECK: .section s2,"ax",@progbits,unique,[[#UNIQUE_S2a:]] +; CHECK-NEXT: .globl fn_s2 + +; Values that share a section name with a function +@rw_s1 = global i32 10, section "s1", align 4 +@ro_s2 = constant i32 10, section "s2", align 4 +; CHECK: .section s1,"aw",@progbits,unique,[[#UNIQUE_S1b:]] +; CHECK-NEXT: .globl rw_s1 +; CHECK: .section s2,"a",@progbits,unique,[[#UNIQUE_S2b:]] +; CHECK-NEXT: .globl ro_s2 + +; Values declared without explicit sections +@rw_nosec = global i32 10, align 4 +@ro_nosec = constant i32 10, align 4 +; CHECK: .section .data +; CHECK-NEXT: .globl rw_nosec +; CHECK: .section .text +; CHECK-NEXT: .globl ro_nosec + +; Explicit sections that shouldn't have section flags updated +@a = global [2 x i32] zeroinitializer, section ".rodata", align 4 +@b = global [4 x i32] zeroinitializer, section ".sdata", align 4 +@c = global [4 x i32] zeroinitializer, section ".sbss", align 4 +; CHECK: .section .rodata +; CHECK-NEXT: .globl a{{$}} +; CHECK: .section .sdata +; CHECK-NEXT: .globl b{{$}} +; CHECK: .section .sbss +; CHECK-NEXT: .globl c{{$}} + +; Normal user defined section +@ro_s3 = constant i32 10, section "s3", align 4 +@rw_s3 = global i32 10, section "s3", align 4 +; CHECK: .section s3,"a",@progbits,unique,[[#UNIQUE_S3a:]] +; CHECK-NEXT: .globl ro_s3 +; CHECK: .section s3,"aw",@progbits,unique,[[#UNIQUE_S3b:]] +; CHECK-NEXT: .globl rw_s3 + +; Multiple .text sections are emitted +@rw_text = global i32 10, section ".text", align 4 +@ro_text = constant i32 10, section ".text", align 4 +; CHECK: .section .text,"a",@progbits,unique,[[#UNIQUE_TEXTa:]] +; CHECK-NEXT: .globl ro_text +; CHECK: .section .text,"aw",@progbits,unique,[[#UNIQUE_TEXTb:]] +; CHECK-NEXT: .globl rw_text + +; A read-only .data section is emitted +@ro_data = constant i32 10, section ".data", align 4 +; CHECK: .section .data,"a",@progbits +; CHECK-NEXT: .globl ro_data + +; TLS and non-TLS symbols cannot live in the same section +@tls_var = thread_local global i32 10, section "s4", align 4 +@non_tls_var = global i32 10, section "s4", align 4 +; CHECK: .section s4,"awT",@progbits,unique,[[#UNIQUE_S4a:]] +; CHECK-NEXT: .globl tls_var +; CHECK-NOT: .section s4,{{.*}},unique,[[#UNIQUE_S4a]] +; CHECK: .section s4,"aw",@progbits,unique,[[#UNIQUE_S4b:]] +; CHECK-NEXT: .globl non_tls_var diff --git a/llvm/test/CodeGen/Mips/gpopt-explict-section.ll b/llvm/test/CodeGen/Mips/gpopt-explict-section.ll --- a/llvm/test/CodeGen/Mips/gpopt-explict-section.ll +++ b/llvm/test/CodeGen/Mips/gpopt-explict-section.ll @@ -41,7 +41,7 @@ ; CHECK: .type a,@object -; CHECK: .section .rodata,"a",@progbits +; CHECK: .section .rodata,"aw",@progbits,unique ; CHECK: .globl a ; CHECK: .type b,@object diff --git a/llvm/test/CodeGen/X86/elf-associated.ll b/llvm/test/CodeGen/X86/elf-associated.ll --- a/llvm/test/CodeGen/X86/elf-associated.ll +++ b/llvm/test/CodeGen/X86/elf-associated.ll @@ -29,22 +29,22 @@ @k = global i32 1, !associated !4 !4 = !{i32* @h} ; CHECK-DAG: .section aaa,"aw",@progbits -; CHECK-DAG: .section bbb,"awo",@progbits,h,unique,1 ; CHECK-DAG: .section bbb,"awo",@progbits,h,unique,2 +; CHECK-DAG: .section bbb,"awo",@progbits,h,unique,3 ; CHECK-DAG: .section .data.k,"awo",@progbits,h ; Non-GlobalValue metadata. @l = global i32 1, section "ccc", !associated !5 !5 = !{i32* null} -; CHECK-DAG: .section ccc,"awo",@progbits,0,unique,3 +; CHECK-DAG: .section ccc,"awo",@progbits,0,unique,4 ; Null metadata. @m = global i32 1, section "ddd", !associated !6 !6 = distinct !{null} -; CHECK-DAG: .section ddd,"awo",@progbits,0,unique,4 +; CHECK-DAG: .section ddd,"awo",@progbits,0,unique,5 ; Aliases are OK. @n = alias i32, i32* inttoptr (i64 add (i64 ptrtoint (i32* @a to i64), i64 1297036692682702848) to i32*) @o = global i32 1, section "eee", !associated !7 !7 = !{i32* @n} -; CHECK-DAG: .section eee,"awo",@progbits,n,unique,5 +; CHECK-DAG: .section eee,"awo",@progbits,n,unique,6 diff --git a/llvm/test/CodeGen/X86/explicit-section-mergeable.ll b/llvm/test/CodeGen/X86/explicit-section-mergeable.ll --- a/llvm/test/CodeGen/X86/explicit-section-mergeable.ll +++ b/llvm/test/CodeGen/X86/explicit-section-mergeable.ll @@ -71,7 +71,7 @@ ; CHECK: .section .explicit_initially_nonmergeable,"a",@progbits ; CHECK: explicit_basic_8: -; CHECK: .section .explicit_initially_nonmergeable,"aM",@progbits,4,unique,6 +; CHECK: .section .explicit_initially_nonmergeable,"aM",@progbits,4,unique,8 ; CHECK: explicit_basic_9: ;; Assign a mergeble symbol to a section that initially had a non-mergeable symbol explicitly assigned to it. @@ -80,7 +80,7 @@ ; CHECK: .section .explicit_initially_nonmergeable,"a",@progbits ; CHECK: explicit_basic_10: -; CHECK: .section .explicit_initially_nonmergeable,"aM",@progbits,4,unique,6 +; CHECK: .section .explicit_initially_nonmergeable,"aM",@progbits,4,unique,8 ; CHECK: explicit_basic_11: ;; Assign compatible globals to the previously created sections. @@ -89,7 +89,7 @@ ;; Check that mergeable symbols can be explicitly assigned to "default" sections. -; CHECK: .section .rodata.cst16,"a",@progbits,unique,7 +; CHECK: .section .rodata.cst16,"a",@progbits,unique,9 ; CHECK: explicit_default_1: ;; Assign an incompatible (non-mergeable) symbol to a "default" mergeable section. @@ -101,22 +101,22 @@ ;; Assign a compatible global to a "default" mergeable section. @explicit_default_2 = unnamed_addr constant [2 x i64] [i64 1, i64 1], section ".rodata.cst16" -; CHECK: .section .debug_str,"MS",@progbits,1 +; CHECK: .section .debug_str,"aMS",@progbits,1,unique,10 ; CHECK: explicit_default_3: ;; Non-allocatable "default" sections can have allocatable mergeable symbols with compatible entry sizes assigned to them. @explicit_default_3 = unnamed_addr constant [2 x i8] [i8 1, i8 0], section ".debug_str" -; CHECK: .section .debug_str,"a",@progbits,unique,8 +; CHECK: .section .debug_str,"a",@progbits,unique,11 ; CHECK: explicit_default_4: ;; Non-allocatable "default" sections cannot have allocatable mergeable symbols with incompatible (non-mergeable) entry sizes assigned to them. @explicit_default_4 = constant [2 x i16] [i16 1, i16 1], section ".debug_str" ;; Test implicit section assignment for globals with associated globals. -; CHECK: .section .rodata.cst4,"aMo",@progbits,4,implicit_rodata_cst4,unique,9 +; CHECK: .section .rodata.cst4,"aMo",@progbits,4,implicit_rodata_cst4,unique,12 ; CHECK: implicit_rodata_cst4_assoc: -; CHECK: .section .rodata.cst8,"aMo",@progbits,8,implicit_rodata_cst4,unique,10 +; CHECK: .section .rodata.cst8,"aMo",@progbits,8,implicit_rodata_cst4,unique,13 ; CHECK: implicit_rodata_cst8_assoc: @implicit_rodata_cst4_assoc = unnamed_addr constant [2 x i16] [i16 1, i16 1], !associated !4 @@ -125,11 +125,11 @@ ;; Check that globals with associated globals that are explicitly assigned ;; to a section have been placed into distinct sections with the same name, but ;; different entry sizes. -; CHECK: .section .explicit,"aMo",@progbits,4,implicit_rodata_cst4,unique,11 +; CHECK: .section .explicit,"aMo",@progbits,4,implicit_rodata_cst4,unique,14 ; CHECK: explicit_assoc_1: -; CHECK: .section .explicit,"aMo",@progbits,4,implicit_rodata_cst4,unique,12 +; CHECK: .section .explicit,"aMo",@progbits,4,implicit_rodata_cst4,unique,15 ; CHECK: explicit_assoc_2: -; CHECK: .section .explicit,"aMo",@progbits,8,implicit_rodata_cst4,unique,13 +; CHECK: .section .explicit,"aMo",@progbits,8,implicit_rodata_cst4,unique,16 ; CHECK: explicit_assoc_3: @explicit_assoc_1 = unnamed_addr constant [2 x i16] [i16 1, i16 1], section ".explicit", !associated !4 @@ -139,9 +139,9 @@ !4 = !{[2 x i16]* @implicit_rodata_cst4} ;; Test implicit section assignment for globals in distinct comdat groups. -; CHECK: .section .rodata.cst4,"aGM",@progbits,4,f,comdat,unique,14 +; CHECK: .section .rodata.cst4,"aGM",@progbits,4,f,comdat,unique,17 ; CHECK: implicit_rodata_cst4_comdat: -; CHECK: .section .rodata.cst8,"aGM",@progbits,8,g,comdat,unique,15 +; CHECK: .section .rodata.cst8,"aGM",@progbits,8,g,comdat,unique,18 ; CHECK: implicit_rodata_cst8_comdat: ;; Check that globals in distinct comdat groups that are explicitly assigned @@ -151,13 +151,13 @@ ;; appear incorrect as comdats are not taken into account when looking up the unique ID ;; for a mergeable section. However, as they have no effect it doesn't matter that they ;; are incorrect. -; CHECK: .section .explicit_comdat_distinct,"aM",@progbits,4,unique,16 +; CHECK: .section .explicit_comdat_distinct,"aM",@progbits,4,unique,19 ; CHECK: explicit_comdat_distinct_supply_uid: -; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,4,f,comdat,unique,16 +; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,4,f,comdat,unique,20 ; CHECK: explicit_comdat_distinct1: -; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,4,g,comdat,unique,16 +; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,4,g,comdat,unique,20 ; CHECK: explicit_comdat_distinct2: -; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,8,h,comdat,unique,17 +; CHECK: .section .explicit_comdat_distinct,"aGM",@progbits,8,h,comdat,unique,21 ; CHECK: explicit_comdat_distinct3: $f = comdat any @@ -173,9 +173,9 @@ @explicit_comdat_distinct3 = unnamed_addr constant [2 x i32] [i32 1, i32 1], section ".explicit_comdat_distinct", comdat($h) ;; Test implicit section assignment for globals in the same comdat group. -; CHECK: .section .rodata.cst4,"aGM",@progbits,4,i,comdat,unique,18 +; CHECK: .section .rodata.cst4,"aGM",@progbits,4,i,comdat,unique,22 ; CHECK: implicit_rodata_cst4_same_comdat: -; CHECK: .section .rodata.cst8,"aGM",@progbits,8,i,comdat,unique,19 +; CHECK: .section .rodata.cst8,"aGM",@progbits,8,i,comdat,unique,23 ; CHECK: implicit_rodata_cst8_same_comdat: ;; Check that globals in the same comdat group that are explicitly assigned @@ -185,12 +185,12 @@ ;; appear incorrect as comdats are not taken into account when looking up the unique ID ;; for a mergeable section. However, as they have no effect it doesn't matter that they ;; are incorrect. -; CHECK: .section .explicit_comdat_same,"aM",@progbits,4,unique,20 +; CHECK: .section .explicit_comdat_same,"aM",@progbits,4,unique,24 ; CHECK: explicit_comdat_same_supply_uid: -; CHECK: .section .explicit_comdat_same,"aGM",@progbits,4,i,comdat,unique,20 +; CHECK: .section .explicit_comdat_same,"aGM",@progbits,4,i,comdat,unique,25 ; CHECK: explicit_comdat_same1: ; CHECK: explicit_comdat_same2: -; CHECK: .section .explicit_comdat_same,"aGM",@progbits,8,i,comdat,unique,21 +; CHECK: .section .explicit_comdat_same,"aGM",@progbits,8,i,comdat,unique,26 ; CHECK: explicit_comdat_same3: $i = comdat any @@ -214,7 +214,7 @@ @implicit_rodata_str1_1 = unnamed_addr constant [2 x i8] [i8 1, i8 0] @explicit_implicit_1 = unnamed_addr constant [2 x i8] [i8 1, i8 0], section ".rodata.str1.1" -; CHECK: .section .rodata.str1.1,"a",@progbits,unique,22 +; CHECK: .section .rodata.str1.1,"a",@progbits,unique,27 ; CHECK: explicit_implicit_2: ;; Assign an incompatible symbol (non-mergeable) to an existing mergeable section created implicitly. @@ -222,7 +222,7 @@ ; CHECK: .section .rodata.str1.1,"aMS",@progbits,1 ; CHECK: explicit_implicit_3: -; CHECK: .section .rodata.str1.1,"a",@progbits,unique,22 +; CHECK: .section .rodata.str1.1,"a",@progbits,unique,27 ; CHECK: explicit_implicit_4: ;; Assign compatible globals to the previously created sections. @@ -243,13 +243,13 @@ ; CHECK: explicit_asm_1: ; CHECK: .section .asm_nonmergeable1,"a",@progbits ; CHECK: explicit_asm_2: -; CHECK: .section .asm_mergeable1,"aM",@progbits,4,unique,23 +; CHECK: .section .asm_mergeable1,"aM",@progbits,4,unique,30 ; CHECK: explicit_asm_3: -; CHECK: .section .asm_nonmergeable1,"aMS",@progbits,2,unique,24 +; CHECK: .section .asm_nonmergeable1,"aMS",@progbits,2,unique,31 ; CHECK: explicit_asm_4: -; CHECK: .section .asm_mergeable2,"aM",@progbits,4,unique,25 +; CHECK: .section .asm_mergeable2,"aM",@progbits,4,unique,32 ; CHECK: explicit_asm_5: -; CHECK: .section .asm_nonmergeable2,"aMS",@progbits,2,unique,26 +; CHECK: .section .asm_nonmergeable2,"aMS",@progbits,2,unique,33 ; CHECK: explicit_asm_6: ; CHECK: .section .asm_mergeable2,"aMS",@progbits,2 ; CHECK: explicit_asm_7: