diff --git a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp --- a/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp @@ -39,7 +39,7 @@ "Number of folding frame offset by using r+r in pre-emit peephole"); static cl::opt -EnablePCRelLinkerOpt("ppc-pcrel-linker-opt", cl::Hidden, cl::init(true), +EnablePCRelLinkerOpt("ppc-pcrel-linker-opt", cl::Hidden, cl::init(false), cl::desc("enable PC Relative linker optimization")); static cl::opt diff --git a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll --- a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll +++ b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll @@ -105,8 +105,6 @@ ; CHECK-NEXT: paddi r4, 0, global_4@PCREL, 1 ; CHECK-NEXT: stw r3, 176(r1) ; CHECK-NEXT: pld r3, global_3@got@pcrel(0), 1 -; CHECK-NEXT: .Lpcrel0: -; CHECK-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; CHECK-NEXT: ld r12, 0(r3) ; CHECK-NEXT: mtctr r12 ; CHECK-NEXT: bctrl diff --git a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll @@ -67,8 +67,6 @@ ; CHECK-S-NEXT: extsw r3, r3 ; CHECK-S-NEXT: bl localCall@notoc ; CHECK-S-NEXT: pld r4, externGlobalVar@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel0: -; CHECK-S-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; CHECK-S-NEXT: lwz r4, 0(r4) ; CHECK-S-NEXT: mullw r3, r4, r3 ; CHECK-S-NEXT: extsw r3, r3 @@ -152,8 +150,6 @@ ; CHECK-S-NEXT: extsw r3, r3 ; CHECK-S-NEXT: bl externCall@notoc ; CHECK-S-NEXT: pld r4, externGlobalVar@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel1: -; CHECK-S-NEXT: .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8) ; CHECK-S-NEXT: lwz r4, 0(r4) ; CHECK-S-NEXT: mullw r3, r4, r3 ; CHECK-S-NEXT: extsw r3, r3 @@ -216,8 +212,6 @@ ; CHECK-S: .localentry TailCallLocal2 ; CHECK-S: # %bb.0: # %entry ; CHECK-S: pld r4, externGlobalVar@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel2: -; CHECK-S-NEXT: .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8) ; CHECK-S-NEXT: lwz r4, 0(r4) ; CHECK-S-NEXT: add r3, r4, r3 ; CHECK-S-NEXT: extsw r3, r3 @@ -260,8 +254,6 @@ ; CHECK-S: .localentry TailCallExtern2 ; CHECK-S: # %bb.0: # %entry ; CHECK-S: pld r4, externGlobalVar@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel3: -; CHECK-S-NEXT: .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8) ; CHECK-S-NEXT: lwz r4, 0(r4) ; CHECK-S-NEXT: add r3, r4, r3 ; CHECK-S-NEXT: extsw r3, r3 @@ -327,8 +319,6 @@ ; CHECK-S-NEXT: mtctr r12 ; CHECK-S-NEXT: bctrl ; CHECK-S-NEXT: pld r4, externGlobalVar@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel4: -; CHECK-S-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8) ; CHECK-S-NEXT: lwz r4, 0(r4) ; CHECK-S-NEXT: mullw r3, r4, r3 ; CHECK-S-NEXT: extsw r3, r3 diff --git a/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll b/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-got-indirect.ll @@ -23,16 +23,12 @@ ; LE-LABEL: ReadGlobalVarChar: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, valChar@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel0: -; LE-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; LE-NEXT: lbz r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalVarChar: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, valChar@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel0: -; BE-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; BE-NEXT: lbz r3, 0(r3) ; BE-NEXT: blr entry: @@ -64,16 +60,12 @@ ; LE-LABEL: ReadGlobalVarShort: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, valShort@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel1: -; LE-NEXT: .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8) ; LE-NEXT: lha r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalVarShort: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, valShort@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel1: -; BE-NEXT: .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8) ; BE-NEXT: lha r3, 0(r3) ; BE-NEXT: blr entry: @@ -105,16 +97,12 @@ ; LE-LABEL: ReadGlobalVarInt: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, valInt@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel2: -; LE-NEXT: .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8) ; LE-NEXT: lwa r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalVarInt: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, valInt@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel2: -; BE-NEXT: .reloc .Lpcrel2-8,R_PPC64_PCREL_OPT,.-(.Lpcrel2-8) ; BE-NEXT: lwa r3, 0(r3) ; BE-NEXT: blr entry: @@ -145,16 +133,12 @@ ; LE-LABEL: ReadGlobalVarUnsigned: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, valUnsigned@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel3: -; LE-NEXT: .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8) ; LE-NEXT: lwa r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalVarUnsigned: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, valUnsigned@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel3: -; BE-NEXT: .reloc .Lpcrel3-8,R_PPC64_PCREL_OPT,.-(.Lpcrel3-8) ; BE-NEXT: lwa r3, 0(r3) ; BE-NEXT: blr entry: @@ -185,16 +169,12 @@ ; LE-LABEL: ReadGlobalVarLong: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, valLong@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel4: -; LE-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8) ; LE-NEXT: lwa r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalVarLong: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, valLong@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel4: -; BE-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8) ; BE-NEXT: lwa r3, 4(r3) ; BE-NEXT: blr entry: @@ -226,16 +206,12 @@ ; LE-LABEL: ReadGlobalPtr: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, ptr@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel5: -; LE-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8) ; LE-NEXT: ld r3, 0(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalPtr: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, ptr@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel5: -; BE-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8) ; BE-NEXT: ld r3, 0(r3) ; BE-NEXT: blr entry: @@ -247,9 +223,7 @@ ; LE-LABEL: WriteGlobalPtr: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, ptr@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel6: ; LE-NEXT: li r4, 3 -; LE-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8) ; LE-NEXT: ld r3, 0(r3) ; LE-NEXT: stw r4, 0(r3) ; LE-NEXT: blr @@ -257,9 +231,7 @@ ; BE-LABEL: WriteGlobalPtr: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, ptr@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel6: ; BE-NEXT: li r4, 3 -; BE-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8) ; BE-NEXT: ld r3, 0(r3) ; BE-NEXT: stw r4, 0(r3) ; BE-NEXT: blr @@ -287,16 +259,12 @@ ; LE-LABEL: ReadGlobalArray: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, array@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel7: -; LE-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8) ; LE-NEXT: lwa r3, 12(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalArray: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, array@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel7: -; BE-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8) ; BE-NEXT: lwa r3, 12(r3) ; BE-NEXT: blr entry: @@ -327,16 +295,12 @@ ; LE-LABEL: ReadGlobalStruct: ; LE: # %bb.0: # %entry ; LE-NEXT: pld r3, structure@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel8: -; LE-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8) ; LE-NEXT: lwa r3, 4(r3) ; LE-NEXT: blr ; ; BE-LABEL: ReadGlobalStruct: ; BE: # %bb.0: # %entry ; BE-NEXT: pld r3, structure@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel8: -; BE-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8) ; BE-NEXT: lwa r3, 4(r3) ; BE-NEXT: blr entry: @@ -368,8 +332,6 @@ ; LE: .localentry ReadFuncPtr, 1 ; LE-NEXT: # %bb.0: # %entry ; LE-NEXT: pld r3, ptrfunc@got@pcrel(0), 1 -; LE-NEXT: .Lpcrel9: -; LE-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8) ; LE-NEXT: ld r12, 0(r3) ; LE-NEXT: mtctr r12 ; LE-NEXT: bctr @@ -379,8 +341,6 @@ ; BE: .localentry ReadFuncPtr, 1 ; BE-NEXT: # %bb.0: # %entry ; BE-NEXT: pld r3, ptrfunc@got@pcrel(0), 1 -; BE-NEXT: .Lpcrel9: -; BE-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8) ; BE-NEXT: ld r12, 0(r3) ; BE-NEXT: mtctr r12 ; BE-NEXT: bctr diff --git a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt-option.ll @@ -15,8 +15,6 @@ ; DEFAULT-LABEL: Read8: ; DEFAULT: # %bb.0: # %entry ; DEFAULT-NEXT: pld r3, input8@got@pcrel(0), 1 -; DEFAULT-NEXT: .Lpcrel0: -; DEFAULT-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; DEFAULT-NEXT: lbz r3, 0(r3) ; DEFAULT-NEXT: blr ; diff --git a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-linkeropt.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ ; RUN: -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ -; RUN: < %s | FileCheck %s +; RUN: -ppc-pcrel-linker-opt=true < %s | FileCheck %s ; On future CPU with PC Relative addressing enabled, it is possible for the ; linker to optimize GOT indirect accesses. In order for the linker to do this diff --git a/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll b/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-relocation-plus-offset.ll @@ -50,14 +50,11 @@ ; CHECK-S-LABEL: getElementExtern4: ; CHECK-S: # %bb.0: # %entry ; CHECK-S-NEXT: pld r3, array1@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel0: -; CHECK-S-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; CHECK-S-NEXT: lwa r3, 16(r3) ; CHECK-S-NEXT: blr ; CHECK-O-LABEL: : ; CHECK-O: pld 3, 0(0), 1 ; CHECK-O-NEXT: R_PPC64_GOT_PCREL34 array1 -; CHECK-O-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8 ; CHECK-O: lwa 3, 16(3) ; CHECK-O-NEXT: blr entry: @@ -69,14 +66,11 @@ ; CHECK-S-LABEL: getElementExternNegative: ; CHECK-S: # %bb.0: # %entry ; CHECK-S-NEXT: pld r3, array1@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel1: -; CHECK-S-NEXT: .reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8) ; CHECK-S-NEXT: lwa r3, -4(r3) ; CHECK-S-NEXT: blr ; CHECK-O-LABEL: : ; CHECK-O: pld 3, 0(0), 1 ; CHECK-O-NEXT: R_PPC64_GOT_PCREL34 array1 -; CHECK-O-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8 ; CHECK-O: lwa 3, -4(3) ; CHECK-O-NEXT: blr entry: diff --git a/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll b/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll --- a/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll @@ -51,8 +51,6 @@ ; CHECK: .localentry TailCallExtrnFuncPtr, 1 ; CHECK-NEXT: # %bb.0: # %entry ; CHECK-NEXT: pld r3, Func@got@pcrel(0), 1 -; CHECK-NEXT: .Lpcrel0: -; CHECK-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; CHECK-NEXT: ld r12, 0(r3) ; CHECK-NEXT: mtctr r12 ; CHECK-NEXT: bctr diff --git a/llvm/test/CodeGen/PowerPC/pcrel.ll b/llvm/test/CodeGen/PowerPC/pcrel.ll --- a/llvm/test/CodeGen/PowerPC/pcrel.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel.ll @@ -42,15 +42,12 @@ ; CHECK-S-LABEL: ReadGlobalVarInt ; CHECK-S: # %bb.0: # %entry ; CHECK-S-NEXT: pld r3, valIntGlob@got@pcrel(0), 1 -; CHECK-S-NEXT: .Lpcrel0: -; CHECK-S-NEXT: .reloc .Lpcrel0-8,R_PPC64_PCREL_OPT,.-(.Lpcrel0-8) ; CHECK-S-NEXT: lwa r3, 0(r3) ; CHECK-S-NEXT: blr ; CHECK-O-LABEL: ReadGlobalVarInt ; CHECK-O: pld 3, 0(0), 1 ; CHECK-O-NEXT: R_PPC64_GOT_PCREL34 valIntGlob -; CHECK-O-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8 ; CHECK-O-NEXT: lwa 3, 0(3) ; CHECK-O-NEXT: blr entry: