diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td --- a/llvm/lib/Target/Hexagon/HexagonPatterns.td +++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td @@ -293,6 +293,8 @@ class Not2 : PatFrag<(ops node:$A, node:$B), (P node:$A, (not node:$B))>; +class VNot2 + : PatFrag<(ops node:$A, node:$B), (P node:$A, (vnot node:$B))>; // If there is a constant operand that feeds the and/or instruction, // do not generate the compound instructions. @@ -564,25 +566,25 @@ def: Pat<(pnot V8I1:$Ps), (C2_not V8I1:$Ps)>; def: Pat<(add I1:$Ps, -1), (C2_not I1:$Ps)>; -multiclass BoolOpR_RR_pat { +multiclass BoolOpR_RR_pat { def: OpR_RR_pat; - def: OpR_RR_pat; - def: OpR_RR_pat; - def: OpR_RR_pat; + def: OpR_RR_pat; + def: OpR_RR_pat; + def: OpR_RR_pat; } -multiclass BoolAccRRR_pat { - def: AccRRR_pat; - def: AccRRR_pat; - def: AccRRR_pat; - def: AccRRR_pat; +multiclass BoolAccRRR_pat { + def: AccRRR_pat; + def: AccRRR_pat; + def: AccRRR_pat; + def: AccRRR_pat; } defm: BoolOpR_RR_pat; defm: BoolOpR_RR_pat; defm: BoolOpR_RR_pat; -defm: BoolOpR_RR_pat>; -defm: BoolOpR_RR_pat>; +defm: BoolOpR_RR_pat, VNot2>; +defm: BoolOpR_RR_pat, VNot2>; // op(Ps, op(Pt, Pu)) defm: BoolAccRRR_pat>; @@ -591,10 +593,10 @@ defm: BoolAccRRR_pat>; // op(Ps, op(Pt, ~Pu)) -defm: BoolAccRRR_pat>>; -defm: BoolAccRRR_pat>>; -defm: BoolAccRRR_pat>>; -defm: BoolAccRRR_pat>>; +defm: BoolAccRRR_pat>, Su>>; +defm: BoolAccRRR_pat>, Su>>; +defm: BoolAccRRR_pat>, Su>>; +defm: BoolAccRRR_pat>, Su>>; // --(5) Compare --------------------------------------------------------- diff --git a/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td b/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td --- a/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td +++ b/llvm/lib/Target/Hexagon/HexagonPatternsHVX.td @@ -576,12 +576,12 @@ def: OpR_RR_pat; def: OpR_RR_pat; - def: OpR_RR_pat, VecQ8, HQ8>; - def: OpR_RR_pat, VecQ16, HQ16>; - def: OpR_RR_pat, VecQ32, HQ32>; - def: OpR_RR_pat, VecQ8, HQ8>; - def: OpR_RR_pat, VecQ16, HQ16>; - def: OpR_RR_pat, VecQ32, HQ32>; + def: OpR_RR_pat, VecQ8, HQ8>; + def: OpR_RR_pat, VecQ16, HQ16>; + def: OpR_RR_pat, VecQ32, HQ32>; + def: OpR_RR_pat, VecQ8, HQ8>; + def: OpR_RR_pat, VecQ16, HQ16>; + def: OpR_RR_pat, VecQ32, HQ32>; def: OpR_RR_pat; def: OpR_RR_pat;