Index: clang/lib/Headers/CMakeLists.txt =================================================================== --- clang/lib/Headers/CMakeLists.txt +++ clang/lib/Headers/CMakeLists.txt @@ -190,6 +190,17 @@ set(generated_files ${generated_files} PARENT_SCOPE) endfunction(clang_generate_header) +# Like clang_generate_header but does not add it to generated_files because +# we do not want to install it. +# FIXME: Factor this in a common function for both clang_generate_*header. +function(clang_generate_testing_header td_option td_file out_file) + clang_tablegen(${out_file} ${td_option} + -I ${CLANG_SOURCE_DIR}/include/clang/Basic/ + SOURCE ${CLANG_SOURCE_DIR}/include/clang/Basic/${td_file}) + + copy_header_to_output_dir(${CMAKE_CURRENT_BINARY_DIR} ${out_file}) + set(out_files ${out_files} PARENT_SCOPE) +endfunction(clang_generate_testing_header) # Copy header files from the source directory to the build directory foreach( f ${files} ${cuda_wrapper_files} ${ppc_wrapper_files} ${openmp_wrapper_files}) @@ -211,6 +222,9 @@ clang_generate_header(-gen-arm-cde-header arm_cde.td arm_cde.h) # Generate riscv_vector.h clang_generate_header(-gen-riscv-vector-header riscv_vector.td riscv_vector.h) +# Generate testing header riscv_vector_testing.h +clang_generate_testing_header(-gen-riscv-vector-testing-header riscv_vector.td + riscv_vector_testing.h) add_custom_target(clang-resource-headers ALL DEPENDS ${out_files}) set_target_properties(clang-resource-headers PROPERTIES Index: clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c =================================================================== --- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c +++ clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c @@ -8,7 +8,9 @@ // RUN: -Werror -Wall -o - %s -S >/dev/null 2>&1 | FileCheck --check-prefix=ASM --allow-empty %s // ASM-NOT: warning -#include +#define RVV_TEST_vadd +#define RVV_TEST_vadd_mask +#include // CHECK-RV32-LABEL: @test_vadd_vv_i8mf8( // CHECK-RV32-NEXT: entry: Index: clang/utils/TableGen/RISCVVEmitter.cpp =================================================================== --- clang/utils/TableGen/RISCVVEmitter.cpp +++ clang/utils/TableGen/RISCVVEmitter.cpp @@ -166,6 +166,7 @@ // C/C++ intrinsic operand order is different to builtin operand order. Record // the mapping of InputTypes index. SmallVector CTypeOrder; + bool TestingHeader = false; uint8_t RISCVExtensions = 0; public: @@ -174,7 +175,8 @@ bool HasMaskedOffOperand, bool HasVL, bool HasNoMaskedOverloaded, bool HasAutoDef, StringRef ManualCodegen, const RVVTypes &Types, const std::vector &IntrinsicTypes, - const std::vector &PermuteOperands); + const std::vector &PermuteOperands, + bool TestingHeader); ~RVVIntrinsic() = default; StringRef getName() const { return Name; } @@ -201,19 +203,25 @@ void emitIntrinsicMacro(raw_ostream &o) const; // Emit the mangled function definition. - void emitMangledFuncDef(raw_ostream &o) const; + void emitMangledFuncDef(raw_ostream &o, bool Overloaded) const; + + // Emit marks used to limit the size of the header at testing time. + void emitTestingMarkStart(raw_ostream &o) const; + void emitTestingMarkEnd(raw_ostream &o) const; }; class RVVEmitter { private: RecordKeeper &Records; + bool TestingHeader; std::string HeaderCode; // Concat BasicType, LMUL and Proto as key StringMap LegalTypes; StringSet<> IllegalTypes; public: - RVVEmitter(RecordKeeper &R) : Records(R) {} + RVVEmitter(RecordKeeper &R, bool TestingHeader = false) + : Records(R), TestingHeader(TestingHeader) {} /// Emit riscv_vector.h void createHeader(raw_ostream &o); @@ -716,11 +724,12 @@ bool HasNoMaskedOverloaded, bool HasAutoDef, StringRef ManualCodegen, const RVVTypes &OutInTypes, const std::vector &NewIntrinsicTypes, - const std::vector &PermuteOperands) + const std::vector &PermuteOperands, + bool TestingHeader) : IRName(IRName), HasSideEffects(HasSideEffects), IsMask(IsMask), HasMaskedOffOperand(HasMaskedOffOperand), HasVL(HasVL), HasNoMaskedOverloaded(HasNoMaskedOverloaded), HasAutoDef(HasAutoDef), - ManualCodegen(ManualCodegen.str()) { + ManualCodegen(ManualCodegen.str()), TestingHeader(TestingHeader) { // Init Name and MangledName Name = NewName.str(); @@ -828,7 +837,20 @@ OS << " break;\n"; } +void RVVIntrinsic::emitTestingMarkStart(raw_ostream &OS) const { + if (TestingHeader) { + OS << "#if defined(RVV_TEST_" << IRName << ")\n"; + } +} + +void RVVIntrinsic::emitTestingMarkEnd(raw_ostream &OS) const { + if (TestingHeader) { + OS << "#endif // RVV_TEST_" << IRName << "\n"; + } +} + void RVVIntrinsic::emitIntrinsicMacro(raw_ostream &OS) const { + emitTestingMarkStart(OS); OS << "#define " << getName() << "("; if (getNumOperand() > 0) { ListSeparator LS; @@ -843,9 +865,14 @@ OS << LS << "(" << InputTypes[i]->getTypeStr() << ")(op" << i << ")"; } OS << ")\n"; + emitTestingMarkEnd(OS); + } -void RVVIntrinsic::emitMangledFuncDef(raw_ostream &OS) const { +void RVVIntrinsic::emitMangledFuncDef(raw_ostream &OS, bool Overloaded) const { + emitTestingMarkStart(OS); + if (Overloaded) + OS << "__rvv_overloaded "; OS << OutputType->getTypeStr() << " " << getMangledName() << "("; // Emit function arguments if (getNumOperand() > 0) { @@ -862,7 +889,9 @@ OS << LS << "op" << i; } OS << ");\n"; - OS << "}\n\n"; + OS << "}\n"; + emitTestingMarkEnd(OS); + OS << "\n"; } //===----------------------------------------------------------------------===// @@ -973,8 +1002,7 @@ emitArchMacroAndBody(Defs, OS, [](raw_ostream &OS, const RVVIntrinsic &Inst) { if (!Inst.isMask() && !Inst.hasNoMaskedOverloaded()) return; - OS << "__rvv_overloaded "; - Inst.emitMangledFuncDef(OS); + Inst.emitMangledFuncDef(OS, /* Overloaded = */ true); }); OS << "\n#ifdef __cplusplus\n"; @@ -1117,7 +1145,7 @@ Name, SuffixStr, MangledName, IRName, HasSideEffects, /*IsMask=*/false, /*HasMaskedOffOperand=*/false, HasVL, HasNoMaskedOverloaded, HasAutoDef, ManualCodegen, Types.getValue(), - IntrinsicTypes, PermuteOperands)); + IntrinsicTypes, PermuteOperands, TestingHeader)); if (HasMask) { // Create a mask intrinsic Optional MaskTypes = @@ -1126,7 +1154,8 @@ Name, SuffixStr, MangledName, IRNameMask, HasSideEffects, /*IsMask=*/true, HasMaskedOffOperand, HasVL, HasNoMaskedOverloaded, HasAutoDef, ManualCodegenMask, - MaskTypes.getValue(), IntrinsicTypes, PermuteOperands)); + MaskTypes.getValue(), IntrinsicTypes, PermuteOperands, + TestingHeader)); } } // end for Log2LMULList } // end for TypeRange @@ -1208,6 +1237,10 @@ RVVEmitter(Records).createHeader(OS); } +void EmitRVVTestingHeader(RecordKeeper &Records, raw_ostream &OS) { + RVVEmitter(Records, /*TestingHeader=*/ true).createHeader(OS); +} + void EmitRVVBuiltins(RecordKeeper &Records, raw_ostream &OS) { RVVEmitter(Records).createBuiltins(OS); } Index: clang/utils/TableGen/TableGen.cpp =================================================================== --- clang/utils/TableGen/TableGen.cpp +++ clang/utils/TableGen/TableGen.cpp @@ -84,6 +84,7 @@ GenArmCdeBuiltinCG, GenArmCdeBuiltinAliases, GenRISCVVectorHeader, + GenRISCVVectorTestingHeader, GenRISCVVectorBuiltins, GenRISCVVectorBuiltinCG, GenAttrDocs, @@ -233,6 +234,9 @@ "Generate list of valid ARM CDE builtin aliases for clang"), clEnumValN(GenRISCVVectorHeader, "gen-riscv-vector-header", "Generate riscv_vector.h for clang"), + clEnumValN(GenRISCVVectorTestingHeader, + "gen-riscv-vector-testing-header", + "Generate riscv_vector_testing.h for testing clang"), clEnumValN(GenRISCVVectorBuiltins, "gen-riscv-vector-builtins", "Generate riscv_vector_builtins.inc for clang"), clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen", @@ -440,6 +444,9 @@ case GenRISCVVectorHeader: EmitRVVHeader(Records, OS); break; + case GenRISCVVectorTestingHeader: + EmitRVVTestingHeader(Records, OS); + break; case GenRISCVVectorBuiltins: EmitRVVBuiltins(Records, OS); break; Index: clang/utils/TableGen/TableGenBackends.h =================================================================== --- clang/utils/TableGen/TableGenBackends.h +++ clang/utils/TableGen/TableGenBackends.h @@ -107,6 +107,7 @@ void EmitMveBuiltinAliases(llvm::RecordKeeper &Records, llvm::raw_ostream &OS); void EmitRVVHeader(llvm::RecordKeeper &Records, llvm::raw_ostream &OS); +void EmitRVVTestingHeader(llvm::RecordKeeper &Records, llvm::raw_ostream &OS); void EmitRVVBuiltins(llvm::RecordKeeper &Records, llvm::raw_ostream &OS); void EmitRVVBuiltinCG(llvm::RecordKeeper &Records, llvm::raw_ostream &OS);