diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -1127,7 +1127,8 @@ /// \return The expected cost of vector Insert and Extract. /// Use -1 to indicate that there is no information on the index value. - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index = -1) const; + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index = -1) const; /// \return The cost of Load and Store instructions. InstructionCost @@ -1592,8 +1593,8 @@ CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I) = 0; - virtual int getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) = 0; + virtual InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) = 0; virtual InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, @@ -2073,7 +2074,8 @@ const Instruction *I) override { return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); } - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) override { + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) override { return Impl.getVectorInstrCost(Opcode, Val, Index); } InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -532,8 +532,8 @@ return 1; } - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) const { + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) const { return 1; } diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h --- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h +++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h @@ -83,8 +83,8 @@ /// Estimate a cost of Broadcast as an extract and sequence of insert /// operations. - unsigned getBroadcastShuffleOverhead(FixedVectorType *VTy) { - unsigned Cost = 0; + InstructionCost getBroadcastShuffleOverhead(FixedVectorType *VTy) { + InstructionCost Cost = 0; // Broadcast cost is equal to the cost of extracting the zero'th element // plus the cost of inserting it into every element of the result vector. Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy, 0); @@ -97,8 +97,8 @@ /// Estimate a cost of shuffle as a sequence of extract and insert /// operations. - unsigned getPermuteShuffleOverhead(FixedVectorType *VTy) { - unsigned Cost = 0; + InstructionCost getPermuteShuffleOverhead(FixedVectorType *VTy) { + InstructionCost Cost = 0; // Shuffle cost is equal to the cost of extracting element from its argument // plus the cost of inserting them onto the result vector. @@ -115,7 +115,7 @@ /// Estimate a cost of subvector extraction as a sequence of extract and /// insert operations. - unsigned getExtractSubvectorOverhead(VectorType *VTy, int Index, + InstructionCost getExtractSubvectorOverhead(VectorType *VTy, int Index, FixedVectorType *SubVTy) { assert(VTy && SubVTy && "Can only extract subvectors from vectors"); @@ -125,7 +125,7 @@ (int)cast(VTy)->getNumElements()) && "SK_ExtractSubvector index out of range"); - unsigned Cost = 0; + InstructionCost Cost = 0; // Subvector extraction cost is equal to the cost of extracting element from // the source type plus the cost of inserting them into the result vector // type. @@ -140,7 +140,7 @@ /// Estimate a cost of subvector insertion as a sequence of extract and /// insert operations. - unsigned getInsertSubvectorOverhead(VectorType *VTy, int Index, + InstructionCost getInsertSubvectorOverhead(VectorType *VTy, int Index, FixedVectorType *SubVTy) { assert(VTy && SubVTy && "Can only insert subvectors into vectors"); @@ -150,7 +150,7 @@ (int)cast(VTy)->getNumElements()) && "SK_InsertSubvector index out of range"); - unsigned Cost = 0; + InstructionCost Cost = 0; // Subvector insertion cost is equal to the cost of extracting element from // the source type plus the cost of inserting them into the result vector // type. @@ -609,7 +609,7 @@ assert(DemandedElts.getBitWidth() == Ty->getNumElements() && "Vector size mismatch"); - unsigned Cost = 0; + InstructionCost Cost = 0; for (int i = 0, e = Ty->getNumElements(); i < e; ++i) { if (!DemandedElts[i]) @@ -620,7 +620,7 @@ Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty, i); } - return Cost; + return *Cost.getValue(); } /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead. @@ -916,7 +916,8 @@ return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy, Index) + thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(), - TTI::CastContextHint::None, TTI::TCK_RecipThroughput); + TTI::CastContextHint::None, + TTI::TCK_RecipThroughput); } InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, @@ -971,7 +972,8 @@ return 1; } - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { std::pair LT = getTLI()->getTypeLegalizationCost(DL, Val->getScalarType()); @@ -1154,7 +1156,7 @@ Index + i * Factor); } - unsigned InsSubCost = 0; + InstructionCost InsSubCost = 0; for (unsigned i = 0; i < NumSubElts; i++) InsSubCost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVT, i); @@ -1170,7 +1172,7 @@ // The cost is estimated as extract all elements from both <4 x i32> // vectors and insert into the <8 x i32> vector. - unsigned ExtSubCost = 0; + InstructionCost ExtSubCost = 0; for (unsigned i = 0; i < NumSubElts; i++) ExtSubCost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVT, i); diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -809,9 +809,10 @@ return Cost; } -int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) const { - int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); +InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, + Type *Val, + unsigned Index) const { + InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); assert(Cost >= 0 && "TTI should not produce negative costs!"); return Cost; } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -144,7 +144,8 @@ InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getMinMaxReductionCost(VectorType *Ty, VectorType *CondTy, bool IsPairwise, bool IsUnsigned, diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -665,8 +665,8 @@ return 0; } -int AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { +InstructionCost AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { assert(Val->isVectorTy() && "This must be a vector type"); if (Index != -1U) { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -169,7 +169,8 @@ bool isInlineAsmSourceOfDivergence(const CallInst *CI, ArrayRef Indices = {}) const; - int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index); bool isSourceOfDivergence(const Value *V) const; bool isAlwaysUniform(const Value *V) const; @@ -255,7 +256,8 @@ unsigned getMaxInterleaveFactor(unsigned VF); InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *ValTy, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index); }; } // end namespace llvm diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -881,8 +881,8 @@ return LT.first * getHalfRateInstrCost(CostKind); } -int GCNTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost GCNTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { switch (Opcode) { case Instruction::ExtractElement: case Instruction::InsertElement: { @@ -1332,8 +1332,8 @@ } } -int R600TTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost R600TTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { switch (Opcode) { case Instruction::ExtractElement: case Instruction::InsertElement: { diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h @@ -212,7 +212,8 @@ TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); int getAddressComputationCost(Type *Val, ScalarEvolution *SE, const SCEV *Ptr); diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -797,8 +797,8 @@ BaseCost * BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I)); } -int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, - unsigned Index) { +InstructionCost ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, + unsigned Index) { // Penalize inserting into an D-subregister. We end up with a three times // lower estimated throughput on swift. if (ST->hasSlowLoadDSubregister() && Opcode == Instruction::InsertElement && @@ -816,7 +816,8 @@ // of NEON and VFP code and should be therefore penalized. if (ValTy->isVectorTy() && ValTy->getScalarSizeInBits() <= 32) - return std::max(BaseT::getVectorInstrCost(Opcode, ValTy, Index), 2U); + return std::max( + BaseT::getVectorInstrCost(Opcode, ValTy, Index), 2U); } if (ST->hasMVEIntegerOps() && (Opcode == Instruction::InsertElement || diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -152,7 +152,8 @@ TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I = nullptr) { diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp @@ -299,8 +299,8 @@ return 1; } -unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { +InstructionCost HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { Type *ElemTy = Val->isVectorTy() ? cast(Val)->getElementType() : Val; if (Opcode == Instruction::InsertElement) { diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -120,7 +120,8 @@ CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -1040,14 +1040,15 @@ return vectorCostAdjustment(Cost, Opcode, ValTy, nullptr); } -int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { assert(Val->isVectorTy() && "This must be a vector type"); int ISD = TLI->InstructionOpcodeToISD(Opcode); assert(ISD && "Invalid opcode"); - int Cost = BaseT::getVectorInstrCost(Opcode, Val, Index); - Cost = *vectorCostAdjustment(Cost, Opcode, Val, nullptr).getValue(); + InstructionCost Cost = BaseT::getVectorInstrCost(Opcode, Val, Index); + Cost = vectorCostAdjustment(Cost, Opcode, Val, nullptr); if (ST->hasVSX() && Val->getScalarType()->isDoubleTy()) { // Double-precision scalars are already located in index #0 (or #1 if LE). @@ -1062,7 +1063,7 @@ if (ISD == ISD::INSERT_VECTOR_ELT) // A move-to VSR and a permute/insert. Assume vector operation cost // for both (cost will be 2x on P9). - return *vectorCostAdjustment(2, Opcode, Val, nullptr).getValue(); + return vectorCostAdjustment(2, Opcode, Val, nullptr); // It's an extract. Maybe we can do a cheap move-from VSR. unsigned EltSize = Val->getScalarSizeInBits(); @@ -1079,7 +1080,7 @@ // We need a vector extract (or mfvsrld). Assume vector operation cost. // The cost of the load constant for a vector extract is disregarded // (invariant, easily schedulable). - return *vectorCostAdjustment(1, Opcode, Val, nullptr).getValue(); + return vectorCostAdjustment(1, Opcode, Val, nullptr); } else if (ST->hasDirectMove()) // Assume permute has standard cost. @@ -1125,7 +1126,7 @@ if (CostKind != TTI::TCK_RecipThroughput) return Cost; - Cost = *vectorCostAdjustment(Cost, Opcode, Src, nullptr).getValue(); + Cost = vectorCostAdjustment(Cost, Opcode, Src, nullptr); bool IsAltivecType = ST->hasAltivec() && (LT.second == MVT::v16i8 || LT.second == MVT::v8i16 || diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h @@ -102,7 +102,8 @@ CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp @@ -952,8 +952,8 @@ return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind); } -int SystemZTTIImpl:: -getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost SystemZTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { // vlvgp will insert two grs into a vector register, so only count half the // number of instructions. if (Opcode == Instruction::InsertElement && Val->isIntOrIntVectorTy(64)) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h @@ -67,7 +67,8 @@ TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, ArrayRef Args = ArrayRef(), const Instruction *CxtI = nullptr); - unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); /// @} diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp @@ -81,9 +81,11 @@ return Cost; } -unsigned WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { - unsigned Cost = BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index); +InstructionCost WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, + Type *Val, + unsigned Index) { + InstructionCost Cost = + BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index); // SIMD128's insert/extract currently only take constant indices. if (Index == -1u) diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -138,7 +138,8 @@ CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I = nullptr); - int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); + InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index); unsigned getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract); InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -3016,7 +3016,8 @@ return BaseT::getIntrinsicInstrCost(ICA, CostKind); } -int X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { +InstructionCost X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, + unsigned Index) { static const CostTblEntry SLMCostTbl[] = { { ISD::EXTRACT_VECTOR_ELT, MVT::i8, 4 }, { ISD::EXTRACT_VECTOR_ELT, MVT::i16, 4 }, @@ -3099,7 +3100,7 @@ getShuffleCost(TTI::SK_PermuteTwoSrc, SubTy, None, 0, SubTy); } int IntOrFpCost = ScalarType->isFloatingPointTy() ? 0 : 1; - return *ShuffleCost.getValue() + IntOrFpCost + RegisterFileMoveCost; + return ShuffleCost + IntOrFpCost + RegisterFileMoveCost; } // Add to the base cost if we know that the extracted element of a vector is @@ -4217,7 +4218,7 @@ VF * getMemoryOpCost(Opcode, SrcVTy->getScalarType(), MaybeAlign(Alignment), AddressSpace, CostKind); - int InsertExtractCost = 0; + InstructionCost InsertExtractCost = 0; if (Opcode == Instruction::Load) for (unsigned i = 0; i < VF; ++i) // Add the cost of inserting each scalar load into the vector