diff --git a/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h b/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
--- a/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
+++ b/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
@@ -138,9 +138,7 @@
 
 private:
   LocOpVector LocationOps;
-  // SDNode dependencies will be calculated as SDNodes that appear in
-  // LocationOps plus these AdditionalDependencies.
-  SDNodeVector AdditionalDependencies;
+  SDNodeVector SDNodes;
   DIVariable *Var;
   DIExpression *Expr;
   DebugLoc DL;
@@ -155,9 +153,8 @@
              ArrayRef<SDNode *> Dependencies, bool IsIndirect, DebugLoc DL,
              unsigned O, bool IsVariadic)
       : LocationOps(L.begin(), L.end()),
-        AdditionalDependencies(Dependencies.begin(), Dependencies.end()),
-        Var(Var), Expr(Expr), DL(DL), Order(O), IsIndirect(IsIndirect),
-        IsVariadic(IsVariadic) {
+        SDNodes(Dependencies.begin(), Dependencies.end()), Var(Var), Expr(Expr),
+        DL(DL), Order(O), IsIndirect(IsIndirect), IsVariadic(IsVariadic) {
     assert(IsVariadic || L.size() == 1);
     assert(!(IsVariadic && IsIndirect));
   }
@@ -173,18 +170,9 @@
   LocOpVector copyLocationOps() const { return LocationOps; }
 
   // Returns the SDNodes which this SDDbgValue depends on.
-  SDNodeVector getSDNodes() const {
-    SDNodeVector Dependencies;
-    for (SDDbgOperand DbgOp : LocationOps)
-      if (DbgOp.getKind() == SDDbgOperand::SDNODE)
-        Dependencies.push_back(DbgOp.getSDNode());
-    Dependencies.append(AdditionalDependencies);
-    return Dependencies;
-  }
+  ArrayRef<SDNode *> getSDNodes() const { return SDNodes; }
 
-  ArrayRef<SDNode *> getAdditionalDependencies() const {
-    return AdditionalDependencies;
-  }
+  SDNodeVector copySDNodes() const { return SDNodes; }
 
   /// Returns whether this is an indirect value.
   bool isIndirect() const { return IsIndirect; }
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -8583,7 +8583,7 @@
   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
          "Expected inlined-at fields to agree");
   return new (DbgInfo->getAlloc())
-      SDDbgValue(Var, Expr, SDDbgOperand::fromNode(N, R), {}, IsIndirect, DL, O,
+      SDDbgValue(Var, Expr, SDDbgOperand::fromNode(N, R), N, IsIndirect, DL, O,
                  /*IsVariadic=*/false);
 }
 
@@ -8707,10 +8707,12 @@
       Expr = *Fragment;
     }
 
-    auto AdditionalDependencies = Dbg->getAdditionalDependencies();
+    auto NewDependencies = Dbg->copySDNodes();
+    std::replace(NewDependencies.begin(), NewDependencies.end(), FromNode,
+                 ToNode);
     // Clone the SDDbgValue and move it to To.
     SDDbgValue *Clone = getDbgValueList(
-        Var, Expr, NewLocOps, AdditionalDependencies, Dbg->isIndirect(),
+        Var, Expr, NewLocOps, NewDependencies, Dbg->isIndirect(),
         Dbg->getDebugLoc(), std::max(ToNode->getIROrder(), Dbg->getOrder()),
         Dbg->isVariadic());
     ClonedDVs.push_back(Clone);
@@ -8770,9 +8772,11 @@
         (void)Changed;
         assert(Changed && "Salvage target doesn't use N");
 
-        auto AdditionalDependencies = DV->getAdditionalDependencies();
+        auto NewDependencies = DV->copySDNodes();
+        std::replace(NewDependencies.begin(), NewDependencies.end(), &N,
+                     N0.getNode());
         SDDbgValue *Clone = getDbgValueList(DV->getVariable(), DIExpr,
-                                            NewLocOps, AdditionalDependencies,
+                                            NewLocOps, NewDependencies,
                                             DV->isIndirect(), DV->getDebugLoc(),
                                             DV->getOrder(), DV->isVariadic());
         ClonedDVs.push_back(Clone);
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1331,6 +1331,7 @@
       // Only emit func arg dbg value for non-variadic dbg.values for now.
       if (!IsVariadic && EmitFuncArgumentDbgValue(V, Var, Expr, dl, false, N))
         return true;
+      Dependencies.push_back(N.getNode());
       if (auto *FISDN = dyn_cast<FrameIndexSDNode>(N.getNode())) {
         // Construct a FrameIndexDbgValue for FrameIndexSDNodes so we can
         // describe stack slot locations.
@@ -1342,7 +1343,6 @@
         //   dbg.value(i32* %px, !"int x", !DIExpression(DW_OP_deref))
         //
         // Both describe the direct values of their associated variables.
-        Dependencies.push_back(N.getNode());
         LocationOps.emplace_back(SDDbgOperand::fromFrameIdx(FISDN->getIndex()));
         continue;
       }
diff --git a/llvm/test/CodeGen/X86/dbg-list-dependencies.ll b/llvm/test/CodeGen/X86/dbg-list-dependencies.ll
deleted file mode 100644
--- a/llvm/test/CodeGen/X86/dbg-list-dependencies.ll
+++ /dev/null
@@ -1,187 +0,0 @@
-; RUN: llc --stop-after=finalize-isel < %s
-
-; Tests that files with multiple SDNode dependencies are correctly handled by
-; SelectionDAG; dependencies that are incorrectly updated for an SDDbgValue
-; throughout SelectionDAG will result in errors.
-
-target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
-%class.anon = type { i8 }
-%class.D = type { %class.f }
-%class.f = type { i32, i32 }
-%class.l = type { i8*, i64 }
-%class.d = type { i8 }
-
-@q = internal global %class.anon zeroinitializer, align 1, !dbg !0
-
-define void @_Z1rv() local_unnamed_addr !dbg !30 {
-entry:
-  %t = alloca %class.D, align 4
-  %call = tail call { i8*, i64 } @"_ZN3$_05m_fn3Ev"(%class.anon* nonnull dereferenceable(1) @q), !dbg !60
-  %0 = extractvalue { i8*, i64 } %call, 0, !dbg !60
-  call void @llvm.dbg.value(metadata i8* %0, metadata !34, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64)), !dbg !61
-  %1 = extractvalue { i8*, i64 } %call, 1, !dbg !60
-  call void @llvm.dbg.value(metadata i64 %1, metadata !34, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !61
-  %2 = bitcast %class.D* %t to i8*, !dbg !62
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %2) #4, !dbg !62
-  call void @llvm.dbg.declare(metadata %class.D* %t, metadata !35, metadata !DIExpression()), !dbg !63
-  call void @llvm.dbg.value(metadata i8* %0, metadata !64, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64)), !dbg !69
-  call void @llvm.dbg.value(metadata i64 %1, metadata !64, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg !69
-  call void @llvm.dbg.value(metadata %class.D* %t, metadata !67, metadata !DIExpression()), !dbg !69
-  call void @llvm.dbg.value(metadata %class.l* undef, metadata !71, metadata !DIExpression()), !dbg !75
-  call void @llvm.dbg.value(metadata %class.D* %t, metadata !77, metadata !DIExpression()), !dbg !91
-  call void @llvm.dbg.value(metadata i8* %0, metadata !86, metadata !DIExpression()), !dbg !91
-  call void @llvm.dbg.value(metadata !DIArgList(i8* %0, i64 %1), metadata !87, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 1, DW_OP_mul, DW_OP_plus, DW_OP_stack_value)), !dbg !91
-  %3 = bitcast %class.D* %t to %class.d*, !dbg !93
-  call void @_ZN1dC2EPvl(%class.d* nonnull dereferenceable(1) %3, i8* nonnull %2, i64 8), !dbg !94
-  call void @llvm.dbg.value(metadata !DIArgList(i8* %0, i8* %0, i64 %1), metadata !88, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 2, DW_OP_constu, 1, DW_OP_mul, DW_OP_plus, DW_OP_LLVM_arg, 1, DW_OP_minus, DW_OP_stack_value)), !dbg !95
-  %tobool.not.i.i = icmp eq i64 %1, 0, !dbg !96
-  br i1 %tobool.not.i.i, label %_ZN1DILi8EEC2E1l.exit, label %if.then.i.i, !dbg !98
-
-if.then.i.i:                                      ; preds = %entry
-  %add.ptr.i.i = getelementptr inbounds i8, i8* %0, i64 %1, !dbg !99
-  call void @llvm.dbg.value(metadata i8* %add.ptr.i.i, metadata !87, metadata !DIExpression()), !dbg !91
-  call void @llvm.dbg.value(metadata !DIArgList(i8* %add.ptr.i.i, i8* %0), metadata !88, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_minus, DW_OP_stack_value)), !dbg !95
-  call void @llvm.dbg.value(metadata %class.D* %t, metadata !77, metadata !DIExpression()), !dbg !91
-  %k.i.i = getelementptr inbounds %class.D, %class.D* %t, i64 0, i32 0, i32 1, !dbg !100
-  %4 = load i32, i32* %k.i.i, align 4, !dbg !100, !tbaa !101
-  call void @_Z1cIPKciEvT_S2_T0_(i8* %0, i8* nonnull %add.ptr.i.i, i32 %4), !dbg !106
-  br label %_ZN1DILi8EEC2E1l.exit, !dbg !106
-
-_ZN1DILi8EEC2E1l.exit:                            ; preds = %entry, %if.then.i.i
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %2) #4, !dbg !107
-  ret void, !dbg !107
-}
-
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-
-declare void @llvm.dbg.declare(metadata, metadata, metadata)
-
-declare { i8*, i64 } @"_ZN3$_05m_fn3Ev"(%class.anon* nonnull dereferenceable(1)) local_unnamed_addr
-
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
-
-declare void @_ZN1dC2EPvl(%class.d* nonnull dereferenceable(1), i8*, i64) unnamed_addr
-
-declare !dbg !108 void @_Z1cIPKciEvT_S2_T0_(i8*, i8*, i32) local_unnamed_addr
-
-declare void @llvm.dbg.value(metadata, metadata, metadata)
-
-!llvm.dbg.cu = !{!2}
-!llvm.module.flags = !{!26, !27, !28}
-!llvm.ident = !{!29}
-
-!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
-!1 = distinct !DIGlobalVariable(name: "q", scope: !2, file: !3, line: 32, type: !6, isLocal: true, isDefinition: true)
-!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !3, producer: "clang version 13.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, globals: !5, splitDebugInlining: false, nameTableKind: None)
-!3 = !DIFile(filename: "dbg-list-dependencies.cpp", directory: "/")
-!4 = !{}
-!5 = !{!0}
-!6 = distinct !DICompositeType(tag: DW_TAG_class_type, file: !3, line: 29, size: 8, flags: DIFlagTypePassByValue, elements: !7)
-!7 = !{!8}
-!8 = !DISubprogram(name: "m_fn3", linkageName: "_ZN3$_05m_fn3Ev", scope: !6, file: !3, line: 31, type: !9, scopeLine: 31, flags: DIFlagPublic | DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagOptimized)
-!9 = !DISubroutineType(types: !10)
-!10 = !{!11, !25}
-!11 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "l", file: !3, line: 17, size: 128, flags: DIFlagTypePassByValue, elements: !12, identifier: "_ZTS1l")
-!12 = !{!13, !16, !18, !24}
-!13 = !DIDerivedType(tag: DW_TAG_member, name: "m", scope: !11, file: !3, line: 18, baseType: !14, size: 64)
-!14 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !15, size: 64)
-!15 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
-!16 = !DIDerivedType(tag: DW_TAG_member, name: "n", scope: !11, file: !3, line: 19, baseType: !17, size: 64, offset: 64)
-!17 = !DIBasicType(name: "long int", size: 64, encoding: DW_ATE_signed)
-!18 = !DISubprogram(name: "p", linkageName: "_ZN1l1pEv", scope: !11, file: !3, line: 22, type: !19, scopeLine: 22, flags: DIFlagPublic | DIFlagPrototyped, spFlags: DISPFlagOptimized)
-!19 = !DISubroutineType(types: !20)
-!20 = !{!21, !23}
-!21 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !22, size: 64)
-!22 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !15)
-!23 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
-!24 = !DISubprogram(name: "m_fn2", linkageName: "_ZN1l5m_fn2Ev", scope: !11, file: !3, line: 23, type: !19, scopeLine: 23, flags: DIFlagPublic | DIFlagPrototyped, spFlags: DISPFlagOptimized)
-!25 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !6, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
-!26 = !{i32 7, !"Dwarf Version", i32 4}
-!27 = !{i32 2, !"Debug Info Version", i32 3}
-!28 = !{i32 1, !"wchar_size", i32 4}
-!29 = !{!"clang version 13.0.0"}
-!30 = distinct !DISubprogram(name: "r", linkageName: "_Z1rv", scope: !3, file: !3, line: 33, type: !31, scopeLine: 33, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, retainedNodes: !33)
-!31 = !DISubroutineType(types: !32)
-!32 = !{null}
-!33 = !{!34, !35}
-!34 = !DILocalVariable(name: "s", scope: !30, file: !3, line: 34, type: !11)
-!35 = !DILocalVariable(name: "t", scope: !30, file: !3, line: 35, type: !36)
-!36 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "D<8>", file: !3, line: 25, size: 64, flags: DIFlagTypePassByValue | DIFlagNonTrivial, elements: !37, templateParams: !58, identifier: "_ZTS1DILi8EE")
-!37 = !{!38, !54}
-!38 = !DIDerivedType(tag: DW_TAG_inheritance, scope: !36, baseType: !39, extraData: i32 0)
-!39 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "f<8>", file: !3, line: 6, size: 64, flags: DIFlagTypePassByValue | DIFlagNonTrivial, elements: !40, templateParams: !52, identifier: "_ZTS1fILi8EE")
-!40 = !{!41, !49, !51}
-!41 = !DIDerivedType(tag: DW_TAG_inheritance, scope: !39, baseType: !42, extraData: i32 0)
-!42 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "d", file: !3, line: 2, size: 8, flags: DIFlagTypePassByValue | DIFlagNonTrivial, elements: !43, identifier: "_ZTS1d")
-!43 = !{!44}
-!44 = !DISubprogram(name: "d", scope: !42, file: !3, line: 4, type: !45, scopeLine: 4, flags: DIFlagProtected | DIFlagPrototyped, spFlags: DISPFlagOptimized)
-!45 = !DISubroutineType(types: !46)
-!46 = !{null, !47, !48, !17}
-!47 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !42, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
-!48 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 64)
-!49 = !DIDerivedType(tag: DW_TAG_member, name: "g", scope: !39, file: !3, line: 7, baseType: !50, size: 32)
-!50 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
-!51 = !DIDerivedType(tag: DW_TAG_member, name: "k", scope: !39, file: !3, line: 15, baseType: !50, size: 32, offset: 32, flags: DIFlagPublic)
-!52 = !{!53}
-!53 = !DITemplateValueParameter(name: "e", type: !50, value: i32 8)
-!54 = !DISubprogram(name: "D", scope: !36, file: !3, line: 27, type: !55, scopeLine: 27, flags: DIFlagPublic | DIFlagPrototyped, spFlags: DISPFlagOptimized)
-!55 = !DISubroutineType(types: !56)
-!56 = !{null, !57, !11}
-!57 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !36, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
-!58 = !{!59}
-!59 = !DITemplateValueParameter(name: "o", type: !50, value: i32 8)
-!60 = !DILocation(line: 34, column: 9, scope: !30)
-!61 = !DILocation(line: 0, scope: !30)
-!62 = !DILocation(line: 35, column: 3, scope: !30)
-!63 = !DILocation(line: 35, column: 8, scope: !30)
-!64 = !DILocalVariable(name: "h", arg: 2, scope: !65, file: !3, line: 27, type: !11)
-!65 = distinct !DISubprogram(name: "D", linkageName: "_ZN1DILi8EEC2E1l", scope: !36, file: !3, line: 27, type: !55, scopeLine: 27, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, declaration: !54, retainedNodes: !66)
-!66 = !{!67, !64}
-!67 = !DILocalVariable(name: "this", arg: 1, scope: !65, type: !68, flags: DIFlagArtificial | DIFlagObjectPointer)
-!68 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !36, size: 64)
-!69 = !DILocation(line: 0, scope: !65, inlinedAt: !70)
-!70 = distinct !DILocation(line: 35, column: 8, scope: !30)
-!71 = !DILocalVariable(name: "this", arg: 1, scope: !72, type: !74, flags: DIFlagArtificial | DIFlagObjectPointer)
-!72 = distinct !DISubprogram(name: "m_fn2", linkageName: "_ZN1l5m_fn2Ev", scope: !11, file: !3, line: 23, type: !19, scopeLine: 23, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, declaration: !24, retainedNodes: !73)
-!73 = !{!71}
-!74 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64)
-!75 = !DILocation(line: 0, scope: !72, inlinedAt: !76)
-!76 = distinct !DILocation(line: 27, column: 26, scope: !65, inlinedAt: !70)
-!77 = !DILocalVariable(name: "this", arg: 1, scope: !78, type: !90, flags: DIFlagArtificial | DIFlagObjectPointer)
-!78 = distinct !DISubprogram(name: "f<const char *>", linkageName: "_ZN1fILi8EEC2IPKcEET_S4_", scope: !39, file: !3, line: 10, type: !79, scopeLine: 10, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, templateParams: !83, declaration: !82, retainedNodes: !85)
-!79 = !DISubroutineType(types: !80)
-!80 = !{null, !81, !21, !21}
-!81 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !39, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
-!82 = !DISubprogram(name: "f<const char *>", scope: !39, file: !3, line: 10, type: !79, scopeLine: 10, flags: DIFlagPublic | DIFlagPrototyped, spFlags: DISPFlagOptimized, templateParams: !83)
-!83 = !{!84}
-!84 = !DITemplateTypeParameter(name: "a", type: !21)
-!85 = !{!77, !86, !87, !88}
-!86 = !DILocalVariable(name: "h", arg: 2, scope: !78, file: !3, line: 10, type: !21)
-!87 = !DILocalVariable(name: "i", arg: 3, scope: !78, file: !3, line: 10, type: !21)
-!88 = !DILocalVariable(name: "j", scope: !89, file: !3, line: 11, type: !17)
-!89 = distinct !DILexicalBlock(scope: !78, file: !3, line: 10, column: 48)
-!90 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !39, size: 64)
-!91 = !DILocation(line: 0, scope: !78, inlinedAt: !92)
-!92 = distinct !DILocation(line: 27, column: 12, scope: !65, inlinedAt: !70)
-!93 = !DILocation(line: 10, column: 48, scope: !78, inlinedAt: !92)
-!94 = !DILocation(line: 10, column: 39, scope: !78, inlinedAt: !92)
-!95 = !DILocation(line: 0, scope: !89, inlinedAt: !92)
-!96 = !DILocation(line: 12, column: 9, scope: !97, inlinedAt: !92)
-!97 = distinct !DILexicalBlock(scope: !89, file: !3, line: 12, column: 9)
-!98 = !DILocation(line: 12, column: 9, scope: !89, inlinedAt: !92)
-!99 = !DILocation(line: 23, column: 34, scope: !72, inlinedAt: !76)
-!100 = !DILocation(line: 13, column: 15, scope: !97, inlinedAt: !92)
-!101 = !{!102, !103, i64 4}
-!102 = !{!"_ZTS1fILi8EE", !103, i64 0, !103, i64 4}
-!103 = !{!"int", !104, i64 0}
-!104 = !{!"omnipotent char", !105, i64 0}
-!105 = !{!"Simple C++ TBAA"}
-!106 = !DILocation(line: 13, column: 7, scope: !97, inlinedAt: !92)
-!107 = !DILocation(line: 36, column: 1, scope: !30)
-!108 = !DISubprogram(name: "c<const char *, int>", linkageName: "_Z1cIPKciEvT_S2_T0_", scope: !3, file: !3, line: 1, type: !109, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, templateParams: !111, retainedNodes: !4)
-!109 = !DISubroutineType(types: !110)
-!110 = !{null, !21, !21, !50}
-!111 = !{!84, !112}
-!112 = !DITemplateTypeParameter(name: "b", type: !50)
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -509,7 +509,7 @@
     operations. The lowering pass provides several options to control
     the kinds of optimizations that are allowed. It also provides options
     that enable the use of one or more architectural-specific dialects
-    (AMX, AVX512, ArmNeon, ArmSVE, etc.) in combination with the
+    (AMX, X86Vector, ArmNeon, ArmSVE, etc.) in combination with the
     architectural-neutral vector dialect lowering.
 
   }];
@@ -528,10 +528,6 @@
            "bool", /*default=*/"false",
            "Enables the use of AMX dialect while lowering the vector "
 	   "dialect.">,
-    Option<"enableAVX512", "enable-avx512",
-           "bool", /*default=*/"false",
-           "Enables the use of AVX512 dialect while lowering the vector "
-	   "dialect.">,
     Option<"enableArmNeon", "enable-arm-neon",
            "bool", /*default=*/"false",
            "Enables the use of ArmNeon dialect while lowering the vector "
@@ -539,7 +535,11 @@
     Option<"enableArmSVE", "enable-arm-sve",
            "bool", /*default=*/"false",
            "Enables the use of ArmSVE dialect while lowering the vector "
-       "dialect.">
+       "dialect.">,
+    Option<"enableX86Vector", "enable-x86vector",
+           "bool", /*default=*/"false",
+           "Enables the use of X86Vector dialect while lowering the vector "
+	   "dialect.">
   ];
 }
 
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h b/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
@@ -24,7 +24,7 @@
   LowerVectorToLLVMOptions()
       : reassociateFPReductions(false), enableIndexOptimizations(true),
         enableArmNeon(false), enableArmSVE(false), enableAMX(false),
-        enableAVX512(false) {}
+        enableX86Vector(false) {}
 
   LowerVectorToLLVMOptions &setReassociateFPReductions(bool b) {
     reassociateFPReductions = b;
@@ -46,8 +46,8 @@
     enableAMX = b;
     return *this;
   }
-  LowerVectorToLLVMOptions &setEnableAVX512(bool b) {
-    enableAVX512 = b;
+  LowerVectorToLLVMOptions &setEnableX86Vector(bool b) {
+    enableX86Vector = b;
     return *this;
   }
 
@@ -56,7 +56,7 @@
   bool enableArmNeon;
   bool enableArmSVE;
   bool enableAMX;
-  bool enableAVX512;
+  bool enableX86Vector;
 };
 
 /// Collect a set of patterns to convert from Vector contractions to LLVM Matrix
diff --git a/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt b/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt
deleted file mode 100644
--- a/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-add_mlir_dialect(AVX512 avx512)
-add_mlir_doc(AVX512 -gen-dialect-doc AVX512 Dialects/)
-
-set(LLVM_TARGET_DEFINITIONS AVX512.td)
-mlir_tablegen(AVX512Conversions.inc -gen-llvmir-conversions)
-add_public_tablegen_target(MLIRAVX512ConversionsIncGen)
diff --git a/mlir/include/mlir/Dialect/AVX512/Transforms.h b/mlir/include/mlir/Dialect/AVX512/Transforms.h
deleted file mode 100644
--- a/mlir/include/mlir/Dialect/AVX512/Transforms.h
+++ /dev/null
@@ -1,30 +0,0 @@
-//===- Transforms.h - AVX512 Dialect Transformation Entrypoints -*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MLIR_DIALECT_AVX512_TRANSFORMS_H
-#define MLIR_DIALECT_AVX512_TRANSFORMS_H
-
-namespace mlir {
-
-class LLVMConversionTarget;
-class LLVMTypeConverter;
-class RewritePatternSet;
-using OwningRewritePatternList = RewritePatternSet;
-
-/// Collect a set of patterns to lower AVX512 ops to ops that map to LLVM
-/// intrinsics.
-void populateAVX512LegalizeForLLVMExportPatterns(LLVMTypeConverter &converter,
-                                                 RewritePatternSet &patterns);
-
-/// Configure the target to support lowering AVX512 ops to ops that map to LLVM
-/// intrinsics.
-void configureAVX512LegalizeForExportTarget(LLVMConversionTarget &target);
-
-} // namespace mlir
-
-#endif // MLIR_DIALECT_AVX512_TRANSFORMS_H
diff --git a/mlir/include/mlir/Dialect/CMakeLists.txt b/mlir/include/mlir/Dialect/CMakeLists.txt
--- a/mlir/include/mlir/Dialect/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/CMakeLists.txt
@@ -3,7 +3,6 @@
 add_subdirectory(ArmNeon)
 add_subdirectory(ArmSVE)
 add_subdirectory(AMX)
-add_subdirectory(AVX512)
 add_subdirectory(Complex)
 add_subdirectory(DLTI)
 add_subdirectory(GPU)
@@ -23,3 +22,4 @@
 add_subdirectory(Tensor)
 add_subdirectory(Tosa)
 add_subdirectory(Vector)
+add_subdirectory(X86Vector)
diff --git a/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt b/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
new file mode 100644
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
@@ -0,0 +1,6 @@
+add_mlir_dialect(X86Vector x86vector)
+add_mlir_doc(X86Vector -gen-dialect-doc X86Vector Dialects/)
+
+set(LLVM_TARGET_DEFINITIONS X86Vector.td)
+mlir_tablegen(X86VectorConversions.inc -gen-llvmir-conversions)
+add_public_tablegen_target(MLIRX86VectorConversionsIncGen)
diff --git a/mlir/include/mlir/Dialect/X86Vector/Transforms.h b/mlir/include/mlir/Dialect/X86Vector/Transforms.h
new file mode 100644
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86Vector/Transforms.h
@@ -0,0 +1,30 @@
+//=- Transforms.h - X86Vector Dialect Transformation Entrypoints -*- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
+#define MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
+
+namespace mlir {
+
+class LLVMConversionTarget;
+class LLVMTypeConverter;
+class RewritePatternSet;
+using OwningRewritePatternList = RewritePatternSet;
+
+/// Collect a set of patterns to lower X86Vector ops to ops that map to LLVM
+/// intrinsics.
+void populateX86VectorLegalizeForLLVMExportPatterns(
+    LLVMTypeConverter &converter, RewritePatternSet &patterns);
+
+/// Configure the target to support lowering X86Vector ops to ops that map to
+/// LLVM intrinsics.
+void configureX86VectorLegalizeForExportTarget(LLVMConversionTarget &target);
+
+} // namespace mlir
+
+#endif // MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
diff --git a/mlir/include/mlir/Dialect/AVX512/AVX512.td b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
rename from mlir/include/mlir/Dialect/AVX512/AVX512.td
rename to mlir/include/mlir/Dialect/X86Vector/X86Vector.td
--- a/mlir/include/mlir/Dialect/AVX512/AVX512.td
+++ b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
@@ -1,4 +1,4 @@
-//===-- AVX512Ops.td - AVX512 dialect operation definitions *- tablegen -*-===//
+//===-- X86VectorOps.td - X86Vector dialect operation definitions *- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,23 +6,23 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file defines the basic operations for the AVX512 dialect.
+// This file defines the basic operations for the X86Vector dialect.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef AVX512_OPS
-#define AVX512_OPS
+#ifndef X86VECTOR_OPS
+#define X86VECTOR_OPS
 
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 
 //===----------------------------------------------------------------------===//
-// AVX512 dialect definition
+// X86Vector dialect definition
 //===----------------------------------------------------------------------===//
 
-def AVX512_Dialect : Dialect {
-  let name = "avx512";
-  let cppNamespace = "::mlir::avx512";
+def X86Vector_Dialect : Dialect {
+  let name = "x86vector";
+  let cppNamespace = "::mlir::x86vector";
 }
 
 //===----------------------------------------------------------------------===//
@@ -30,10 +30,10 @@
 //===----------------------------------------------------------------------===//
 
 class AVX512_Op<string mnemonic, list<OpTrait> traits = []> :
-  Op<AVX512_Dialect, mnemonic, traits> {}
+  Op<X86Vector_Dialect, "avx512." # mnemonic, traits> {}
 
 class AVX512_IntrOp<string mnemonic, int numResults, list<OpTrait> traits = []> :
-  LLVM_IntrOpBase<AVX512_Dialect, "intr." # mnemonic,
+  LLVM_IntrOpBase<X86Vector_Dialect, "avx512.intr." # mnemonic,
                   "x86_avx512_" # !subst(".", "_", mnemonic),
                   [], [], traits, numResults>;
 
@@ -41,7 +41,7 @@
 // instructions in the future.
 class AVX512_IntrOverloadedOp<string mnemonic,
                               list<OpTrait> traits = []> :
-  LLVM_IntrOpBase<AVX512_Dialect, "intr." # mnemonic,
+  LLVM_IntrOpBase<X86Vector_Dialect, "avx512.intr." # mnemonic,
                   "x86_avx512_" # !subst(".", "_", mnemonic),
                   /*list<int> overloadedResults=*/[0],
                   /*list<int> overloadedOperands=*/[],
@@ -267,4 +267,4 @@
                    VectorOfLengthAndType<[8], [I64]>:$b);
 }
 
-#endif // AVX512_OPS
+#endif // X86VECTOR_OPS
diff --git a/mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h b/mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
rename from mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h
rename to mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
--- a/mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h
+++ b/mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
@@ -1,4 +1,4 @@
-//===- AVX512Dialect.h - MLIR Dialect for AVX512 ----------------*- C++ -*-===//
+//===- X86VectorDialect.h - MLIR Dialect for X86Vector ----------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,12 +6,12 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file declares the Target dialect for AVX512 in MLIR.
+// This file declares the Target dialect for X86Vector in MLIR.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef MLIR_DIALECT_AVX512_AVX512DIALECT_H_
-#define MLIR_DIALECT_AVX512_AVX512DIALECT_H_
+#ifndef MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
+#define MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
 
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Dialect.h"
@@ -19,9 +19,9 @@
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 
-#include "mlir/Dialect/AVX512/AVX512Dialect.h.inc"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h.inc"
 
 #define GET_OP_CLASSES
-#include "mlir/Dialect/AVX512/AVX512.h.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.h.inc"
 
-#endif // MLIR_DIALECT_AVX512_AVX512DIALECT_H_
+#endif // MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
diff --git a/mlir/include/mlir/InitAllDialects.h b/mlir/include/mlir/InitAllDialects.h
--- a/mlir/include/mlir/InitAllDialects.h
+++ b/mlir/include/mlir/InitAllDialects.h
@@ -15,7 +15,6 @@
 #define MLIR_INITALLDIALECTS_H_
 
 #include "mlir/Dialect/AMX/AMXDialect.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
 #include "mlir/Dialect/Affine/IR/AffineOps.h"
 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
@@ -43,6 +42,7 @@
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Dialect/Tosa/IR/TosaOps.h"
 #include "mlir/Dialect/Vector/VectorOps.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/IR/Dialect.h"
 
 namespace mlir {
@@ -55,7 +55,6 @@
                   amx::AMXDialect,
                   arm_neon::ArmNeonDialect,
                   async::AsyncDialect,
-                  avx512::AVX512Dialect,
                   complex::ComplexDialect,
                   DLTIDialect,
                   gpu::GPUDialect,
@@ -78,7 +77,8 @@
                   SDBMDialect,
                   shape::ShapeDialect,
                   tensor::TensorDialect,
-                  tosa::TosaDialect>();
+                  tosa::TosaDialect,
+                  x86vector::X86VectorDialect>();
   // clang-format on
 }
 
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h b/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h
deleted file mode 100644
--- a/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h
+++ /dev/null
@@ -1,32 +0,0 @@
-//===- AVX512ToLLVMIRTranslation.h - AVX512 to LLVM IR ----------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This provides registration calls for AVX512 dialect to LLVM IR
-// translation.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
-#define MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
-
-namespace mlir {
-
-class DialectRegistry;
-class MLIRContext;
-
-/// Register the AVX512 dialect and the translation from it to the LLVM IR
-/// in the given registry;
-void registerAVX512DialectTranslation(DialectRegistry &registry);
-
-/// Register the AVX512 dialect and the translation from it in the registry
-/// associated with the given context.
-void registerAVX512DialectTranslation(MLIRContext &context);
-
-} // namespace mlir
-
-#endif // MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/All.h b/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
--- a/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
+++ b/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
@@ -15,13 +15,13 @@
 #define MLIR_TARGET_LLVMIR_DIALECT_ALL_H
 
 #include "mlir/Target/LLVMIR/Dialect/AMX/AMXToLLVMIRTranslation.h"
-#include "mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/LLVMArmSVE/LLVMArmSVEToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"
 #include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
+#include "mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h"
 
 namespace mlir {
 class DialectRegistry;
@@ -31,12 +31,12 @@
 static inline void registerAllToLLVMIRTranslations(DialectRegistry &registry) {
   registerArmNeonDialectTranslation(registry);
   registerAMXDialectTranslation(registry);
-  registerAVX512DialectTranslation(registry);
   registerLLVMArmSVEDialectTranslation(registry);
   registerLLVMDialectTranslation(registry);
   registerNVVMDialectTranslation(registry);
   registerOpenMPDialectTranslation(registry);
   registerROCDLDialectTranslation(registry);
+  registerX86VectorDialectTranslation(registry);
 }
 } // namespace mlir
 
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h b/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
new file mode 100644
--- /dev/null
+++ b/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
@@ -0,0 +1,32 @@
+//===- X86VectorToLLVMIRTranslation.h - X86Vector to LLVM IR ----*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides registration calls for X86Vector dialect to LLVM IR
+// translation.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
+#define MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
+
+namespace mlir {
+
+class DialectRegistry;
+class MLIRContext;
+
+/// Register the X86Vector dialect and the translation from it to the LLVM IR
+/// in the given registry;
+void registerX86VectorDialectTranslation(DialectRegistry &registry);
+
+/// Register the X86Vector dialect and the translation from it in the registry
+/// associated with the given context.
+void registerX86VectorDialectTranslation(MLIRContext &context);
+
+} // namespace mlir
+
+#endif // MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
--- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
+++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
@@ -16,8 +16,6 @@
   MLIRArmNeon
   MLIRAMX
   MLIRAMXTransforms
-  MLIRAVX512
-  MLIRAVX512Transforms
   MLIRArmSVE
   MLIRArmSVEToLLVM
   MLIRLLVMArmSVE
@@ -27,4 +25,6 @@
   MLIRTargetLLVMIRExport
   MLIRTransforms
   MLIRVector
+  MLIRX86Vector
+  MLIRX86VectorTransforms
   )
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
@@ -15,8 +15,6 @@
 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
 #include "mlir/Dialect/AMX/AMXDialect.h"
 #include "mlir/Dialect/AMX/Transforms.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
-#include "mlir/Dialect/AVX512/Transforms.h"
 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
 #include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
@@ -24,6 +22,8 @@
 #include "mlir/Dialect/MemRef/IR/MemRef.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
 #include "mlir/Dialect/Vector/VectorOps.h"
+#include "mlir/Dialect/X86Vector/Transforms.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 using namespace mlir;
@@ -38,7 +38,7 @@
     this->enableArmNeon = options.enableArmNeon;
     this->enableArmSVE = options.enableArmSVE;
     this->enableAMX = options.enableAMX;
-    this->enableAVX512 = options.enableAVX512;
+    this->enableX86Vector = options.enableX86Vector;
   }
   // Override explicitly to allow conditional dialect dependence.
   void getDependentDialects(DialectRegistry &registry) const override {
@@ -50,8 +50,8 @@
       registry.insert<LLVM::LLVMArmSVEDialect>();
     if (enableAMX)
       registry.insert<amx::AMXDialect>();
-    if (enableAVX512)
-      registry.insert<avx512::AVX512Dialect>();
+    if (enableX86Vector)
+      registry.insert<x86vector::X86VectorDialect>();
   }
   void runOnOperation() override;
 };
@@ -115,9 +115,9 @@
     configureAMXLegalizeForExportTarget(target);
     populateAMXLegalizeForLLVMExportPatterns(converter, patterns);
   }
-  if (enableAVX512) {
-    configureAVX512LegalizeForExportTarget(target);
-    populateAVX512LegalizeForLLVMExportPatterns(converter, patterns);
+  if (enableX86Vector) {
+    configureX86VectorLegalizeForExportTarget(target);
+    populateX86VectorLegalizeForLLVMExportPatterns(converter, patterns);
   }
 
   if (failed(
diff --git a/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt b/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt
deleted file mode 100644
--- a/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-add_mlir_dialect_library(MLIRAVX512
-  AVX512Dialect.cpp
-
-  ADDITIONAL_HEADER_DIRS
-  ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/AVX512
-
-  DEPENDS
-  MLIRAVX512IncGen
-
-  LINK_LIBS PUBLIC
-  MLIRIR
-  MLIRLLVMIR
-  MLIRSideEffectInterfaces
-  )
diff --git a/mlir/lib/Dialect/CMakeLists.txt b/mlir/lib/Dialect/CMakeLists.txt
--- a/mlir/lib/Dialect/CMakeLists.txt
+++ b/mlir/lib/Dialect/CMakeLists.txt
@@ -3,7 +3,6 @@
 add_subdirectory(ArmSVE)
 add_subdirectory(Async)
 add_subdirectory(AMX)
-add_subdirectory(AVX512)
 add_subdirectory(Complex)
 add_subdirectory(DLTI)
 add_subdirectory(GPU)
@@ -25,6 +24,7 @@
 add_subdirectory(Tosa)
 add_subdirectory(Utils)
 add_subdirectory(Vector)
+add_subdirectory(X86Vector)
 
 set(LLVM_OPTIONAL_SOURCES
   Traits.cpp
diff --git a/mlir/lib/Dialect/AVX512/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/CMakeLists.txt
rename from mlir/lib/Dialect/AVX512/CMakeLists.txt
rename to mlir/lib/Dialect/X86Vector/CMakeLists.txt
diff --git a/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
new file mode 100644
--- /dev/null
+++ b/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
@@ -0,0 +1,14 @@
+add_mlir_dialect_library(MLIRX86Vector
+  X86VectorDialect.cpp
+
+  ADDITIONAL_HEADER_DIRS
+  ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/X86Vector
+
+  DEPENDS
+  MLIRX86VectorIncGen
+
+  LINK_LIBS PUBLIC
+  MLIRIR
+  MLIRLLVMIR
+  MLIRSideEffectInterfaces
+  )
diff --git a/mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp b/mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
rename from mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp
rename to mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
--- a/mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp
+++ b/mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
@@ -1,4 +1,4 @@
-//===- AVX512Ops.cpp - MLIR AVX512 ops implementation ---------------------===//
+//===- X86VectorDialect.cpp - MLIR X86Vector ops implementation -----------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,11 +6,11 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements the AVX512 dialect and its operations.
+// This file implements the X86Vector dialect and its operations.
 //
 //===----------------------------------------------------------------------===//
 
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/OpImplementation.h"
@@ -18,14 +18,14 @@
 
 using namespace mlir;
 
-void avx512::AVX512Dialect::initialize() {
+void x86vector::X86VectorDialect::initialize() {
   addOperations<
 #define GET_OP_LIST
-#include "mlir/Dialect/AVX512/AVX512.cpp.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.cpp.inc"
       >();
 }
 
-static LogicalResult verify(avx512::MaskCompressOp op) {
+static LogicalResult verify(x86vector::MaskCompressOp op) {
   if (op.src() && op.constant_src())
     return emitError(op.getLoc(), "cannot use both src and constant_src");
 
@@ -42,4 +42,4 @@
 }
 
 #define GET_OP_CLASSES
-#include "mlir/Dialect/AVX512/AVX512.cpp.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.cpp.inc"
diff --git a/mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
rename from mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt
rename to mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
--- a/mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt
+++ b/mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
@@ -1,11 +1,11 @@
-add_mlir_dialect_library(MLIRAVX512Transforms
+add_mlir_dialect_library(MLIRX86VectorTransforms
   LegalizeForLLVMExport.cpp
 
   DEPENDS
-  MLIRAVX512ConversionsIncGen
+  MLIRX86VectorConversionsIncGen
 
   LINK_LIBS PUBLIC
-  MLIRAVX512
+  MLIRX86Vector
   MLIRIR
   MLIRLLVMIR
   MLIRStandardToLLVM
diff --git a/mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp b/mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
rename from mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp
rename to mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
--- a/mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp
+++ b/mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
@@ -1,4 +1,5 @@
-//===- LegalizeForLLVMExport.cpp - Prepare AVX512 for LLVM translation ----===//
+//===- LegalizeForLLVMExport.cpp - Prepare X86Vector for LLVM translation
+//----===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,19 +7,19 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "mlir/Dialect/AVX512/Transforms.h"
+#include "mlir/Dialect/X86Vector/Transforms.h"
 
 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/IR/PatternMatch.h"
 
 using namespace mlir;
-using namespace mlir::avx512;
+using namespace mlir::x86vector;
 
-/// Extracts the "main" vector element type from the given AVX512 operation.
+/// Extracts the "main" vector element type from the given X86Vector operation.
 template <typename OpTy>
 static Type getSrcVectorElementType(OpTy op) {
   return op.src().getType().template cast<VectorType>().getElementType();
@@ -29,6 +30,7 @@
 }
 
 namespace {
+
 /// Base conversion for AVX512 ops that can be lowered to one of the two
 /// intrinsics based on the bitwidth of their "main" vector element type. This
 /// relies on the to-LLVM-dialect conversion helpers to correctly pack the
@@ -126,14 +128,14 @@
 
 } // namespace
 
-/// Populate the given list with patterns that convert from AVX512 to LLVM.
-void mlir::populateAVX512LegalizeForLLVMExportPatterns(
+/// Populate the given list with patterns that convert from X86Vector to LLVM.
+void mlir::populateX86VectorLegalizeForLLVMExportPatterns(
     LLVMTypeConverter &converter, RewritePatternSet &patterns) {
   Registry::registerPatterns(converter, patterns);
   patterns.add<MaskCompressOpConversion>(converter);
 }
 
-void mlir::configureAVX512LegalizeForExportTarget(
+void mlir::configureX86VectorLegalizeForExportTarget(
     LLVMConversionTarget &target) {
   Registry::configureTarget(target);
   target.addLegalOp<MaskCompressIntrOp>();
diff --git a/mlir/lib/Target/LLVMIR/CMakeLists.txt b/mlir/lib/Target/LLVMIR/CMakeLists.txt
--- a/mlir/lib/Target/LLVMIR/CMakeLists.txt
+++ b/mlir/lib/Target/LLVMIR/CMakeLists.txt
@@ -38,7 +38,7 @@
   LINK_LIBS PUBLIC
   MLIRArmNeonToLLVMIRTranslation
   MLIRAMXToLLVMIRTranslation
-  MLIRAVX512ToLLVMIRTranslation
+  MLIRX86VectorToLLVMIRTranslation
   MLIRLLVMArmSVEToLLVMIRTranslation
   MLIRLLVMToLLVMIRTranslation
   MLIRNVVMToLLVMIRTranslation
diff --git a/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt
deleted file mode 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-add_mlir_translation_library(MLIRAVX512ToLLVMIRTranslation
-  AVX512ToLLVMIRTranslation.cpp
-
-  DEPENDS
-  MLIRAVX512ConversionsIncGen
-
-  LINK_COMPONENTS
-  Core
-
-  LINK_LIBS PUBLIC
-  MLIRIR
-  MLIRAVX512
-  MLIRLLVMIR
-  MLIRSupport
-  MLIRTargetLLVMIRExport
-  )
diff --git a/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
--- a/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
+++ b/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
@@ -1,8 +1,8 @@
 add_subdirectory(ArmNeon)
 add_subdirectory(AMX)
-add_subdirectory(AVX512)
 add_subdirectory(LLVMArmSVE)
 add_subdirectory(LLVMIR)
 add_subdirectory(NVVM)
 add_subdirectory(OpenMP)
 add_subdirectory(ROCDL)
+add_subdirectory(X86Vector)
diff --git a/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
new file mode 100644
--- /dev/null
+++ b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
@@ -0,0 +1,16 @@
+add_mlir_translation_library(MLIRX86VectorToLLVMIRTranslation
+  X86VectorToLLVMIRTranslation.cpp
+
+  DEPENDS
+  MLIRX86VectorConversionsIncGen
+
+  LINK_COMPONENTS
+  Core
+
+  LINK_LIBS PUBLIC
+  MLIRIR
+  MLIRX86Vector
+  MLIRLLVMIR
+  MLIRSupport
+  MLIRTargetLLVMIRExport
+  )
diff --git a/mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
rename from mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp
rename to mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
--- a/mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
@@ -1,4 +1,4 @@
-//===- AVX512ToLLVMIRTranslation.cpp - Translate AVX512 to LLVM IR---------===//
+//===- X86VectorToLLVMIRTranslation.cpp - Translate X86Vector to LLVM IR---===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -6,13 +6,13 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file implements a translation between the MLIR AVX512 dialect and
+// This file implements a translation between the MLIR X86Vector dialect and
 // LLVM IR.
 //
 //===----------------------------------------------------------------------===//
 
-#include "mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
+#include "mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/IR/Operation.h"
 #include "mlir/Target/LLVMIR/ModuleTranslation.h"
 
@@ -24,8 +24,8 @@
 
 namespace {
 /// Implementation of the dialect interface that converts operations belonging
-/// to the AVX512 dialect to LLVM IR.
-class AVX512DialectLLVMIRTranslationInterface
+/// to the X86Vector dialect to LLVM IR.
+class X86VectorDialectLLVMIRTranslationInterface
     : public LLVMTranslationDialectInterface {
 public:
   using LLVMTranslationDialectInterface::LLVMTranslationDialectInterface;
@@ -36,21 +36,21 @@
   convertOperation(Operation *op, llvm::IRBuilderBase &builder,
                    LLVM::ModuleTranslation &moduleTranslation) const final {
     Operation &opInst = *op;
-#include "mlir/Dialect/AVX512/AVX512Conversions.inc"
+#include "mlir/Dialect/X86Vector/X86VectorConversions.inc"
 
     return failure();
   }
 };
 } // end namespace
 
-void mlir::registerAVX512DialectTranslation(DialectRegistry &registry) {
-  registry.insert<avx512::AVX512Dialect>();
-  registry.addDialectInterface<avx512::AVX512Dialect,
-                               AVX512DialectLLVMIRTranslationInterface>();
+void mlir::registerX86VectorDialectTranslation(DialectRegistry &registry) {
+  registry.insert<x86vector::X86VectorDialect>();
+  registry.addDialectInterface<x86vector::X86VectorDialect,
+                               X86VectorDialectLLVMIRTranslationInterface>();
 }
 
-void mlir::registerAVX512DialectTranslation(MLIRContext &context) {
+void mlir::registerX86VectorDialectTranslation(MLIRContext &context) {
   DialectRegistry registry;
-  registerAVX512DialectTranslation(registry);
+  registerX86VectorDialectTranslation(registry);
   context.appendDialectRegistry(registry);
 }
diff --git a/mlir/test/CMakeLists.txt b/mlir/test/CMakeLists.txt
--- a/mlir/test/CMakeLists.txt
+++ b/mlir/test/CMakeLists.txt
@@ -29,7 +29,7 @@
   set(INTEL_SDE_EXECUTABLE "" CACHE STRING
       "If set, arch-specific integration tests are run with Intel SDE.")
   option(MLIR_RUN_AMX_TESTS "Run AMX tests.")
-  option(MLIR_RUN_AVX512_TESTS "Run AVX512 tests.")
+  option(MLIR_RUN_X86VECTOR_TESTS "Run X86Vector tests.")
   # Passed to lit.site.cfg.py.in to set up the path where to find the libraries.
   set(MLIR_INTEGRATION_TEST_DIR ${CMAKE_LIBRARY_OUTPUT_DIRECTORY})
 
diff --git a/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir b/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir
deleted file mode 100644
--- a/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir
+++ /dev/null
@@ -1,41 +0,0 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-avx512" | mlir-opt | FileCheck %s
-
-func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
-  -> (vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>)
-{
-  // CHECK: avx512.intr.mask.rndscale.ps.512
-  %0 = avx512.mask.rndscale %a, %i32, %a, %i16, %i32: vector<16xf32>
-  // CHECK: avx512.intr.mask.rndscale.pd.512
-  %1 = avx512.mask.rndscale %b, %i32, %b, %i8, %i32: vector<8xf64>
-
-  // CHECK: avx512.intr.mask.scalef.ps.512
-  %2 = avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
-  // CHECK: avx512.intr.mask.scalef.pd.512
-  %3 = avx512.mask.scalef %b, %b, %b, %i8, %i32: vector<8xf64>
-
-  // Keep results alive.
-  return %0, %1, %2, %3 : vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
-                           %k2: vector<8xi1>, %a2: vector<8xi64>)
-  -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
-{
-  // CHECK: avx512.intr.mask.compress
-  %0 = avx512.mask.compress %k1, %a1 : vector<16xf32>
-  // CHECK: avx512.intr.mask.compress
-  %1 = avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
-  // CHECK: avx512.intr.mask.compress
-  %2 = avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
-  return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
-}
-
-func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
-  -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
-{
-  // CHECK: avx512.intr.vp2intersect.d.512
-  %0, %1 = avx512.vp2intersect %a, %a : vector<16xi32>
-  // CHECK: avx512.intr.vp2intersect.q.512
-  %2, %3 = avx512.vp2intersect %b, %b : vector<8xi64>
-  return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
-}
diff --git a/mlir/test/Dialect/AVX512/roundtrip.mlir b/mlir/test/Dialect/AVX512/roundtrip.mlir
deleted file mode 100644
--- a/mlir/test/Dialect/AVX512/roundtrip.mlir
+++ /dev/null
@@ -1,44 +0,0 @@
-// RUN: mlir-opt -verify-diagnostics %s | mlir-opt | FileCheck %s
-
-func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
-  -> (vector<16xf32>, vector<8xf64>)
-{
-  // CHECK: avx512.mask.rndscale {{.*}}: vector<16xf32>
-  %0 = avx512.mask.rndscale %a, %i32, %a, %i16, %i32 : vector<16xf32>
-  // CHECK: avx512.mask.rndscale {{.*}}: vector<8xf64>
-  %1 = avx512.mask.rndscale %b, %i32, %b, %i8, %i32 : vector<8xf64>
-  return %0, %1: vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_scalef(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
-  -> (vector<16xf32>, vector<8xf64>)
-{
-  // CHECK: avx512.mask.scalef {{.*}}: vector<16xf32>
-  %0 = avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
-  // CHECK: avx512.mask.scalef {{.*}}: vector<8xf64>
-  %1 = avx512.mask.scalef %b, %b, %b, %i8, %i32 : vector<8xf64>
-  return %0, %1: vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
-  -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
-{
-  // CHECK: avx512.vp2intersect {{.*}} : vector<16xi32>
-  %0, %1 = avx512.vp2intersect %a, %a : vector<16xi32>
-  // CHECK: avx512.vp2intersect {{.*}} : vector<8xi64>
-  %2, %3 = avx512.vp2intersect %b, %b : vector<8xi64>
-  return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
-}
-
-func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
-                           %k2: vector<8xi1>, %a2: vector<8xi64>)
-  -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
-{
-  // CHECK: avx512.mask.compress {{.*}} : vector<16xf32>
-  %0 = avx512.mask.compress %k1, %a1 : vector<16xf32>
-  // CHECK: avx512.mask.compress {{.*}} : vector<16xf32>
-  %1 = avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
-  // CHECK: avx512.mask.compress {{.*}} : vector<8xi64>
-  %2 = avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
-  return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
-}
diff --git a/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
new file mode 100644
--- /dev/null
+++ b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
@@ -0,0 +1,44 @@
+// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" | mlir-opt | FileCheck %s
+
+// CHECK-LABEL: func @avx512_mask_rndscale
+func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+  -> (vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>)
+{
+  // CHECK: x86vector.avx512.intr.mask.rndscale.ps.512
+  %0 = x86vector.avx512.mask.rndscale %a, %i32, %a, %i16, %i32: vector<16xf32>
+  // CHECK: x86vector.avx512.intr.mask.rndscale.pd.512
+  %1 = x86vector.avx512.mask.rndscale %b, %i32, %b, %i8, %i32: vector<8xf64>
+
+  // CHECK: x86vector.avx512.intr.mask.scalef.ps.512
+  %2 = x86vector.avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
+  // CHECK: x86vector.avx512.intr.mask.scalef.pd.512
+  %3 = x86vector.avx512.mask.scalef %b, %b, %b, %i8, %i32: vector<8xf64>
+
+  // Keep results alive.
+  return %0, %1, %2, %3 : vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_mask_compress
+func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
+                           %k2: vector<8xi1>, %a2: vector<8xi64>)
+  -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
+{
+  // CHECK: x86vector.avx512.intr.mask.compress
+  %0 = x86vector.avx512.mask.compress %k1, %a1 : vector<16xf32>
+  // CHECK: x86vector.avx512.intr.mask.compress
+  %1 = x86vector.avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+  // CHECK: x86vector.avx512.intr.mask.compress
+  %2 = x86vector.avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
+  return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
+}
+
+// CHECK-LABEL: func @avx512_vp2intersect
+func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
+  -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
+{
+  // CHECK: x86vector.avx512.intr.vp2intersect.d.512
+  %0, %1 = x86vector.avx512.vp2intersect %a, %a : vector<16xi32>
+  // CHECK: x86vector.avx512.intr.vp2intersect.q.512
+  %2, %3 = x86vector.avx512.vp2intersect %b, %b : vector<8xi64>
+  return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
+}
diff --git a/mlir/test/Dialect/X86Vector/roundtrip.mlir b/mlir/test/Dialect/X86Vector/roundtrip.mlir
new file mode 100644
--- /dev/null
+++ b/mlir/test/Dialect/X86Vector/roundtrip.mlir
@@ -0,0 +1,48 @@
+// RUN: mlir-opt -verify-diagnostics %s | mlir-opt | FileCheck %s
+
+// CHECK-LABEL: func @avx512_mask_rndscale
+func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+  -> (vector<16xf32>, vector<8xf64>)
+{
+  // CHECK: x86vector.avx512.mask.rndscale {{.*}}: vector<16xf32>
+  %0 = x86vector.avx512.mask.rndscale %a, %i32, %a, %i16, %i32 : vector<16xf32>
+  // CHECK: x86vector.avx512.mask.rndscale {{.*}}: vector<8xf64>
+  %1 = x86vector.avx512.mask.rndscale %b, %i32, %b, %i8, %i32 : vector<8xf64>
+  return %0, %1: vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_scalef
+func @avx512_scalef(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+  -> (vector<16xf32>, vector<8xf64>)
+{
+  // CHECK: x86vector.avx512.mask.scalef {{.*}}: vector<16xf32>
+  %0 = x86vector.avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
+  // CHECK: x86vector.avx512.mask.scalef {{.*}}: vector<8xf64>
+  %1 = x86vector.avx512.mask.scalef %b, %b, %b, %i8, %i32 : vector<8xf64>
+  return %0, %1: vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_vp2intersect
+func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
+  -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
+{
+  // CHECK: x86vector.avx512.vp2intersect {{.*}} : vector<16xi32>
+  %0, %1 = x86vector.avx512.vp2intersect %a, %a : vector<16xi32>
+  // CHECK: x86vector.avx512.vp2intersect {{.*}} : vector<8xi64>
+  %2, %3 = x86vector.avx512.vp2intersect %b, %b : vector<8xi64>
+  return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
+}
+
+// CHECK-LABEL: func @avx512_mask_compress
+func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
+                           %k2: vector<8xi1>, %a2: vector<8xi64>)
+  -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
+{
+  // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<16xf32>
+  %0 = x86vector.avx512.mask.compress %k1, %a1 : vector<16xf32>
+  // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<16xf32>
+  %1 = x86vector.avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+  // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<8xi64>
+  %2 = x86vector.avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
+  return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
+}
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
@@ -1,7 +1,7 @@
 import sys
 
-# AVX512 tests must be enabled via build flag.
-if config.mlir_run_avx512_tests != 'ON':
+# X86Vector tests must be enabled via build flag.
+if config.mlir_run_x86vector_tests != 'ON':
     config.unsupported = True
 
 # No JIT on win32.
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm  | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm  | \
 // RUN: mlir-translate  --mlir-to-llvmir | \
 // RUN: %lli --entry-function=entry --mattr="avx512bw" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
@@ -8,8 +8,8 @@
 
   %a = std.constant dense<[1., 0., 0., 2., 4., 3., 5., 7., 8., 1., 5., 5., 3., 1., 0., 7.]> : vector<16xf32>
   %k = std.constant dense<[1,  0,  1,  1,  1,  0,  0,  0,  0,  0,  1,  1,  1,  1,  1,  0]> : vector<16xi1>
-  %r1 = avx512.mask.compress %k, %a : vector<16xf32>
-  %r2 = avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+  %r1 = x86vector.avx512.mask.compress %k, %a : vector<16xf32>
+  %r2 = x86vector.avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
 
   vector.print %r1 : vector<16xf32>
   // CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 )
@@ -18,7 +18,7 @@
   // CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 5, 5, 5, 5, 5, 5, 5 )
 
   %src = std.constant dense<[0., 2., 1., 8., 6., 4., 4., 3., 2., 8., 5., 6., 3., 7., 6., 9.]> : vector<16xf32>
-  %r3 = avx512.mask.compress %k, %a, %src : vector<16xf32>, vector<16xf32>
+  %r3 = x86vector.avx512.mask.compress %k, %a, %src : vector<16xf32>, vector<16xf32>
 
   vector.print %r3 : vector<16xf32>
   // CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 8, 5, 6, 3, 7, 6, 9 )
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm  | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm  | \
 // RUN: mlir-translate  --mlir-to-llvmir | \
 // RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
@@ -35,11 +35,11 @@
 func @vector_dot(%v_A : vector<8xi64>, %v_B : vector<8xf64>,
                  %v_C : vector<8xi64>, %v_D : vector<8xf64>) -> f64 {
   // Compute intersection of indices.
-  %k0, %k1 = avx512.vp2intersect %v_A, %v_C : vector<8xi64>
+  %k0, %k1 = x86vector.avx512.vp2intersect %v_A, %v_C : vector<8xi64>
 
   // Filter out values without match and compress vector.
-  %p0 = avx512.mask.compress %k0, %v_B : vector<8xf64>
-  %p1 = avx512.mask.compress %k1, %v_D : vector<8xf64>
+  %p0 = x86vector.avx512.mask.compress %k0, %v_B : vector<8xf64>
+  %p1 = x86vector.avx512.mask.compress %k1, %v_D : vector<8xf64>
 
   // Dense vector dot product.
   %acc = std.constant 0.0 : f64
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm  | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm  | \
 // RUN: mlir-translate  --mlir-to-llvmir | \
 // RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
@@ -40,7 +40,7 @@
   vector.print %w9 : vector<16xi32>
   // CHECK: ( 1, 1, 1, 1, 2, 1, 1, -219, 12, 12, 12, 0, 0, 0, 1, 0 )
 
-  %k1, %k2 = avx512.vp2intersect %v9, %w9 : vector<16xi32>
+  %k1, %k2 = x86vector.avx512.vp2intersect %v9, %w9 : vector<16xi32>
 
   vector.print %k1 : vector<16xi1>
   // CHECK: ( 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1 )
diff --git a/mlir/test/Target/LLVMIR/avx512.mlir b/mlir/test/Target/LLVMIR/x86vector.mlir
rename from mlir/test/Target/LLVMIR/avx512.mlir
rename to mlir/test/Target/LLVMIR/x86vector.mlir
--- a/mlir/test/Target/LLVMIR/avx512.mlir
+++ b/mlir/test/Target/LLVMIR/x86vector.mlir
@@ -7,10 +7,10 @@
 {
   %b = llvm.mlir.constant(42 : i32) : i32
   // CHECK: call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>
-  %0 = "avx512.intr.mask.rndscale.ps.512"(%a, %b, %a, %c, %b) :
+  %0 = "x86vector.avx512.intr.mask.rndscale.ps.512"(%a, %b, %a, %c, %b) :
     (vector<16 x f32>, i32, vector<16 x f32>, i16, i32) -> vector<16 x f32>
   // CHECK: call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float>
-  %1 = "avx512.intr.mask.scalef.ps.512"(%a, %a, %a, %c, %b) :
+  %1 = "x86vector.avx512.intr.mask.scalef.ps.512"(%a, %a, %a, %c, %b) :
     (vector<16 x f32>, vector<16 x f32>, vector<16 x f32>, i16, i32) -> vector<16 x f32>
   llvm.return %1: vector<16 x f32>
 }
@@ -22,10 +22,10 @@
 {
   %b = llvm.mlir.constant(42 : i32) : i32
   // CHECK: call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>
-  %0 = "avx512.intr.mask.rndscale.pd.512"(%a, %b, %a, %c, %b) :
+  %0 = "x86vector.avx512.intr.mask.rndscale.pd.512"(%a, %b, %a, %c, %b) :
     (vector<8xf64>, i32, vector<8xf64>, i8, i32) -> vector<8xf64>
   // CHECK: call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double>
-  %1 = "avx512.intr.mask.scalef.pd.512"(%a, %a, %a, %c, %b) :
+  %1 = "x86vector.avx512.intr.mask.scalef.pd.512"(%a, %a, %a, %c, %b) :
     (vector<8xf64>, vector<8xf64>, vector<8xf64>, i8, i32) -> vector<8xf64>
   llvm.return %1: vector<8xf64>
 }
@@ -35,7 +35,7 @@
   -> vector<16xf32>
 {
   // CHECK: call <16 x float> @llvm.x86.avx512.mask.compress.v16f32(
-  %0 = "avx512.intr.mask.compress"(%a, %a, %k) :
+  %0 = "x86vector.avx512.intr.mask.compress"(%a, %a, %k) :
     (vector<16xf32>, vector<16xf32>, vector<16xi1>) -> vector<16xf32>
   llvm.return %0 : vector<16xf32>
 }
@@ -45,7 +45,7 @@
   -> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
 {
   // CHECK: call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32>
-  %0 = "avx512.intr.vp2intersect.d.512"(%a, %b) :
+  %0 = "x86vector.avx512.intr.vp2intersect.d.512"(%a, %b) :
     (vector<16xi32>, vector<16xi32>) -> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
   llvm.return %0 : !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
 }
@@ -55,7 +55,7 @@
   -> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
 {
   // CHECK: call { <8 x i1>, <8 x i1> } @llvm.x86.avx512.vp2intersect.q.512(<8 x i64>
-  %0 = "avx512.intr.vp2intersect.q.512"(%a, %b) :
+  %0 = "x86vector.avx512.intr.vp2intersect.q.512"(%a, %b) :
     (vector<8xi64>, vector<8xi64>) -> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
   llvm.return %0 : !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
 }
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in
--- a/mlir/test/lit.site.cfg.py.in
+++ b/mlir/test/lit.site.cfg.py.in
@@ -48,7 +48,7 @@
 config.mlir_integration_test_dir = "@MLIR_INTEGRATION_TEST_DIR@"
 config.intel_sde_executable = "@INTEL_SDE_EXECUTABLE@"
 config.mlir_run_amx_tests = "@MLIR_RUN_AMX_TESTS@"
-config.mlir_run_avx512_tests = "@MLIR_RUN_AVX512_TESTS@"
+config.mlir_run_x86vector_tests = "@MLIR_RUN_X86VECTOR_TESTS@"
 config.mlir_include_integration_tests = "@MLIR_INCLUDE_INTEGRATION_TESTS@"
 
 # Support substitution of the tools_dir with user parameters. This is
diff --git a/mlir/test/mlir-opt/commandline.mlir b/mlir/test/mlir-opt/commandline.mlir
--- a/mlir/test/mlir-opt/commandline.mlir
+++ b/mlir/test/mlir-opt/commandline.mlir
@@ -6,7 +6,6 @@
 // CHECK-NEXT: arm_neon
 // CHECK-NEXT: arm_sve
 // CHECK-NEXT: async
-// CHECK-NEXT: avx512
 // CHECK-NEXT: complex
 // CHECK-NEXT: dlti
 // CHECK-NEXT: gpu
@@ -30,3 +29,4 @@
 // CHECK-NEXT: test
 // CHECK-NEXT: tosa
 // CHECK-NEXT: vector
+// CHECK-NEXT: x86vector