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[RISCV] Add RV64F codegen support

Description

[RISCV] Add RV64F codegen support

This requires a little extra work due tothe fact i32 is not a legal type. When
call lowering happens post-legalisation (e.g. when an intrinsic was inserted
during legalisation). A bitcast from f32 to i32 can't be introduced. This is
similar to the challenges with RV32D. To handle this, we introduce
target-specific DAG nodes that perform bitcast+anyext for f32->i64 and
trunc+bitcast for i64->f32.

Differential Revision: https://reviews.llvm.org/D53235

Details

Committed
asbJan 31 2019, 2:48 PM
Differential Revision
D53235: [RISCV] Add RV64F codegen support
Parents
rL352806: [WebAssembly] MC: Fix for outputing wasm object to /dev/null
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