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[PowerPC] Convert r+r instructions to r+i (pre and post RA)

Description

[PowerPC] Convert r+r instructions to r+i (pre and post RA)

This patch adds the necessary infrastructure to convert instructions that
take two register operands to those that take a register and immediate if
the necessary operand is produced by a load-immediate. Furthermore, it uses
this infrastructure to perform such conversions twice - first at MachineSSA
and then pre-emit.

There are a number of reasons we may end up with opportunities for this
transformation, including but not limited to:

  • X-Form instructions chosen since the exact offset isn't available at ISEL time
  • Atomic instructions with constant operands (we will add patterns for this in the future)
  • Tail duplication may duplicate code where one block contains this redundancy
  • When emitting compare-free code in PPCDAGToDAGISel, we don't handle constant comparands specially

Furthermore, this patch moves the initialization of PPCMIPeepholePass so that
it can be used for MIR tests.

Details

Committed
nemanjaiDec 14 2017, 11:27 PM
Parents
rL320790: [X86] Fix a couple bugs in my recent changes to vXi1 insert_subvector lowering.
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