HomePhabricator

[RISCV] Implement prolog and epilog insertion

Description

[RISCV] Implement prolog and epilog insertion

As frame pointer elimination isn't implemented until a later patch and we make
extensive use of update_llc_test_checks.py, this changes touches a lot of the
RISC-V tests.

Differential Revision: https://reviews.llvm.org/D39849

Details

Committed
asbDec 11 2017, 4:34 AM
Differential Revision
D39849: [RISCV] Implement prolog and epilog insertion
Parents
rL320356: [X86] Regenerate fsgsbase intrinsic tests. NFCI.
Branches
Unknown
Tags
Unknown