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[MIPS] Add cpu octeon and some instructions

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Status
Audited
Auditors
dsanders
H39 MIPS Backend Audit Triggered Audit
Committed
redstarMar 20 2014, 4:51 AM
Parents
rL204336: Change the type in va_arg call from char to int.
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Description

[MIPS] Add cpu octeon and some instructions

The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.

dsanders accepted this commit.Via LegacyMar 21 2014, 8:23 AM

rL204337

llvm/trunk/lib/Target/Mips/Mips.td

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llvm/trunk/lib/Target/Mips/Mips64InstrInfo.td

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llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

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llvm/trunk/lib/Target/Mips/MipsInstrFormats.td

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llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

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llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td

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llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp

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llvm/trunk/lib/Target/Mips/MipsSchedule.td

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llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp

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llvm/trunk/lib/Target/Mips/MipsSubtarget.h

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llvm/trunk/test/CodeGen/Mips/octeon.ll

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llvm/trunk/test/CodeGen/Mips/octeon_popcnt.ll

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llvm/trunk/test/MC/Mips/octeon-instructions.s

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