IR: add a second ordering operand to cmpxhg for failure

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Auditors
dsanders
H39 MIPS Backend Audit Triggered Audit
Committed
tnorthoverMar 11 2014, 3:48 AM
Parents
rL203558: GVN: fix hashing of extractvalue.
Branches
Unknown
Tags
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Description

IR: add a second ordering operand to cmpxhg for failure

The syntax for "cmpxchg" should now look something like:

cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic

where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).

rdar://problem/15996804

Mar 21 2014, 8:06 AM ยท #1
dsanders resigned from this commit.

Changes (60)

HistoryBrowseChangePath
HistoryBrowseModifiedllvm/trunk/docs/LangRef.rst
HistoryBrowseModifiedllvm/trunk/include/llvm/CodeGen/SelectionDAG.h
HistoryBrowseModifiedllvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
HistoryBrowseModifiedllvm/trunk/include/llvm/IR/IRBuilder.h
HistoryBrowseModifiedllvm/trunk/include/llvm/IR/Instructions.h
HistoryBrowseModifiedllvm/trunk/lib/Analysis/AliasAnalysis.cpp
HistoryBrowseModifiedllvm/trunk/lib/AsmParser/LLParser.cpp
HistoryBrowseModifiedllvm/trunk/lib/AsmParser/LLParser.h
HistoryBrowseModifiedllvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
HistoryBrowseModifiedllvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
HistoryBrowseModifiedllvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
HistoryBrowseModifiedllvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
HistoryBrowseModifiedllvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
HistoryBrowseModifiedllvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
HistoryBrowseModifiedllvm/trunk/lib/IR/AsmWriter.cpp
HistoryBrowseModifiedllvm/trunk/lib/IR/AsmWriter.h
HistoryBrowseModifiedllvm/trunk/lib/IR/Instruction.cpp
HistoryBrowseModifiedllvm/trunk/lib/IR/Instructions.cpp
HistoryBrowseModifiedllvm/trunk/lib/IR/Verifier.cpp
HistoryBrowseModifiedllvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
HistoryBrowseModifiedllvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
HistoryBrowseModifiedllvm/trunk/lib/Target/X86/X86ISelLowering.cpp
HistoryBrowseModifiedllvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
HistoryBrowseModifiedllvm/trunk/lib/Transforms/Instrumentation/MemorySanitizer.cpp
HistoryBrowseModifiedllvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
HistoryBrowseModifiedllvm/trunk/test/Assembler/atomic.ll
HistoryBrowseAddedllvm/trunk/test/Bitcode/cmpxchg-upgrade.ll
HistoryBrowseAddedllvm/trunk/test/Bitcode/cmpxchg-upgrade.ll.bc
HistoryBrowseModifiedllvm/trunk/test/Bitcode/memInstructions.3.2.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/AArch64/atomic-ops.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/ARM/atomic-64bit.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/ARM/atomic-cmp.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/ARM/atomic-ops-v8.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/Mips/atomic.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/Mips/atomicops.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/PowerPC/Atomics-32.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/PowerPC/atomic-1.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/PowerPC/atomic-2.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/SPARC/atomics.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/SystemZ/cmpxchg-01.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/SystemZ/cmpxchg-02.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/SystemZ/cmpxchg-03.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/SystemZ/cmpxchg-04.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/Atomics-64.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic16.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic32.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic64.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic6432.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic8.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/atomic_op.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/cmpxchg16b.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/coalescer-remat.ll
HistoryBrowseModifiedllvm/trunk/test/CodeGen/X86/nocx16.ll
HistoryBrowseModifiedllvm/trunk/test/Instrumentation/AddressSanitizer/test64.ll
HistoryBrowseModifiedllvm/trunk/test/Instrumentation/MemorySanitizer/atomics.ll
HistoryBrowseModifiedllvm/trunk/test/Instrumentation/ThreadSanitizer/atomic.ll
HistoryBrowseModifiedllvm/trunk/test/Transforms/LowerAtomic/atomic-swap.ll
HistoryBrowseModifiedllvm/trunk/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll

rL203559

llvm/trunk/docs/LangRef.rst

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llvm/trunk/include/llvm/CodeGen/SelectionDAG.h

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llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h

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llvm/trunk/include/llvm/IR/IRBuilder.h

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llvm/trunk/include/llvm/IR/Instructions.h

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llvm/trunk/lib/Analysis/AliasAnalysis.cpp

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llvm/trunk/lib/AsmParser/LLParser.cpp

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llvm/trunk/lib/AsmParser/LLParser.h

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llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp

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llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp

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llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

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llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

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llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

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llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

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llvm/trunk/lib/IR/AsmWriter.cpp

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llvm/trunk/lib/IR/AsmWriter.h

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llvm/trunk/lib/IR/Instruction.cpp

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llvm/trunk/lib/IR/Instructions.cpp

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llvm/trunk/lib/IR/Verifier.cpp

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llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

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llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp

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llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

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llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp

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llvm/trunk/lib/Transforms/Instrumentation/MemorySanitizer.cpp

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llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp

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llvm/trunk/test/Assembler/atomic.ll

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llvm/trunk/test/Bitcode/cmpxchg-upgrade.ll

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llvm/trunk/test/Bitcode/cmpxchg-upgrade.ll.bc

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llvm/trunk/test/Bitcode/memInstructions.3.2.ll

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llvm/trunk/test/CodeGen/AArch64/atomic-ops.ll

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llvm/trunk/test/CodeGen/ARM/atomic-64bit.ll

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llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll

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llvm/trunk/test/CodeGen/ARM/atomic-ops-v8.ll

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llvm/trunk/test/CodeGen/Mips/atomic.ll

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llvm/trunk/test/CodeGen/Mips/atomicops.ll

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llvm/trunk/test/CodeGen/PowerPC/Atomics-32.ll

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llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll

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llvm/trunk/test/CodeGen/PowerPC/atomic-1.ll

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llvm/trunk/test/CodeGen/PowerPC/atomic-2.ll

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llvm/trunk/test/CodeGen/SPARC/atomics.ll

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llvm/trunk/test/CodeGen/SystemZ/cmpxchg-01.ll

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llvm/trunk/test/CodeGen/SystemZ/cmpxchg-02.ll

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llvm/trunk/test/CodeGen/SystemZ/cmpxchg-03.ll

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llvm/trunk/test/CodeGen/SystemZ/cmpxchg-04.ll

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llvm/trunk/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll

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llvm/trunk/test/CodeGen/X86/Atomics-64.ll

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llvm/trunk/test/CodeGen/X86/atomic16.ll

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llvm/trunk/test/CodeGen/X86/atomic32.ll

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llvm/trunk/test/CodeGen/X86/atomic64.ll

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llvm/trunk/test/CodeGen/X86/atomic6432.ll

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llvm/trunk/test/CodeGen/X86/atomic8.ll

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llvm/trunk/test/CodeGen/X86/atomic_op.ll

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llvm/trunk/test/CodeGen/X86/cmpxchg16b.ll

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llvm/trunk/test/CodeGen/X86/coalescer-remat.ll

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llvm/trunk/test/CodeGen/X86/nocx16.ll

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llvm/trunk/test/Instrumentation/AddressSanitizer/test64.ll

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llvm/trunk/test/Instrumentation/MemorySanitizer/atomics.ll

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llvm/trunk/test/Instrumentation/ThreadSanitizer/atomic.ll

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llvm/trunk/test/Transforms/LowerAtomic/atomic-swap.ll

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llvm/trunk/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll

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