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[ELF][PPC64] Suppress toc-indirect to toc-relative relaxation if…

Authored by MaskRay on Apr 17 2020, 11:08 PM.

Description

[ELF][PPC64] Suppress toc-indirect to toc-relative relaxation if R_PPC64_TOC16_LO is seen

The current implementation assumes that R_PPC64_TOC16_HA is always followed
by R_PPC64_TOC16_LO_DS. This can break with R_PPC64_TOC16_LO:

// Load the address of the TOC entry, instead of the value stored at that address
addis 3, 2, .LC0@tloc@ha  # R_PPC64_TOC16_HA
addi  3, 3, .LC0@tloc@l   # R_PPC64_TOC16_LO
blr

which is used by boringssl's util/fipstools/delocate/delocate.go
https://github.com/google/boringssl/blob/master/crypto/fipsmodule/FIPS.md has some documentation.
In short, this tool converts an assembly file to avoid any potential relocations.
The distance to an input .toc is not a constant after linking, so it cannot use an addis;ld pair.
Instead, it jumps to a stub which loads the TOC entry address with addis;addi.

This patch checks the presence of R_PPC64_TOC16_LO and suppresses
toc-indirect to toc-relative relaxation if R_PPC64_TOC16_LO is seen.
This approach is conservative and loses some relaxation opportunities but is easy to implement.

addis 3, 2, .LC0@toc@ha  # no relaxation
addi  3, 3, .LC0@toc@l   # no relaxation
li    9, 0
addis 4, 2, .LC0@toc@ha  # can relax but suppressed
ld    4, .LC0@toc@l(4)   # can relax but suppressed

Also note that interleaved R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS is
possible and this patch accounts for that.

addis 3, 2, .LC1@toc@ha  # can relax
addis 4, 2, .LC2@toc@ha  # can relax
ld    3, .LC1@toc@l(3)   # can relax
ld    4, .LC2@toc@l(4)   # can relax

Reviewed By: #powerpc, sfertile

Differential Revision: https://reviews.llvm.org/D78431

Details

Committed
MaskRayApr 30 2020, 9:16 AM
Reviewer
Restricted Project
Differential Revision
D78431: [ELF][PPC64] Suppress toc-indirect to toc-relative relaxation if R_PPC64_TOC16_LO is seen
Parents
rG88aad9b9f057: lit googletest.py: Don't raise StopIteration in generator
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