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[RISCV] Implement vsseg intrinsics.

Authored by HsiangKai on Jan 14 2021, 1:07 AM.

Description

[RISCV] Implement vsseg intrinsics.

Define vsseg intrinsics and pseudo instructions. Lower vsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94688

Details

Committed
HsiangKaiJan 20 2021, 7:51 PM
Differential Revision
D94688: [RISCV] Implement vsseg intrinsics.
Parents
rGbaf6c2987e57: [lldb] Upstream eCore_arm_arm64e enum value in ArchSpec
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