- User Since
- Nov 24 2020, 11:41 PM (7 w, 6 d)
Thu, Dec 24
This change is wrong, the different patch is landed in llvm to handle global address space access in gfx60x for HSA Os. So closing it.
Fixed a small typo in comments. Nothing else is changed from prior diff.
Included the suggestions given by tony.
Wed, Dec 23
If this is fine, place land. I don't have commit access yet.
added a blank line in amdgpuusage.rst file.
Updated the AMDGPUUsage doc. Also I don't have commit access, please commit this patch on my behalf.
Thanks a lot your time.
Tue, Dec 22
Updated the code according to scott's suggestion. And I tried to compile sample program with all possible combinations of processors and ABIs( amdhsa, mesa3d, amdpal), it seems like the backend supports all the ABIs for all processors. So Instead of adding a separate column, (since values of processors will be the same) I added a text pharse above the processor table which documents. Is it right thing to do so?
Mon, Dec 21
Dec 18 2020
Dec 16 2020
Dec 11 2020
Dec 10 2020
Dec 8 2020
Dec 7 2020
Removed error reporting based on string comparison. Updated the memory legalizer tests to include amdhsa for gfx60x
Dec 2 2020
fixed a typo in comments.
Nov 27 2020
Updated with stanislav comments